From nobody Thu Apr 2 22:59:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 444F6C54EE9 for ; Tue, 20 Sep 2022 12:54:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231429AbiITMyB (ORCPT ); Tue, 20 Sep 2022 08:54:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231452AbiITMxg (ORCPT ); Tue, 20 Sep 2022 08:53:36 -0400 Received: from wout4-smtp.messagingengine.com (wout4-smtp.messagingengine.com [64.147.123.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 50CC6760E5; Tue, 20 Sep 2022 05:53:21 -0700 (PDT) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id DDD3E3200985; Tue, 20 Sep 2022 08:53:18 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Tue, 20 Sep 2022 08:53:20 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h=cc :cc:content-transfer-encoding:content-type:date:date:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to; s=fm2; t=1663678398; x= 1663764798; bh=QPg9G5ivjHJPpfwME/clZpzxlHbJakfKiCz4R1/XPHk=; b=R KWZUVjw71KTr3vm/kU+oGkWy8tOP0PJ/bpCrzMxdoM1iyo1e2qBSSgIRnASiEJd1 HajNVq0ZWTTYDHNTNnDx7warrKYcm7rqlYhSm5oz8au4SFyFdeqyrWwjtpK306vZ Pzfp5SeSIlA20y8IZUK3U8+h1fEzvGrzeVZs6wAiqmGbAnNCHooAgzMaFqybu+K3 hiQvmc2KoAt1f8/qjcE/adtDDQJNh+OjG4Na5wV5rKNWGYRGCnJNsZ4Ch2T1MMod zFIUmoueSlrgO6Tbv3ujR/XJ47zO/utd7RvYadVDJ/fqwbA5X76LgN9viNz7rMPY ED2BqqOG2BTnS3vcP7/lw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1663678398; x= 1663764798; bh=QPg9G5ivjHJPpfwME/clZpzxlHbJakfKiCz4R1/XPHk=; b=C gNIQPjKD08AzbBKJYXT5WkdFqHhwwl1rSzerY8yH7LV7IJk92uLiUvA6CnsuRJFb qczbRZ5vW4i35XDkG83q+mwHDm3s6SebO5W9LyDWwpNJUfqDSopWgdoldsGRaLLX rSzpw+imrWP3OYoVr2sMqs8iXuifNniv6E7TUn8FSKKkASFuKNO/cafORIkUeuN4 RM/f2qwF0NXkp6PAVGLcqHEoowPk7NgRS6wCz1feRq/dVuwkbuZZMjB9CoTcCO32 tQcM/kMJGlLI+vWtnVqN4cZ+Vm9EDlny0p9ZXpPqoMEBYW6oHCZN9uGidbNxRY3/ pA58PHGhpGfqIOL/UolUg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvfedrfedvledgheekucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephfffufggtgfgkfhfjgfvvefosehtkeertdertdejnecuhfhrohhmpeforgig ihhmvgcutfhiphgrrhguuceomhgrgihimhgvsegtvghrnhhordhtvggthheqnecuggftrf grthhtvghrnhepudduudfhveejteefgedvffdvvedvjedugedukeejhedtlefhffevtefh jeeltdevnecuvehluhhsthgvrhfuihiivgepudenucfrrghrrghmpehmrghilhhfrhhomh epmhgrgihimhgvsegtvghrnhhordhtvggthh X-ME-Proxy: Feedback-ID: i8771445c:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 20 Sep 2022 08:53:17 -0400 (EDT) From: Maxime Ripard Date: Tue, 20 Sep 2022 14:50:25 +0200 Subject: [PATCH v2 6/7] drm/vc4: hdmi: Add more checks for 4k resolutions MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20220815-rpi-fix-4k-60-v2-6-983276b83f62@cerno.tech> References: <20220815-rpi-fix-4k-60-v2-0-983276b83f62@cerno.tech> In-Reply-To: <20220815-rpi-fix-4k-60-v2-0-983276b83f62@cerno.tech> To: Daniel Vetter , Florian Fainelli , David Airlie , Broadcom internal kernel review list , Michael Turquette , Scott Branden , Stephen Boyd , Emma Anholt , Ray Jui , Maxime Ripard Cc: linux-rpi-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Dom Cobley , dri-devel@lists.freedesktop.org, Maxime Ripard , linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.10.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3248; i=maxime@cerno.tech; h=from:subject:message-id; bh=og7yp0bHrituGtq5GFguKmTt56yND9plFAQ/PXTZ8pI=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMma2/l8pXYkrZoZX72wKq8tOFXqlJRr1aY3bFe8rig9cTvf sjSuo5SFQYyLQVZMkSVG2HxJ3KlZrzvZ+ObBzGFlAhnCwMUpABPZxsHwV1L5mrwSe7KdtYvOTbmjZ5 wvFGfWf9F/F7YsTpWz67Y2B8M/HedYodsbpxl4pP5+M+GATr0Qm+g66QOqhXO0XLX9Glu4AA== X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dom Cobley At least the 4096x2160@60Hz mode requires some overclocking that isn't available by default, even if hdmi_enable_4kp60 is enabled. Let's add some logic to detect whether we can satisfy the core clock requirements for that mode, and prevent it from being used otherwise. Signed-off-by: Dom Cobley Signed-off-by: Maxime Ripard diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h index 09cdbdb7fff0..094ebe8567e2 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h @@ -349,6 +349,12 @@ struct vc4_hvs { * available. */ bool vc5_hdmi_enable_scrambling; + + /* + * 4096x2160@60 requires a core overclock to work, so register + * whether that is sufficient. + */ + bool vc5_hdmi_enable_4096by2160; }; =20 struct vc4_plane { diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index f367f93ca832..cf1fee6c29f3 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -1476,6 +1476,7 @@ vc4_hdmi_sink_supports_format_bpc(const struct vc4_hd= mi *vc4_hdmi, =20 static enum drm_mode_status vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi, + const struct drm_display_mode *mode, unsigned long long clock) { const struct drm_connector *connector =3D &vc4_hdmi->connector; @@ -1488,6 +1489,12 @@ vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *= vc4_hdmi, if (!vc4->hvs->vc5_hdmi_enable_scrambling && clock > HDMI_14_MAX_TMDS_CLK) return MODE_CLOCK_HIGH; =20 + /* 4096x2160@60 is not reliable without overclocking core */ + if (!vc4->hvs->vc5_hdmi_enable_4096by2160 && + mode->hdisplay > 3840 && mode->vdisplay >=3D 2160 && + drm_mode_vrefresh(mode) >=3D 50) + return MODE_CLOCK_HIGH; + if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000)) return MODE_CLOCK_HIGH; =20 @@ -1522,7 +1529,7 @@ vc4_hdmi_encoder_compute_clock(const struct vc4_hdmi = *vc4_hdmi, unsigned long long clock; =20 clock =3D vc4_hdmi_encoder_compute_mode_clock(mode, bpc, fmt); - if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, clock) !=3D MODE_OK) + if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode, clock) !=3D MODE_OK) return -EINVAL; =20 vc4_state->tmds_char_rate =3D clock; @@ -1685,7 +1692,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_encoder *encod= er, (mode->hsync_end % 2) || (mode->htotal % 2))) return MODE_H_ILLEGAL; =20 - return vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode->clock * 1000); + return vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode, mode->clock * 1000); } =20 static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs= =3D { diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c index e28a13a75ec2..32f5ab937ace 100644 --- a/drivers/gpu/drm/vc4/vc4_hvs.c +++ b/drivers/gpu/drm/vc4/vc4_hvs.c @@ -698,6 +698,9 @@ static int vc4_hvs_bind(struct device *dev, struct devi= ce *master, void *data) if (max_rate >=3D 550000000) hvs->vc5_hdmi_enable_scrambling =3D true; =20 + if (max_rate >=3D 600000000) + hvs->vc5_hdmi_enable_4096by2160 =3D true; + hvs->max_core_rate =3D max_rate; =20 ret =3D clk_prepare_enable(hvs->core_clk); --=20 b4 0.10.0