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This is not immediately obvious, because memcpy_fromio() uses word-size accesses as long as enough data is being copied. The vendor driver always uses 32-bit MMIO reads, so do the same here. This is faster than the register-based method, which is currently used as a workaround on A64. And it fixes the values returned on D1, where the SRAM method was being used. The special case for the last word is needed to maintain .word_size =3D=3D 1 for sysfs ABI compatibility, as noted previously in commit de2a3eaea552 ("nvmem: sunxi_sid: Optimize register read-out method"). Fixes: 07ae4fde9efa ("nvmem: sunxi_sid: Add support for D1 variant") Signed-off-by: Samuel Holland Reviewed-by: Jernej Skrabec Tested-by: Heiko Stuebner --- drivers/nvmem/sunxi_sid.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c index 5750e1f4bcdb..92dfe4cb10e3 100644 --- a/drivers/nvmem/sunxi_sid.c +++ b/drivers/nvmem/sunxi_sid.c @@ -41,8 +41,21 @@ static int sunxi_sid_read(void *context, unsigned int of= fset, void *val, size_t bytes) { struct sunxi_sid *sid =3D context; + u32 word; + + /* .stride =3D 4 so offset is guaranteed to be aligned */ + __ioread32_copy(val, sid->base + sid->value_offset + offset, bytes / 4); =20 - memcpy_fromio(val, sid->base + sid->value_offset + offset, bytes); + val +=3D round_down(bytes, 4); + offset +=3D round_down(bytes, 4); + bytes =3D bytes % 4; + + if (!bytes) + return 0; + + /* Handle any trailing bytes */ + word =3D readl_relaxed(sid->base + sid->value_offset + offset); + memcpy(val, &word, bytes); =20 return 0; } --=20 2.35.1 From nobody Sat Apr 11 06:31:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC1B5C25B06 for ; Sun, 14 Aug 2022 17:37:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238927AbiHNRhM (ORCPT ); Sun, 14 Aug 2022 13:37:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231265AbiHNRhG (ORCPT ); Sun, 14 Aug 2022 13:37:06 -0400 Received: from wout4-smtp.messagingengine.com (wout4-smtp.messagingengine.com [64.147.123.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D828615707; Sun, 14 Aug 2022 10:37:05 -0700 (PDT) Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.west.internal (Postfix) with ESMTP id 70FCE32005C1; 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Sun, 14 Aug 2022 13:37:03 -0400 (EDT) From: Samuel Holland To: Srinivas Kandagatla , Chen-Yu Tsai , Jernej Skrabec Cc: Samuel Holland , Greg Kroah-Hartman , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev Subject: [PATCH 2/4] nvmem: sunxi_sid: Drop the workaround on A64 Date: Sun, 14 Aug 2022 12:36:53 -0500 Message-Id: <20220814173656.11856-3-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220814173656.11856-1-samuel@sholland.org> References: <20220814173656.11856-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Now that the SRAM readout code is fixed by using 32-bit accesses, it always returns the same values as register readout, so the A64 variant no longer needs the workaround. This makes the D1 variant structure redundant, so remove it. Signed-off-by: Samuel Holland --- drivers/nvmem/sunxi_sid.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c index 92dfe4cb10e3..a970f1741cc6 100644 --- a/drivers/nvmem/sunxi_sid.c +++ b/drivers/nvmem/sunxi_sid.c @@ -197,15 +197,9 @@ static const struct sunxi_sid_cfg sun8i_h3_cfg =3D { .need_register_readout =3D true, }; =20 -static const struct sunxi_sid_cfg sun20i_d1_cfg =3D { - .value_offset =3D 0x200, - .size =3D 0x100, -}; - static const struct sunxi_sid_cfg sun50i_a64_cfg =3D { .value_offset =3D 0x200, .size =3D 0x100, - .need_register_readout =3D true, }; =20 static const struct sunxi_sid_cfg sun50i_h6_cfg =3D { @@ -218,7 +212,7 @@ static const struct of_device_id sunxi_sid_of_match[] = =3D { { .compatible =3D "allwinner,sun7i-a20-sid", .data =3D &sun7i_a20_cfg }, { .compatible =3D "allwinner,sun8i-a83t-sid", .data =3D &sun50i_a64_cfg }, { .compatible =3D "allwinner,sun8i-h3-sid", .data =3D &sun8i_h3_cfg }, - { .compatible =3D "allwinner,sun20i-d1-sid", .data =3D &sun20i_d1_cfg }, + { .compatible =3D "allwinner,sun20i-d1-sid", .data =3D &sun50i_a64_cfg }, { .compatible =3D "allwinner,sun50i-a64-sid", .data =3D &sun50i_a64_cfg }, { .compatible =3D "allwinner,sun50i-h5-sid", .data =3D &sun50i_a64_cfg }, { .compatible =3D "allwinner,sun50i-h6-sid", .data =3D &sun50i_h6_cfg }, --=20 2.35.1 From nobody Sat Apr 11 06:31:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBEB5C25B0F for ; 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Sun, 14 Aug 2022 13:37:05 -0400 (EDT) From: Samuel Holland To: Srinivas Kandagatla , Chen-Yu Tsai , Jernej Skrabec Cc: Samuel Holland , Greg Kroah-Hartman , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev Subject: [PATCH 3/4] dt-bindings: nvmem: Allow bit offsets greater than a byte Date: Sun, 14 Aug 2022 12:36:54 -0500 Message-Id: <20220814173656.11856-4-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220814173656.11856-1-samuel@sholland.org> References: <20220814173656.11856-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Some NVMEM devices contain cells which do not start at a multiple of the device's stride. However, the "reg" property of a cell must be aligned to its provider device's stride. These cells can be represented in the DT using the "bits" property if that property allows offsets up to the full stride. 63 is chosen assuming that NVMEM devices will not have strides larger than 8 bytes. Signed-off-by: Samuel Holland --- Documentation/devicetree/bindings/nvmem/nvmem.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documenta= tion/devicetree/bindings/nvmem/nvmem.yaml index 3bb349c634cb..4f440ab6a13c 100644 --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml @@ -53,7 +53,7 @@ patternProperties: $ref: /schemas/types.yaml#/definitions/uint32-array items: - minimum: 0 - maximum: 7 + maximum: 63 description: Offset in bit within the address range specified by reg. - minimum: 1 --=20 2.35.1 From nobody Sat Apr 11 06:31:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 102C4C25B06 for ; Sun, 14 Aug 2022 17:37:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239769AbiHNRhV (ORCPT ); Sun, 14 Aug 2022 13:37:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232048AbiHNRhL (ORCPT ); Sun, 14 Aug 2022 13:37:11 -0400 Received: from wout4-smtp.messagingengine.com (wout4-smtp.messagingengine.com [64.147.123.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2CB7218E32; Sun, 14 Aug 2022 10:37:11 -0700 (PDT) Received: from compute2.internal (compute2.nyi.internal [10.202.2.46]) by mailout.west.internal (Postfix) with ESMTP id B2BFF32005CA; Sun, 14 Aug 2022 13:37:09 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute2.internal (MEProxy); Sun, 14 Aug 2022 13:37:10 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm2; t=1660498629; x=1660585029; bh=49 dhIZfr5q8v+hGU8cuF1niSFm1wGL2iaQ0mMKaC1Us=; b=KMrjwpl8IyD45VewM0 dnahvq08KfsO25Cnb/NS7UvZIdllLvu08CkJfT1IJRn+RauKE5ROgPXzcLoAiPbz GG8x351g5x40BbTEE4fd1BN0E/bac9JP1l5OqMBTwLGNfmhczFib9iGTh3GLmy3V XmV69ZIXLPW74p1KKcwojNrkasQok2SPbX77ECRBQqtftiO/XGl4OmmMXzP24rlF yL9wxa8ipCWVvid7XN6jHf0uPnGWw9YYKeD61p1/nQTDW3TPodE7Rs7nHn/5ixTD U+IxN+38eMNvnJFEe6KGosSZWIrtOO2q79E05Fdf6kTIFHWVMvChvKmNFQfJ8X0X 1NDA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :feedback-id:feedback-id:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm1; t=1660498629; x=1660585029; bh=49dhIZfr5q8v+ hGU8cuF1niSFm1wGL2iaQ0mMKaC1Us=; b=RuQ9kyJ9nsUTo/A8HY226w+V00dU+ QdHGVJOLVr2M9qocaY5Z4cMX5XD9AMI1Fj08k47MlL0PjmsS7Ssu81c+vK7M3IaW 1RaxCyJBMvjjay4GWXNp0AOfg86Go3xI9DfuyJCPJ8KAeMwRxxxoYsPMDyCjH1Jo 1b/bUWAs6vSbgjAa0ib/ILDeujgYWhjpXw6d1FyXo07teXesVwvxA3y6X4xYjmoS ix6ASTAZXNv5ONtUw4V7GA2Zk7BeHKfnU3z0FhXHeYsOhJANAy6/J9TbEXOgB2j+ Dhavxe9oT/eil+udKtY7y8DRiCwp7pvobX0m0xf+0MgVOVr0Ej1vcUn7g== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvfedrvdehtddgudduiecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefurghm uhgvlhcujfholhhlrghnugcuoehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgqeenuc ggtffrrghtthgvrhhnpedukeetueduhedtleetvefguddvvdejhfefudelgfduveeggeeh gfdufeeitdevteenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfh hrohhmpehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhg X-ME-Proxy: Feedback-ID: i0ad843c9:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 14 Aug 2022 13:37:08 -0400 (EDT) From: Samuel Holland To: Srinivas Kandagatla , Chen-Yu Tsai , Jernej Skrabec Cc: Samuel Holland , Greg Kroah-Hartman , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev Subject: [PATCH 4/4] nvmem: core: Support reading cells with >= 8 bit offsets Date: Sun, 14 Aug 2022 12:36:55 -0500 Message-Id: <20220814173656.11856-5-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220814173656.11856-1-samuel@sholland.org> References: <20220814173656.11856-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" For NVMEM devices with .stride > 1, some cell values may not be aligned to the device's stride. In this case, it is necessary to use bit_offset to access the cell. For example, to access the third byte of an NVMEM device with .stride =3D=3D 4, we need "bits =3D <16 8>;" in the devicetree. Implement this on the read side. The write side implementation would be more complicated, and it is not necessary for read-only NVMEM devices. For now, reject writes for these cells to avoid any incorrect behavior. Signed-off-by: Samuel Holland --- drivers/nvmem/core.c | 43 ++++++++++++++++++++++++------------------- 1 file changed, 24 insertions(+), 19 deletions(-) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 1e3c754efd0d..309beba8c9f0 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -1373,63 +1373,67 @@ void nvmem_cell_put(struct nvmem_cell *cell) } EXPORT_SYMBOL_GPL(nvmem_cell_put); =20 -static void nvmem_shift_read_buffer_in_place(struct nvmem_cell_entry *cell= , void *buf) +static int nvmem_shift_read_buffer_in_place(struct nvmem_cell_entry *cell,= void *buf) { + int bit_offset =3D cell->bit_offset, bytes, i; u8 *p, *b; - int i, extra, bit_offset =3D cell->bit_offset; =20 p =3D b =3D buf; if (bit_offset) { + int byte_offset =3D bit_offset / BITS_PER_BYTE; + + b +=3D byte_offset; + bit_offset %=3D BITS_PER_BYTE; + bytes =3D cell->bytes - byte_offset; + /* First shift */ - *b++ >>=3D bit_offset; + *p =3D *b++ >> bit_offset; =20 /* setup rest of the bytes if any */ - for (i =3D 1; i < cell->bytes; i++) { + for (i =3D 1; i < bytes; i++) { /* Get bits from next byte and shift them towards msb */ - *p |=3D *b << (BITS_PER_BYTE - bit_offset); - - p =3D b; - *b++ >>=3D bit_offset; + *p++ |=3D *b << (BITS_PER_BYTE - bit_offset); + *p =3D *b++ >> bit_offset; } - } else { - /* point to the msb */ - p +=3D cell->bytes - 1; } =20 /* result fits in less bytes */ - extra =3D cell->bytes - DIV_ROUND_UP(cell->nbits, BITS_PER_BYTE); - while (--extra >=3D 0) - *p-- =3D 0; + bytes =3D DIV_ROUND_UP(cell->nbits, BITS_PER_BYTE); + p =3D buf + bytes; + memset(p, 0, cell->bytes - bytes); =20 /* clear msb bits if any leftover in the last byte */ if (cell->nbits % BITS_PER_BYTE) - *p &=3D GENMASK((cell->nbits % BITS_PER_BYTE) - 1, 0); + p[-1] &=3D GENMASK((cell->nbits % BITS_PER_BYTE) - 1, 0); + + return bytes; } =20 static int __nvmem_cell_read(struct nvmem_device *nvmem, struct nvmem_cell_entry *cell, void *buf, size_t *len, const char *id) { + int bytes =3D cell->bytes; int rc; =20 - rc =3D nvmem_reg_read(nvmem, cell->offset, buf, cell->bytes); + rc =3D nvmem_reg_read(nvmem, cell->offset, buf, bytes); =20 if (rc) return rc; =20 /* shift bits in-place */ if (cell->bit_offset || cell->nbits) - nvmem_shift_read_buffer_in_place(cell, buf); + bytes =3D nvmem_shift_read_buffer_in_place(cell, buf); =20 if (nvmem->cell_post_process) { rc =3D nvmem->cell_post_process(nvmem->priv, id, - cell->offset, buf, cell->bytes); + cell->offset, buf, bytes); if (rc) return rc; } =20 if (len) - *len =3D cell->bytes; + *len =3D bytes; =20 return 0; } @@ -1526,6 +1530,7 @@ static int __nvmem_cell_entry_write(struct nvmem_cell= _entry *cell, void *buf, si int rc; =20 if (!nvmem || nvmem->read_only || + cell->bit_offset >=3D BITS_PER_BYTE || (cell->bit_offset =3D=3D 0 && len !=3D cell->bytes)) return -EINVAL; =20 --=20 2.35.1