From nobody Sat Apr 11 08:10:40 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30414C25B06 for ; Sun, 14 Aug 2022 14:13:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239735AbiHNONL (ORCPT ); Sun, 14 Aug 2022 10:13:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34146 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230071AbiHNOM6 (ORCPT ); Sun, 14 Aug 2022 10:12:58 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 342EB9FCC for ; Sun, 14 Aug 2022 07:12:57 -0700 (PDT) Received: by mail-wr1-x42e.google.com with SMTP id l22so6348894wrz.7 for ; Sun, 14 Aug 2022 07:12:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=conchuod.ie; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=Jpi+qYPVkjjgLSftDLRCVgzhzYoBkPjkNBatqeFjYP4=; b=Qq8AUk/9AWVqplZnZsraolgAwvvs+PIe6EeGfq6jN5MM2n6AruvuyymJsCkvpb+OzP DYg/NMqHsO6QTHRAmrKsuXtxegQV5ArT1zwjqST2UY7tF7wobikGXu8YTrZv50Ep0Ae3 kQ6O0X7afhbpbhHnOfxIltiwZLRErrqF5lam6sIXJu4xMzzliWzprfPqRkgZB1tMXU1/ R7yHX1sH3JLUhkX3H1H84GsxsU9S9kdPrpHmC8xt1v98s+gs4HLrQJ3K/kl6UABKJ4Rr uV7ZKh1Ouv6RetM5zMnnJz7UfMlbuOU52TAUum4YqqIrYAQSjRgz7dY13Phg2BCkc3lq qL4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=Jpi+qYPVkjjgLSftDLRCVgzhzYoBkPjkNBatqeFjYP4=; b=Rez9CC9Y8/uu7OKf0B6KsMG6FZ5u5WZWpi17Y0+/7Dy5wlecJKhTsFyTnhsyso5wl8 QomGzmz/GEiLGLBmGbyv+zaYxATZV0kpzuQOMtUBL/GrtZoXsQtewvGE/Ma6wph+1dIa t9WHWzut0hJVDk0ES6uoUbBHK8BTIJGrpaOOJPoZ17OUbjoZkHohw+cwaA9Ilev32u6d fyTapFvuaaBasSeC5gU0AkcyoVqjO23Y5tvnug+soNDedBwmNopFuv0JrV6xYheSS67z p9klHbhvyGdwNFs6eUPposXPmScCef6a4wnrrRFO0oS5kFuOtqluvSxgvJFSA1R364Qc rlaw== X-Gm-Message-State: ACgBeo2zJyFNyt+OqKqwn4b08k37OSYLUh06Q5yreTndvcUd5KfuWJyr JWgDpRftnE3xzKmpvaBJvY/TUA== X-Google-Smtp-Source: AA6agR6FYk+iY85iu6ZNNhqlEqAtS2htyInEPS/oNlnm6Idei+lVhLdGdUcw2QokwFea/pPKDyVQbg== X-Received: by 2002:adf:f90e:0:b0:21e:417b:dbd with SMTP id b14-20020adff90e000000b0021e417b0dbdmr6282420wrr.425.1660486375541; Sun, 14 Aug 2022 07:12:55 -0700 (PDT) Received: from henark71.. ([109.76.58.63]) by smtp.gmail.com with ESMTPSA id b8-20020adfde08000000b0021db7b0162esm4625419wrm.105.2022.08.14.07.12.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Aug 2022 07:12:55 -0700 (PDT) From: Conor Dooley To: Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Conor Dooley , Guo Ren , Vincent Chen , Xianting Tian , Heiko Stuebner , Kefeng Wang , Tong Tiangen , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] riscv: traps: add missing prototype Date: Sun, 14 Aug 2022 15:12:38 +0100 Message-Id: <20220814141237.493457-5-mail@conchuod.ie> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220814141237.493457-1-mail@conchuod.ie> References: <20220814141237.493457-1-mail@conchuod.ie> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Conor Dooley Sparse complains: arch/riscv/kernel/traps.c:213:6: warning: symbol 'shadow_stack' was not dec= lared. Should it be static? The variable is used in entry.S, so declare shadow_stack there alongside SHADOW_OVERFLOW_STACK_SIZE. Fixes: 31da94c25aea ("riscv: add VMAP_STACK overflow detection") Signed-off-by: Conor Dooley --- arch/riscv/include/asm/thread_info.h | 2 ++ arch/riscv/kernel/traps.c | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/= thread_info.h index 78933ac04995..67322f878e0d 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -42,6 +42,8 @@ =20 #ifndef __ASSEMBLY__ =20 +extern long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE / sizeof(long)]; + #include #include =20 diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index 39d0f8bba4b4..635e6ec26938 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -20,9 +20,10 @@ =20 #include #include +#include #include #include -#include +#include =20 int show_unhandled_signals =3D 1; =20 --=20 2.37.1