From nobody Sat Sep 21 20:16:11 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B060C25B0F for ; Sat, 13 Aug 2022 15:46:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239931AbiHMPqX (ORCPT ); Sat, 13 Aug 2022 11:46:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59808 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239925AbiHMPqB (ORCPT ); Sat, 13 Aug 2022 11:46:01 -0400 Received: from sender4-op-o14.zoho.com (sender4-op-o14.zoho.com [136.143.188.14]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 35BDF2FFF8; Sat, 13 Aug 2022 08:45:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1660405515; cv=none; d=zohomail.com; s=zohoarc; b=LHguKks0lv7vA3ueibE2h19pXiUvWhpnLecebJ4kCqKf2zVTSqc/EHbKKjX5JkIZ4uyQVRICg94O19OOVjtZ2PVvKU0d6PbQMMMyTaW7//Iz2TJCRKAlEvPRsAbv3/1OxRAFY5QmzbEkHbNhJYMLoYE1foUj4bJ1s7jlkpaR1O8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1660405515; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=zy98iC9XC2eVhC07Cr4RMR8a0qJzk56OXu8sNv2CeM4=; b=fWIYkNz00lm8ELkSMUHDxH9I2bix0PwYEFNozFALqewJ1pa/gAwh32H5lhjyJKkqMIOrcBqlcTZvbci4JVtB55uOuNrdlQaD+lv0zzThsl9SZIwQOZHGfy9nOpiaZ/xqlNYbv+g5+tovavL1aQP5EZwXeqUJTJvMZj5L/jh09R8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=arinc9.com; spf=pass smtp.mailfrom=arinc.unal@arinc9.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1660405515; s=zmail; d=arinc9.com; i=arinc.unal@arinc9.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Type:Content-Transfer-Encoding:Reply-To; bh=zy98iC9XC2eVhC07Cr4RMR8a0qJzk56OXu8sNv2CeM4=; b=Nv6cdOYAB97QZBR9N8itpcTzpPm/s3tG9Vy6oynKxXEs9XrJ92P9RBLpPspqNqvv 0IvCWV8eK1SFVihhPhCnHsrAHC3rp862bJM96iWbXKrgkPXfRUh/PL/77KRyfyPWWWl 9EfbgNjs3GhvEfq3eH8bpriH26tLjTYDwLVsip0I= Received: from arinc9-PC.lan (85.117.236.245 [85.117.236.245]) by mx.zohomail.com with SMTPS id 166040551423871.94615740500126; Sat, 13 Aug 2022 08:45:14 -0700 (PDT) From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sean Wang , Landen Chao , DENG Qingfang , Frank Wunderlich , Luiz Angelo Daros de Luca , Sander Vanheule , =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= , Daniel Golle , erkin.bozoglu@xeront.com, Sergio Paracuellos Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= Subject: [PATCH v2 6/7] dt-bindings: net: dsa: mediatek,mt7530: define phy-mode for each compatible Date: Sat, 13 Aug 2022 18:44:14 +0300 Message-Id: <20220813154415.349091-7-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220813154415.349091-1-arinc.unal@arinc9.com> References: <20220813154415.349091-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Define acceptable phy-mode values for CPU port of each compatible device. Remove relevant information from the description of the binding. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- .../bindings/net/dsa/mediatek,mt7530.yaml | 103 ++++++++++++++++-- 1 file changed, 92 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml= b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml index a27cb4fa490f..530ef5a75a2f 100644 --- a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml +++ b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml @@ -49,17 +49,6 @@ description: | * mt7621: phy-mode =3D "rgmii-txid"; * mt7623: phy-mode =3D "rgmii"; =20 - CPU-Ports need a phy-mode property: - Allowed values on mt7530 and mt7621: - - "rgmii" - - "trgmii" - On mt7531: - - "1000base-x" - - "2500base-x" - - "rgmii" - - "sgmii" - - properties: compatible: oneOf: @@ -177,6 +166,36 @@ allOf: items: - const: cpu then: + allOf: + - if: + properties: + reg: + const: 5 + then: + properties: + phy-mode: + enum: + - gmii + - mii + - rgmii + + - if: + properties: + reg: + const: 6 + then: + properties: + phy-mode: + enum: + - rgmii + - trgmii + + properties: + reg: + enum: + - 5 + - 6 + required: - phy-mode =20 @@ -206,6 +225,38 @@ allOf: items: - const: cpu then: + allOf: + - if: + properties: + reg: + const: 5 + then: + properties: + phy-mode: + enum: + - 1000base-x + - 2500base-x + - rgmii + - sgmii + + - if: + properties: + reg: + const: 6 + then: + properties: + phy-mode: + enum: + - 1000base-x + - 2500base-x + - sgmii + + properties: + reg: + enum: + - 5 + - 6 + required: - phy-mode =20 @@ -235,6 +286,36 @@ allOf: items: - const: cpu then: + allOf: + - if: + properties: + reg: + const: 5 + then: + properties: + phy-mode: + enum: + - gmii + - mii + - rgmii + + - if: + properties: + reg: + const: 6 + then: + properties: + phy-mode: + enum: + - rgmii + - trgmii + + properties: + reg: + enum: + - 5 + - 6 + required: - phy-mode =20 --=20 2.34.1