From nobody Mon Apr 13 12:01:10 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1A04C00140 for ; Fri, 12 Aug 2022 14:36:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238805AbiHLOgU (ORCPT ); Fri, 12 Aug 2022 10:36:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57336 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238764AbiHLOgS (ORCPT ); Fri, 12 Aug 2022 10:36:18 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 85ED46D9D1 for ; Fri, 12 Aug 2022 07:36:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1660314978; x=1691850978; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=NZdNw4yzR3JOq1ErSTGBTEqLp6LfEi9WXswBRDEzWOM=; b=yX9CYZhHSfR9XZkj5NUzjqqFJoTImtJFwPXsvmqoLLJo24qzJ/oNphIt Xq97fKZ09vQGbfgpOeB2ycA9FMZ3N0Lt5BozlV9TIW6JlFUEiFeQfRv8V a+hBGnJ0JZ/IMoIe4iMBQmdO+KEa+3ZZUCjlcqDqIesTZ0yCiDEWmta/0 OZSjGL1TjOdeCbMKF1iLrhSyqP+e7TjtZGC58v7Yx9ve7ggdMFtrFnEqC xnHFJUnABNTtevl8fdZA0vl1B+6wds3PJ+8aJlBTN3mHirdY5Bn8K5MGL 2OF9G5EEb0g4AX6K8/lWk32pylJnGYr1ZF4E6uMufx3aPp1mV42j1aaea A==; X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="176006453" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 12 Aug 2022 07:36:16 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Fri, 12 Aug 2022 07:35:51 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 12 Aug 2022 07:35:49 -0700 From: Conor Dooley To: Palmer Dabbelt , Palmer Dabbelt CC: Atish Patra , Anup Patel , Will Deacon , Mark Rutland , "Paul Walmsley" , Albert Ou , , , , Conor Dooley Subject: [PATCH] perf: riscv legacy: fix kerneldoc comment warning Date: Fri, 12 Aug 2022 15:35:32 +0100 Message-ID: <20220812143532.1962623-1-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Fix the warning: drivers/perf/riscv_pmu_legacy.c:76: warning: This comment starts with '/**'= , but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.= rst Fixes: 9b3e150e310e ("RISC-V: Add a simple platform driver for RISC-V legac= y perf") Signed-off-by: Conor Dooley --- drivers/perf/riscv_pmu_legacy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legac= y.c index 342778782359..2c20b0de8cb0 100644 --- a/drivers/perf/riscv_pmu_legacy.c +++ b/drivers/perf/riscv_pmu_legacy.c @@ -72,7 +72,7 @@ static void pmu_legacy_ctr_start(struct perf_event *event= , u64 ival) local64_set(&hwc->prev_count, initial_val); } =20 -/** +/* * This is just a simple implementation to allow legacy implementations * compatible with new RISC-V PMU driver framework. * This driver only allows reading two counters i.e CYCLE & INSTRET. --=20 2.36.1