From nobody Wed Dec 17 04:13:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B51EC00140 for ; Fri, 12 Aug 2022 13:52:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237883AbiHLNwX (ORCPT ); Fri, 12 Aug 2022 09:52:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40106 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231637AbiHLNwV (ORCPT ); Fri, 12 Aug 2022 09:52:21 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C9ABFA8CC7 for ; Fri, 12 Aug 2022 06:52:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1660312338; x=1691848338; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=HDcTxaIToZQYcdvOhNn0jX4NVqCzNEAbPACHR8cmaC4=; b=yd4qGOY4BcLwV1FIMNPdC3dt2SUazuQy3VqVGBcURYXm2ljSCdfAgd79 MfzRtnlKIxRfPR0jAeYms/mVVnAOlqFCmogD0yfMhoEFhY8TKCzqEN3lM Se0GE21S0MIKGhAQrRKQ0y3kmzkikY1EDwgRjTm2P4Npuw+RyGuVa5GK/ 3xTwIRghh3ZylJUY6DZGnFsTVPpI9RtQBD1p+PczhUIx8VBIyIIZuWi5E v/yc4TYJeORQPkQgI36ji/DsAIS+bVd481KIzWY9culrChwpTrtMvNLlz 3/c8pHcttHoACQ7TiWi9Gggj5cFyqYgVcca8I25ahjvxV2pO6Mjd8nr+3 g==; X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="176000719" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 12 Aug 2022 06:52:18 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 12 Aug 2022 06:52:16 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 12 Aug 2022 06:52:14 -0700 From: Conor Dooley To: Palmer Dabbelt , Palmer Dabbelt CC: Atish Patra , Anup Patel , Will Deacon , Mark Rutland , "Paul Walmsley" , Albert Ou , , , , Conor Dooley Subject: [PATCH] perf: riscv: fix broken build due to struct redefinition Date: Fri, 12 Aug 2022 14:51:20 +0100 Message-ID: <20220812135119.1648940-1-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Building riscv/for-next produces following error: drivers/perf/riscv_pmu_sbi.c:44:7: error: redefinition of 'sbi_pmu_ctr_info' union sbi_pmu_ctr_info { ^ arch/riscv/include/asm/sbi.h:125:7: note: previous definition is here union sbi_pmu_ctr_info { This appears to have been caused by a merge conflict resolution between riscv/for-next & riscv/fixes, causing the struct define not being properly moved to its header. Fixes: 9a7ccac63f9c ("perf: riscv_pmu{,_sbi}: Miscallenous improvement & fi= xes") Signed-off-by: Conor Dooley --- drivers/perf/riscv_pmu_sbi.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index e7c6fecbf061..6f6681bbfd36 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -41,20 +41,6 @@ static const struct attribute_group *riscv_pmu_attr_grou= ps[] =3D { NULL, }; =20 -union sbi_pmu_ctr_info { - unsigned long value; - struct { - unsigned long csr:12; - unsigned long width:6; -#if __riscv_xlen =3D=3D 32 - unsigned long reserved:13; -#else - unsigned long reserved:45; -#endif - unsigned long type:1; - }; -}; - /* * RISC-V doesn't have hetergenous harts yet. This need to be part of * per_cpu in case of harts with different pmu counters --=20 2.36.1