From nobody Sat Sep 21 12:50:00 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BC1CC00140 for ; Thu, 11 Aug 2022 02:58:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233683AbiHKC6u (ORCPT ); Wed, 10 Aug 2022 22:58:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233774AbiHKC62 (ORCPT ); Wed, 10 Aug 2022 22:58:28 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4C7F88DF2; Wed, 10 Aug 2022 19:58:24 -0700 (PDT) X-UUID: 254f0a8c43c140c4960f915263a4ead3-20220811 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=/kGkJO+i32RelUaoL0rep8JkKiuA3qoE/kuH2+wMJFk=; b=uEZz+1eYK8O57DgoiBQ0o85q4fZ+Vnc0yxtZZmGXooIGQI3CNtpndKuAekuns5jD+aPHQKnVIxe/la8l9J8Pahh75BNTkU2qZBYv+MbJSyuexmkYE3YRPVuJ6oFGw667foMxGMk4m6wXA2c3uCV92xvGhCgXso7sCpTW89H4gA8=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.9,REQID:2e75b857-b535-4e9b-be37-213abc38ae67,OB:0,LO B:50,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Releas e_Ham,ACTION:release,TS:100 X-CID-INFO: VERSION:1.1.9,REQID:2e75b857-b535-4e9b-be37-213abc38ae67,OB:0,LOB: 50,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS9 81B3D,ACTION:quarantine,TS:100 X-CID-META: VersionHash:3d8acc9,CLOUDID:01087cae-9535-44a6-aa9b-7f62b79b6ff6,C OID:cced3eb732e9,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 254f0a8c43c140c4960f915263a4ead3-20220811 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2099047210; Thu, 11 Aug 2022 10:58:16 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 11 Aug 2022 10:58:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 11 Aug 2022 10:58:15 +0800 From: Tinghan Shen To: Yong Wu , Joerg Roedel , "Will Deacon" , Robin Murphy , Rob Herring , Krzysztof Kozlowski , Lee Jones , "Matthias Brugger" , AngeloGioacchino Del Regno , Tinghan Shen , MandyJH Liu CC: , , , , , Subject: [PATCH v6 01/20] dt-bindings: iommu: mediatek: Increase max interrupt number Date: Thu, 11 Aug 2022 10:57:54 +0800 Message-ID: <20220811025813.21492-2-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220811025813.21492-1-tinghan.shen@mediatek.com> References: <20220811025813.21492-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" mt8195 infra iommu uses 5 interrupts. Signed-off-by: Tinghan Shen Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger --- .../bindings/iommu/mediatek,iommu.yaml | 29 ++++++++++++++----- 1 file changed, 22 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/= Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml index fee0241b50988..f5634c1642e20 100644 --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml @@ -91,7 +91,8 @@ properties: maxItems: 1 =20 interrupts: - maxItems: 1 + minItems: 1 + maxItems: 5 =20 clocks: items: @@ -183,14 +184,28 @@ allOf: required: - mediatek,infracfg =20 - - if: # The IOMMUs don't have larbs. - not: - properties: - compatible: - contains: - const: mediatek,mt8195-iommu-infra + - if: + properties: + compatible: + contains: + const: mediatek,mt8195-iommu-infra =20 then: + properties: + interrupts: + description: The IOMMU has 5 banks. Each bank has its own interr= upt. + items: + - description: The interrupt for IOMMU bank0 + - description: The interrupt for IOMMU bank1 + - description: The interrupt for IOMMU bank2 + - description: The interrupt for IOMMU bank3 + - description: The interrupt for IOMMU bank4 + + else: # For the MM IOMMU + properties: + interrupts: + maxItems: 1 + required: - mediatek,larbs =20 --=20 2.18.0