From nobody Sat Apr 11 21:11:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72BC1C00140 for ; Fri, 5 Aug 2022 13:58:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240757AbiHEN54 (ORCPT ); Fri, 5 Aug 2022 09:57:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237634AbiHEN5o (ORCPT ); Fri, 5 Aug 2022 09:57:44 -0400 Received: from relay01.th.seeweb.it (relay01.th.seeweb.it [IPv6:2001:4b7a:2000:18::162]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA92E4F1A0; Fri, 5 Aug 2022 06:57:41 -0700 (PDT) Received: from localhost.localdomain (94-209-165-62.cable.dynamic.v4.ziggo.nl [94.209.165.62]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 1565F1F684; Fri, 5 Aug 2022 15:57:39 +0200 (CEST) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Jonathan Cameron , Lars-Peter Clausen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v2 1/5] arm64: dts: qcom: pm660: Use unique ADC5_VCOIN address in node name Date: Fri, 5 Aug 2022 15:57:25 +0200 Message-Id: <20220805135729.1037079-2-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220805135729.1037079-1-marijn.suijten@somainline.org> References: <20220805135729.1037079-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The register address in the node name is shadowing vph_pwr@83, whereas the ADC5_VCOIN register resolves to 0x85. Fix this copy-paste discrepancy. Fixes: 4bf097540506 ("arm64: dts: qcom: pm660: Add VADC and temp alarm node= s") Signed-off-by: Marijn Suijten Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/qcom/pm660.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/pm660.dtsi b/arch/arm64/boot/dts/qcom= /pm660.dtsi index c482663aad56..42f9c51b9c1e 100644 --- a/arch/arm64/boot/dts/qcom/pm660.dtsi +++ b/arch/arm64/boot/dts/qcom/pm660.dtsi @@ -163,7 +163,7 @@ vadc_vph_pwr: vph_pwr@83 { qcom,pre-scaling =3D <1 3>; }; =20 - vcoin: vcoin@83 { + vcoin: vcoin@85 { reg =3D ; qcom,decimation =3D <1024>; qcom,pre-scaling =3D <1 3>; --=20 2.37.1 From nobody Sat Apr 11 21:11:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28B65C28B2B for ; Fri, 5 Aug 2022 13:57:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238027AbiHEN5s (ORCPT ); Fri, 5 Aug 2022 09:57:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236932AbiHEN5n (ORCPT ); Fri, 5 Aug 2022 09:57:43 -0400 Received: from relay02.th.seeweb.it (relay02.th.seeweb.it [IPv6:2001:4b7a:2000:18::163]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1B0E51439 for ; Fri, 5 Aug 2022 06:57:41 -0700 (PDT) Received: from localhost.localdomain (94-209-165-62.cable.dynamic.v4.ziggo.nl [94.209.165.62]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id C6A441FAA7; Fri, 5 Aug 2022 15:57:39 +0200 (CEST) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Jonathan Cameron , Lars-Peter Clausen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v2 2/5] iio: adc: qcom-spmi-adc5: Add missing VCOIN/GPIO[134] channels Date: Fri, 5 Aug 2022 15:57:26 +0200 Message-Id: <20220805135729.1037079-3-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220805135729.1037079-1-marijn.suijten@somainline.org> References: <20220805135729.1037079-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" These channels are specified in downstream kernels [1] and actively used by e.g. the Sony Seine platform on the SM6125 SoC. Note that GPIO2 isn't used on this platform and, while the definition downstream is identical to the other GPIOx_100K_PU definitions, has been omitted for lack of proper testing. [1]: https://source.codeaurora.org/quic/la/kernel/msm-4.14/tree/drivers/iio= /adc/qcom-spmi-adc5.c?h=3DLA.UM.7.11.r1-05200-NICOBAR.0#n688 Signed-off-by: Marijn Suijten Reviewed-by: AngeloGioacchino Del Regno --- drivers/iio/adc/qcom-spmi-adc5.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-a= dc5.c index 87438d1e5c0b..0dc4fe612433 100644 --- a/drivers/iio/adc/qcom-spmi-adc5.c +++ b/drivers/iio/adc/qcom-spmi-adc5.c @@ -526,6 +526,8 @@ static const struct adc5_channels adc5_chans_pmic[ADC5_= MAX_CHANNEL] =3D { SCALE_HW_CALIB_DEFAULT) [ADC5_VBAT_SNS] =3D ADC5_CHAN_VOLT("vbat_sns", 1, SCALE_HW_CALIB_DEFAULT) + [ADC5_VCOIN] =3D ADC5_CHAN_VOLT("vcoin", 1, + SCALE_HW_CALIB_DEFAULT) [ADC5_DIE_TEMP] =3D ADC5_CHAN_TEMP("die_temp", 0, SCALE_HW_CALIB_PMIC_THERM) [ADC5_USB_IN_I] =3D ADC5_CHAN_VOLT("usb_in_i_uv", 0, @@ -549,6 +551,12 @@ static const struct adc5_channels adc5_chans_pmic[ADC5= _MAX_CHANNEL] =3D { SCALE_HW_CALIB_THERM_100K_PULLUP) [ADC5_AMUX_THM2] =3D ADC5_CHAN_TEMP("amux_thm2", 0, SCALE_HW_CALIB_PM5_SMB_TEMP) + [ADC5_GPIO1_100K_PU] =3D ADC5_CHAN_TEMP("gpio1_100k_pu", 0, + SCALE_HW_CALIB_THERM_100K_PULLUP) + [ADC5_GPIO3_100K_PU] =3D ADC5_CHAN_TEMP("gpio3_100k_pu", 0, + SCALE_HW_CALIB_THERM_100K_PULLUP) + [ADC5_GPIO4_100K_PU] =3D ADC5_CHAN_TEMP("gpio4_100k_pu", 0, + SCALE_HW_CALIB_THERM_100K_PULLUP) }; =20 static const struct adc5_channels adc7_chans_pmic[ADC5_MAX_CHANNEL] =3D { --=20 2.37.1 From nobody Sat Apr 11 21:11:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 989E1C00140 for ; Fri, 5 Aug 2022 13:58:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240811AbiHEN6M (ORCPT ); Fri, 5 Aug 2022 09:58:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60858 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238142AbiHEN5q (ORCPT ); Fri, 5 Aug 2022 09:57:46 -0400 Received: from relay01.th.seeweb.it (relay01.th.seeweb.it [5.144.164.162]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C69635004E; Fri, 5 Aug 2022 06:57:43 -0700 (PDT) Received: from localhost.localdomain (94-209-165-62.cable.dynamic.v4.ziggo.nl [94.209.165.62]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id E3A791FAF9; Fri, 5 Aug 2022 15:57:40 +0200 (CEST) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Jonathan Cameron , Lars-Peter Clausen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v2 3/5] arm64: dts: qcom: Add PM6125 PMIC Date: Fri, 5 Aug 2022 15:57:27 +0200 Message-Id: <20220805135729.1037079-4-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220805135729.1037079-1-marijn.suijten@somainline.org> References: <20220805135729.1037079-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This PMIC is commonly used on boards with an SM6125 SoC and looks very similar in layout to the PM6150. Downstream declares more nodes to be available, but these have been omitted from this patch: the pwm/lpg block is unused on my reference device making it impossible to test/validate, and the spmi-clkdiv does not have a single device-tree binding using this driver yet, hence inclusion is better postponed until ie. audio which uses these clocks is brought up. Signed-off-by: Marijn Suijten Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pm6125.dtsi | 154 +++++++++++++++++++++++++++ 1 file changed, 154 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm6125.dtsi diff --git a/arch/arm64/boot/dts/qcom/pm6125.dtsi b/arch/arm64/boot/dts/qco= m/pm6125.dtsi new file mode 100644 index 000000000000..25ef15fbfda7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm6125.dtsi @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: BSD-3-Clause + +#include +#include +#include +#include +#include + +/ { + thermal-zones { + pm6125-thermal { + polling-delay-passive =3D <100>; + polling-delay =3D <0>; + + thermal-sensors =3D <&pm6125_temp>; + + trips { + trip0 { + temperature =3D <95000>; + hysteresis =3D <0>; + type =3D "passive"; + }; + + trip1 { + temperature =3D <115000>; + hysteresis =3D <0>; + type =3D "hot"; + }; + + trip2 { + temperature =3D <145000>; + hysteresis =3D <0>; + type =3D "critical"; + }; + }; + }; + }; +}; + +&spmi_bus { + pmic@0 { + compatible =3D "qcom,pm6125", "qcom,spmi-pmic"; + reg =3D <0x0 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pm6125_pon: pon@800 { + compatible =3D "qcom,pm8998-pon"; + reg =3D <0x800>; + mode-bootloader =3D <0x2>; + mode-recovery =3D <0x1>; + + pon_pwrkey: pwrkey { + compatible =3D "qcom,pm8941-pwrkey"; + interrupts =3D <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>; + debounce =3D <15625>; + linux,code =3D ; + bias-pull-up; + status =3D "disabled"; + }; + + pon_resin: resin { + compatible =3D "qcom,pm8941-resin"; + interrupts =3D <0x0 0x8 0x1 IRQ_TYPE_EDGE_BOTH>; + debounce =3D <15625>; + bias-pull-up; + status =3D "disabled"; + }; + }; + + pm6125_temp: temp-alarm@2400 { + compatible =3D "qcom,spmi-temp-alarm"; + reg =3D <0x2400>; + interrupts =3D <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels =3D <&pm6125_adc ADC5_DIE_TEMP>; + io-channel-names =3D "thermal"; + #thermal-sensor-cells =3D <0>; + }; + + pm6125_adc: adc@3100 { + compatible =3D "qcom,spmi-adc5"; + reg =3D <0x3100>; + #address-cells =3D <1>; + #size-cells =3D <0>; + interrupts =3D <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells =3D <1>; + + ref-gnd@0 { + reg =3D ; + qcom,pre-scaling =3D <1 1>; + }; + + vref-1p25@1 { + reg =3D ; + qcom,pre-scaling =3D <1 1>; + }; + + die-temp@6 { + reg =3D ; + qcom,pre-scaling =3D <1 1>; + }; + + vph-pwr@83 { + reg =3D ; + qcom,pre-scaling =3D <1 3>; + }; + + vcoin@85 { + reg =3D ; + qcom,pre-scaling =3D <1 3>; + }; + + xo-therm@4c { + reg =3D ; + qcom,pre-scaling =3D <1 1>; + qcom,hw-settle-time =3D <200>; + qcom,ratiometric; + }; + }; + + pm6125_adc_tm: adc-tm@3500 { + compatible =3D "qcom,spmi-adc-tm5"; + reg =3D <0x3500>; + interrupts =3D <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells =3D <1>; + #size-cells =3D <0>; + #thermal-sensor-cells =3D <1>; + status =3D "disabled"; + }; + + pm6125_rtc: rtc@6000 { + compatible =3D "qcom,pm8941-rtc"; + reg =3D <0x6000>, <0x6100>; + reg-names =3D "rtc", "alarm"; + interrupts =3D <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; + status =3D "disabled"; + }; + + pm6125_gpio: gpios@c000 { + compatible =3D "qcom,pm6125-gpio", "qcom,spmi-gpio"; + reg =3D <0xc000>; + gpio-controller; + gpio-ranges =3D <&pm6125_gpio 0 0 9>; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + + pmic@1 { + compatible =3D "qcom,pm6125", "qcom,spmi-pmic"; + reg =3D <0x1 SPMI_USID>; + }; +}; --=20 2.37.1 From nobody Sat Apr 11 21:11:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C301C00140 for ; Fri, 5 Aug 2022 13:58:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240798AbiHEN6J (ORCPT ); Fri, 5 Aug 2022 09:58:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231492AbiHEN5q (ORCPT ); Fri, 5 Aug 2022 09:57:46 -0400 Received: from relay02.th.seeweb.it (relay02.th.seeweb.it [5.144.164.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C83A152DE1 for ; Fri, 5 Aug 2022 06:57:43 -0700 (PDT) Received: from localhost.localdomain (94-209-165-62.cable.dynamic.v4.ziggo.nl [94.209.165.62]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id AEA3E1FBB2; Fri, 5 Aug 2022 15:57:41 +0200 (CEST) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Jonathan Cameron , Lars-Peter Clausen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v2 4/5] arm64: dts: qcom: sm6125-seine: Include PM6125 and configure PON Date: Fri, 5 Aug 2022 15:57:28 +0200 Message-Id: <20220805135729.1037079-5-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220805135729.1037079-1-marijn.suijten@somainline.org> References: <20220805135729.1037079-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Sony Xperia Seine board uses the PM6125; include it and configure the PON buttons that provide the power and volume-up key. Signed-off-by: Marijn Suijten Reviewed-by: AngeloGioacchino Del Regno --- .../boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b= /arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts index 038970c0b68e..c5967140d028 100644 --- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts +++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts @@ -6,8 +6,8 @@ /dts-v1/; =20 #include "sm6125.dtsi" +#include "pm6125.dtsi" #include -#include #include =20 / { @@ -88,6 +88,15 @@ &hsusb_phy1 { status =3D "okay"; }; =20 +&pon_pwrkey { + status =3D "okay"; +}; + +&pon_resin { + status =3D "okay"; + linux,code =3D ; +}; + &sdc2_off_state { sd-cd { pins =3D "gpio98"; --=20 2.37.1 From nobody Sat Apr 11 21:11:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8655C00140 for ; Fri, 5 Aug 2022 13:58:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240851AbiHEN6R (ORCPT ); Fri, 5 Aug 2022 09:58:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60856 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236440AbiHEN5q (ORCPT ); Fri, 5 Aug 2022 09:57:46 -0400 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [5.144.164.164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5BD752DD2; Fri, 5 Aug 2022 06:57:44 -0700 (PDT) Received: from localhost.localdomain (94-209-165-62.cable.dynamic.v4.ziggo.nl [94.209.165.62]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 806B11FBC6; Fri, 5 Aug 2022 15:57:42 +0200 (CEST) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Jonathan Cameron , Lars-Peter Clausen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v2 5/5] arm64: dts: qcom: sm6125-seine: Configure additional trinket thermistors Date: Fri, 5 Aug 2022 15:57:29 +0200 Message-Id: <20220805135729.1037079-6-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220805135729.1037079-1-marijn.suijten@somainline.org> References: <20220805135729.1037079-1-marijn.suijten@somainline.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In addition to PMIC-specific (pm6125) thermistors downstream extends this set with the rf-pa0/rf-pa1, quiet, camera-flash and UFS/eMMC thermistors in sm6125 (trinket) board and seine-specific DT files. All thermistors report sensible temperature readings in userspace. The sensors are also added to their respective Thermal Monitor node, with thermal zones to match where applicable: emmc-ufs and camera-flash are not available on the TM5 block, hence cannot be configured with a tripping point and will not have a thermal zone. Signed-off-by: Marijn Suijten Reviewed-by: AngeloGioacchino Del Regno --- .../qcom/sm6125-sony-xperia-seine-pdx201.dts | 151 ++++++++++++++++++ 1 file changed, 151 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b= /arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts index c5967140d028..bfeea20fdd4f 100644 --- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts +++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts @@ -9,6 +9,7 @@ #include "pm6125.dtsi" #include #include +#include =20 / { /* required for bootloader to select correct board */ @@ -82,12 +83,162 @@ cmdline_mem: memory@ffd00000 { no-map; }; }; + + thermal-zones { + rf-pa0-thermal { + polling-delay-passive =3D <0>; + polling-delay =3D <0>; + thermal-sensors =3D <&pm6125_adc_tm 0>; + + trips { + active-config0 { + temperature =3D <125000>; + hysteresis =3D <1000>; + type =3D "critical"; + }; + }; + }; + + quiet-thermal { + polling-delay-passive =3D <0>; + polling-delay =3D <5000>; + thermal-sensors =3D <&pm6125_adc_tm 1>; + + trips { + active-config0 { + temperature =3D <125000>; + hysteresis =3D <1000>; + type =3D "critical"; + }; + }; + }; + + xo-thermal { + polling-delay-passive =3D <0>; + polling-delay =3D <0>; + thermal-sensors =3D <&pm6125_adc_tm 2>; + + trips { + active-config0 { + temperature =3D <125000>; + hysteresis =3D <1000>; + type =3D "critical"; + }; + }; + }; + + rf-pa1-thermal { + polling-delay-passive =3D <0>; + polling-delay =3D <0>; + thermal-sensors =3D <&pm6125_adc_tm 3>; + + trips { + active-config0 { + temperature =3D <125000>; + hysteresis =3D <1000>; + type =3D "critical"; + }; + }; + }; + }; }; =20 &hsusb_phy1 { status =3D "okay"; }; =20 +&pm6125_adc { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&camera_flash_therm &emmc_ufs_therm &rf_pa1_therm>; + + rf-pa0-therm@4d { + reg =3D ; + qcom,ratiometric; + qcom,hw-settle-time =3D <200>; + qcom,pre-scaling =3D <1 1>; + }; + + quiet-therm@4e { + reg =3D ; + qcom,ratiometric; + qcom,hw-settle-time =3D <200>; + qcom,pre-scaling =3D <1 1>; + }; + + camera-flash-therm@52 { + reg =3D ; + qcom,ratiometric; + qcom,hw-settle-time =3D <200>; + qcom,pre-scaling =3D <1 1>; + }; + + emmc-ufs-therm@54 { + reg =3D ; + qcom,ratiometric; + qcom,hw-settle-time =3D <200>; + qcom,pre-scaling =3D <1 1>; + }; + + rf-pa1-therm@55 { + reg =3D ; + qcom,ratiometric; + qcom,hw-settle-time =3D <200>; + qcom,pre-scaling =3D <1 1>; + }; +}; + +&pm6125_adc_tm { + status =3D "okay"; + + rf-pa0-therm@0 { + reg =3D <0>; + io-channels =3D <&pm6125_adc ADC5_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us =3D <200>; + }; + + quiet-therm@1 { + reg =3D <1>; + io-channels =3D <&pm6125_adc ADC5_AMUX_THM2_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us =3D <200>; + }; + + xo-therm@2 { + reg =3D <2>; + io-channels =3D <&pm6125_adc ADC5_XO_THERM_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us =3D <200>; + }; + + rf-pa1-therm@3 { + reg =3D <3>; + io-channels =3D <&pm6125_adc ADC5_GPIO4_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us =3D <200>; + }; +}; + +&pm6125_gpio { + camera_flash_therm: camera-flash-therm-state { + pins =3D "gpio3"; + function =3D PMIC_GPIO_FUNC_NORMAL; + bias-high-impedance; + }; + + emmc_ufs_therm: emmc-ufs-therm-state { + pins =3D "gpio6"; + function =3D PMIC_GPIO_FUNC_NORMAL; + bias-high-impedance; + }; + + rf_pa1_therm: rf-pa1-therm-state { + pins =3D "gpio7"; + function =3D PMIC_GPIO_FUNC_NORMAL; + bias-high-impedance; + }; +}; + &pon_pwrkey { status =3D "okay"; }; --=20 2.37.1