From nobody Sat Sep 21 21:24:43 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76CBCC19F29 for ; Thu, 4 Aug 2022 02:16:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239324AbiHDCQ5 (ORCPT ); Wed, 3 Aug 2022 22:16:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45768 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238947AbiHDCQI (ORCPT ); Wed, 3 Aug 2022 22:16:08 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3A015F9A9; Wed, 3 Aug 2022 19:16:06 -0700 (PDT) X-UUID: 28d6e2d29fe14d4ab41b28b25469f192-20220804 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=hSxveSoM+vlc9FGeY7IaDK3X39Jv798KY/+ZsIbLEII=; b=er9XExzWJeCOurmtnXR9+buOkdXOTPCZjfVwo9LmuTSWulGqIVKoIA5ylx+5lTY55HIWe76pmbd4xYNZpwkfgQxGf2v1HF4a2Vdr1S4Dd/GsTmL/llxUOwCM2WL+IZ5EYJwyVDBtQOFAJea5DI7yO7keze6PJFCucd5pVfqhOXE=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.8,REQID:1fff8a1a-35f2-4695-9333-27eebdbcd2ff,OB:30,L OB:10,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham, ACTION:release,TS:90 X-CID-INFO: VERSION:1.1.8,REQID:1fff8a1a-35f2-4695-9333-27eebdbcd2ff,OB:30,LOB :10,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D, ACTION:quarantine,TS:90 X-CID-META: VersionHash:0f94e32,CLOUDID:7f432cd1-841b-4e95-ad42-8f86e18f54fc,C OID:a79384265421,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,QS:nil,BEC:nil,COL:0 X-UUID: 28d6e2d29fe14d4ab41b28b25469f192-20220804 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1960739390; Thu, 04 Aug 2022 10:15:58 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Thu, 4 Aug 2022 10:15:57 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 4 Aug 2022 10:15:57 +0800 From: Tinghan Shen To: Yong Wu , Joerg Roedel , "Will Deacon" , Robin Murphy , Rob Herring , Krzysztof Kozlowski , Lee Jones , "Matthias Brugger" , AngeloGioacchino Del Regno , Tinghan Shen , MandyJH Liu CC: , , , , , , Henry Chen Subject: [PATCH v5 13/20] arm64: dts: mt8195: Add spmi node Date: Thu, 4 Aug 2022 10:15:46 +0800 Message-ID: <20220804021553.14867-14-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220804021553.14867-1-tinghan.shen@mediatek.com> References: <20220804021553.14867-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add spmi node to mt8195. Signed-off-by: Henry Chen Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 7e77aecb1296e..da2d976ff8441 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -697,6 +697,21 @@ assigned-clock-parents =3D <&topckgen CLK_TOP_ULPOSC1_D10>; }; =20 + spmi: spmi@10027000 { + compatible =3D "mediatek,mt8195-spmi"; + reg =3D <0 0x10027000 0 0x000e00>, + <0 0x10029000 0 0x000100>; + reg-names =3D "pmif", "spmimst"; + clocks =3D <&infracfg_ao CLK_INFRA_AO_PMIC_AP>, + <&infracfg_ao CLK_INFRA_AO_PMIC_TMR>, + <&topckgen CLK_TOP_SPMI_M_MST>; + clock-names =3D "pmif_sys_ck", + "pmif_tmr_ck", + "spmimst_clk_mux"; + assigned-clocks =3D <&topckgen CLK_TOP_PWRAP_ULPOSC>; + assigned-clock-parents =3D <&topckgen CLK_TOP_ULPOSC1_D10>; + }; + scp_adsp: clock-controller@10720000 { compatible =3D "mediatek,mt8195-scp_adsp"; reg =3D <0 0x10720000 0 0x1000>; --=20 2.18.0