From nobody Sat Apr 11 23:08:13 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29307C19F2D for ; Wed, 3 Aug 2022 22:50:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238410AbiHCWuK (ORCPT ); Wed, 3 Aug 2022 18:50:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238115AbiHCWuF (ORCPT ); Wed, 3 Aug 2022 18:50:05 -0400 Received: from mail-pj1-x104a.google.com (mail-pj1-x104a.google.com [IPv6:2607:f8b0:4864:20::104a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 137702AC52 for ; Wed, 3 Aug 2022 15:50:04 -0700 (PDT) Received: by mail-pj1-x104a.google.com with SMTP id o18-20020a17090aac1200b001f3252af009so1760935pjq.7 for ; Wed, 03 Aug 2022 15:50:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:reply-to:from:to:cc; bh=oBCv022ttB7721Z3didtrTXQbQIFya4DDNpwzpvFOME=; b=nRGmFYXYob2GdMUmzVPtyDqEUR4f1txFj3eI4VVHWcJD5TA26Ng57GTnR4wknp5irR 0OjY1XipvycfJdRNf4cc71TTbsTPrBJeUVhTaCTBop1TxwnSpeZOMIPzmYbk8/os/5H2 dZGzbuS51W74pjnEjrCc420YzLoWTRHYj3jfXF2zQ0Sxqd7lA2Vc9qoeRkuYRxytuf4B wC87A7OWoSqN281vU9v6pWnZog8E6ukhTBQTVMdRgoOdiosuA/Wmy0a3Fxj8wrqdhsDu 5GzDArttSXC1Av+hAzUYdVU5L2QaGTQvgtdlS6A8hDClbG1w3kyjHoNyZ8+b2nY0kvAs WPqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc; bh=oBCv022ttB7721Z3didtrTXQbQIFya4DDNpwzpvFOME=; b=MEs94EAz7DQk/kJz+U+uIYcbKty52i6gU78DvPZfTJe5hdCJOvQPjf+Y4/4jsyTL4K A0ecWcynwpgFrkBrGxWIDrLQ4HzFoJYXGCy2eIxRBHUKVw9NE/SNx1+8CG1cgzXACD3g t29+zkeVW4QTF8UVV2dzfefFpx9d9cPZmOi4ojR6SBSeuTpFjiEhxV+ATZO7GutRWifF svjhGxYz543ySssgO3rk3XnP7Sr0+glOICpF3cYJ3sgFv40SPNNfXkW7iFTlfV8uhFxk We5vRO+Dk3VsdkLCLH7PyZdMRp+y3QV7e2DcxC0SrGrK5g1/dCLUd30mNZRBbMLa3ml1 wzBA== X-Gm-Message-State: ACgBeo1cNmfOjcQa8zmlQUy8W4UJMUw7bBnxN7eKy4k7OkNrdKK4zvzw aRaSOtakOdOtJTDSvAM4ohnpBDoAJxw= X-Google-Smtp-Source: AA6agR7zPv57RHjUR3ZuU8Q/z+8q2Zn/VqyRgZ6WKpbjtCSR6GN6cuMeCSID45bhPnD2EN5qVoBQ84eyTR4= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:2303:b0:52e:526e:10e3 with SMTP id h3-20020a056a00230300b0052e526e10e3mr2678199pfh.77.1659567003637; Wed, 03 Aug 2022 15:50:03 -0700 (PDT) Reply-To: Sean Christopherson Date: Wed, 3 Aug 2022 22:49:55 +0000 In-Reply-To: <20220803224957.1285926-1-seanjc@google.com> Message-Id: <20220803224957.1285926-2-seanjc@google.com> Mime-Version: 1.0 References: <20220803224957.1285926-1-seanjc@google.com> X-Mailer: git-send-email 2.37.1.559.g78731f0fdb-goog Subject: [PATCH v2 1/3] KVM: x86: Tag kvm_mmu_x86_module_init() with __init From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kai Huang , Michael Roth , Tom Lendacky Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Mark kvm_mmu_x86_module_init() with __init, the entire reason it exists is to initialize variables when kvm.ko is loaded, i.e. it must never be called after module initialization. Fixes: 1d0e84806047 ("KVM: x86/mmu: Resolve nx_huge_pages when kvm.ko is lo= aded") Cc: stable@vger.kernel.org Reviewed-by: Kai Huang Tested-by: Michael Roth Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_host.h | 2 +- arch/x86/kvm/mmu/mmu.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index e8281d64a431..5ffa578cafe1 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1704,7 +1704,7 @@ static inline int kvm_arch_flush_remote_tlb(struct kv= m *kvm) #define kvm_arch_pmi_in_guest(vcpu) \ ((vcpu) && (vcpu)->arch.handling_intr_from_guest) =20 -void kvm_mmu_x86_module_init(void); +void __init kvm_mmu_x86_module_init(void); int kvm_mmu_vendor_module_init(void); void kvm_mmu_vendor_module_exit(void); =20 diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 3e1317325e1f..bf808107a56b 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -6700,7 +6700,7 @@ static int set_nx_huge_pages(const char *val, const s= truct kernel_param *kp) * nx_huge_pages needs to be resolved to true/false when kvm.ko is loaded,= as * its default value of -1 is technically undefined behavior for a boolean. */ -void kvm_mmu_x86_module_init(void) +void __init kvm_mmu_x86_module_init(void) { if (nx_huge_pages =3D=3D -1) __set_nx_huge_pages(get_nx_auto_mode()); --=20 2.37.1.559.g78731f0fdb-goog From nobody Sat Apr 11 23:08:13 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B673C19F2B for ; Wed, 3 Aug 2022 22:50:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238501AbiHCWuN (ORCPT ); Wed, 3 Aug 2022 18:50:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37114 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238301AbiHCWuH (ORCPT ); Wed, 3 Aug 2022 18:50:07 -0400 Received: from mail-pj1-x1049.google.com (mail-pj1-x1049.google.com [IPv6:2607:f8b0:4864:20::1049]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A58832AC52 for ; Wed, 3 Aug 2022 15:50:06 -0700 (PDT) Received: by mail-pj1-x1049.google.com with SMTP id 1-20020a17090a190100b001f05565f004so7841132pjg.0 for ; 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Wed, 03 Aug 2022 15:50:05 -0700 (PDT) Reply-To: Sean Christopherson Date: Wed, 3 Aug 2022 22:49:56 +0000 In-Reply-To: <20220803224957.1285926-1-seanjc@google.com> Message-Id: <20220803224957.1285926-3-seanjc@google.com> Mime-Version: 1.0 References: <20220803224957.1285926-1-seanjc@google.com> X-Mailer: git-send-email 2.37.1.559.g78731f0fdb-goog Subject: [PATCH v2 2/3] KVM: x86/mmu: Fully re-evaluate MMIO caching when SPTE masks change From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kai Huang , Michael Roth , Tom Lendacky Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Fully re-evaluate whether or not MMIO caching can be enabled when SPTE masks change; simply clearing enable_mmio_caching when a configuration isn't compatible with caching fails to handle the scenario where the masks are updated, e.g. by VMX for EPT or by SVM to account for the C-bit location, and toggle compatibility from false=3D>true. Snapshot the original module param so that re-evaluating MMIO caching preserves userspace's desire to allow caching. Use a snapshot approach so that enable_mmio_caching still reflects KVM's actual behavior. Fixes: 8b9e74bfbf8c ("KVM: x86/mmu: Use enable_mmio_caching to track if MMI= O caching is enabled") Reported-by: Michael Roth Cc: Tom Lendacky Cc: stable@vger.kernel.org Tested-by: Michael Roth Signed-off-by: Sean Christopherson Reviewed-by: Kai Huang --- arch/x86/kvm/mmu/mmu.c | 4 ++++ arch/x86/kvm/mmu/spte.c | 19 +++++++++++++++++++ arch/x86/kvm/mmu/spte.h | 1 + 3 files changed, 24 insertions(+) diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index bf808107a56b..48f34016cb0b 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -6699,11 +6699,15 @@ static int set_nx_huge_pages(const char *val, const= struct kernel_param *kp) /* * nx_huge_pages needs to be resolved to true/false when kvm.ko is loaded,= as * its default value of -1 is technically undefined behavior for a boolean. + * Forward the module init call to SPTE code so that it too can handle mod= ule + * params that need to be resolved/snapshot. */ void __init kvm_mmu_x86_module_init(void) { if (nx_huge_pages =3D=3D -1) __set_nx_huge_pages(get_nx_auto_mode()); + + kvm_mmu_spte_module_init(); } =20 /* diff --git a/arch/x86/kvm/mmu/spte.c b/arch/x86/kvm/mmu/spte.c index 7314d27d57a4..66f76f5a15bd 100644 --- a/arch/x86/kvm/mmu/spte.c +++ b/arch/x86/kvm/mmu/spte.c @@ -20,6 +20,7 @@ #include =20 bool __read_mostly enable_mmio_caching =3D true; +static bool __ro_after_init allow_mmio_caching; module_param_named(mmio_caching, enable_mmio_caching, bool, 0444); =20 u64 __read_mostly shadow_host_writable_mask; @@ -43,6 +44,18 @@ u64 __read_mostly shadow_nonpresent_or_rsvd_lower_gfn_ma= sk; =20 u8 __read_mostly shadow_phys_bits; =20 +void __init kvm_mmu_spte_module_init(void) +{ + /* + * Snapshot userspace's desire to allow MMIO caching. Whether or not + * KVM can actually enable MMIO caching depends on vendor-specific + * hardware capabilities and other module params that can't be resolved + * until the vendor module is loaded, i.e. enable_mmio_caching can and + * will change when the vendor module is (re)loaded. + */ + allow_mmio_caching =3D enable_mmio_caching; +} + static u64 generation_mmio_spte_mask(u64 gen) { u64 mask; @@ -340,6 +353,12 @@ void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mm= io_mask, u64 access_mask) BUG_ON((u64)(unsigned)access_mask !=3D access_mask); WARN_ON(mmio_value & shadow_nonpresent_or_rsvd_lower_gfn_mask); =20 + /* + * Reset to the original module param value to honor userspace's desire + * to (dis)allow MMIO caching. Update the param itself so that + * userspace can see whether or not KVM is actually using MMIO caching. + */ + enable_mmio_caching =3D allow_mmio_caching; if (!enable_mmio_caching) mmio_value =3D 0; =20 diff --git a/arch/x86/kvm/mmu/spte.h b/arch/x86/kvm/mmu/spte.h index cabe3fbb4f39..26b144ffd146 100644 --- a/arch/x86/kvm/mmu/spte.h +++ b/arch/x86/kvm/mmu/spte.h @@ -450,6 +450,7 @@ static inline u64 restore_acc_track_spte(u64 spte) =20 u64 kvm_mmu_changed_pte_notifier_make_spte(u64 old_spte, kvm_pfn_t new_pfn= ); =20 +void __init kvm_mmu_spte_module_init(void); void kvm_mmu_reset_all_pte_masks(void); =20 #endif --=20 2.37.1.559.g78731f0fdb-goog From nobody Sat Apr 11 23:08:13 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A7EBC19F2B for ; Wed, 3 Aug 2022 22:50:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238600AbiHCWuR (ORCPT ); Wed, 3 Aug 2022 18:50:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37184 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238388AbiHCWuJ (ORCPT ); Wed, 3 Aug 2022 18:50:09 -0400 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4483A481F0 for ; Wed, 3 Aug 2022 15:50:08 -0700 (PDT) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-3238ce833beso137893357b3.11 for ; Wed, 03 Aug 2022 15:50:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:reply-to:from:to:cc; bh=SPa2O+7Mze0bsq8ap8FmcbiFuFSXZGJKxHFkzvC7sT8=; b=mDV2yaRQ40EVKU/eNX/FCSCMbrm3jI3NTGk+xe5bhVD9DzGKwvGcHuXotUJbowBoaE cjVjtTKgs+CH4nn/bvEP5KVZaboce2sBNMMbfqK5N22Xgtj95BsewTqXyj4tixPlQBbJ l3adCyQl/4S9dz7hR29gXjSqueoATUfHAqSZEJPnLhsA3taMs/cB89DrBOigZpQjNgqp A9NALz2pEEzsY/k8KKqZ2eld7+xe8ZT32e4cDLzMxXjPhEDbyrIB4WACv4XOGoNX8mlK Rak3qAyp2O3eDEn9wVvJq8MXcgd95xZKoXMARo54eAS1dPnbfMTY8jfp1AGf8mI69jRP hofQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc; bh=SPa2O+7Mze0bsq8ap8FmcbiFuFSXZGJKxHFkzvC7sT8=; b=SHBq8Dd7KFLQWJ5FqqnkeW95POL/B85JCKHzQ/omMNDkQuk6/f7IUpE2ayRZ7frdzk S6Y3OwL4GUqT7bTTlbUrrv0h+mRZexX340qcE84f2peP6/6nPeqluAc57KDRxgj87Usn 7YvU5m5vfAwboQaCJXDWhNlGLQ52jwD8dBr27LPxYJ8q5K97o9WZrTY/Vk6o0D1psL9Z HpULBgpaZthBAYsmQVtY6WG6miXuc3TzQk9bOUszw4+Lrf0AiW4DO7+r+jMlyKKL/Yyr X7u6mGlu+/ECUl4AWqcxGxR3cT0KhCUTGR3sO1HyIqTAt7mPaRNAN/W4RSHOE/XMn4yu CA6Q== X-Gm-Message-State: ACgBeo0+u812B0ybCpxpsqaigvIA5ddwkJWaAvh64YZyDmcRqJJJ0RfQ vLnyAUMNwcU3mhupQSCnAY5c2X+da3s= X-Google-Smtp-Source: AA6agR4vvYuZchZorwqNL4ADWM2SVsdXLpazfIk0/fo45JEQlQw8DGJMrYjsMUzBSUry6w5MQIFt772ped0= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:7a82:0:b0:671:6802:fb8d with SMTP id v124-20020a257a82000000b006716802fb8dmr20992881ybc.224.1659567007526; Wed, 03 Aug 2022 15:50:07 -0700 (PDT) Reply-To: Sean Christopherson Date: Wed, 3 Aug 2022 22:49:57 +0000 In-Reply-To: <20220803224957.1285926-1-seanjc@google.com> Message-Id: <20220803224957.1285926-4-seanjc@google.com> Mime-Version: 1.0 References: <20220803224957.1285926-1-seanjc@google.com> X-Mailer: git-send-email 2.37.1.559.g78731f0fdb-goog Subject: [PATCH v2 3/3] KVM: SVM: Disable SEV-ES support if MMIO caching is disable From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kai Huang , Michael Roth , Tom Lendacky Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Disable SEV-ES if MMIO caching is disabled as SEV-ES relies on MMIO SPTEs generating #NPF(RSVD), which are reflected by the CPU into the guest as a #VC. With SEV-ES, the untrusted host, a.k.a. KVM, doesn't have access to the guest instruction stream or register state and so can't directly emulate in response to a #NPF on an emulated MMIO GPA. Disabling MMIO caching means guest accesses to emulated MMIO ranges cause #NPF(!PRESENT), and those flavors of #NPF cause automatic VM-Exits, not #VC. Adjust KVM's MMIO masks to account for the C-bit location prior to doing SEV(-ES) setup, and document that dependency between adjusting the MMIO SPTE mask and SEV(-ES) setup. Fixes: b09763da4dd8 ("KVM: x86/mmu: Add module param to disable MMIO cachin= g (for testing)") Reported-by: Michael Roth Tested-by: Michael Roth Cc: Tom Lendacky Cc: stable@vger.kernel.org Signed-off-by: Sean Christopherson --- arch/x86/kvm/mmu.h | 2 ++ arch/x86/kvm/mmu/spte.c | 1 + arch/x86/kvm/mmu/spte.h | 2 -- arch/x86/kvm/svm/sev.c | 10 ++++++++++ arch/x86/kvm/svm/svm.c | 9 ++++++--- 5 files changed, 19 insertions(+), 5 deletions(-) diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h index a99acec925eb..6bdaacb6faa0 100644 --- a/arch/x86/kvm/mmu.h +++ b/arch/x86/kvm/mmu.h @@ -6,6 +6,8 @@ #include "kvm_cache_regs.h" #include "cpuid.h" =20 +extern bool __read_mostly enable_mmio_caching; + #define PT_WRITABLE_SHIFT 1 #define PT_USER_SHIFT 2 =20 diff --git a/arch/x86/kvm/mmu/spte.c b/arch/x86/kvm/mmu/spte.c index 66f76f5a15bd..03ca740bf721 100644 --- a/arch/x86/kvm/mmu/spte.c +++ b/arch/x86/kvm/mmu/spte.c @@ -22,6 +22,7 @@ bool __read_mostly enable_mmio_caching =3D true; static bool __ro_after_init allow_mmio_caching; module_param_named(mmio_caching, enable_mmio_caching, bool, 0444); +EXPORT_SYMBOL_GPL(enable_mmio_caching); =20 u64 __read_mostly shadow_host_writable_mask; u64 __read_mostly shadow_mmu_writable_mask; diff --git a/arch/x86/kvm/mmu/spte.h b/arch/x86/kvm/mmu/spte.h index 26b144ffd146..9a9414b8d1d6 100644 --- a/arch/x86/kvm/mmu/spte.h +++ b/arch/x86/kvm/mmu/spte.h @@ -5,8 +5,6 @@ =20 #include "mmu_internal.h" =20 -extern bool __read_mostly enable_mmio_caching; - /* * A MMU present SPTE is backed by actual memory and may or may not be pre= sent * in hardware. E.g. MMIO SPTEs are not considered present. Use bit 11, = as it diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index b0e793e7d85c..28064060413a 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -22,6 +22,7 @@ #include #include =20 +#include "mmu.h" #include "x86.h" #include "svm.h" #include "svm_ops.h" @@ -2221,6 +2222,15 @@ void __init sev_hardware_setup(void) if (!sev_es_enabled) goto out; =20 + /* + * SEV-ES requires MMIO caching as KVM doesn't have access to the guest + * instruction stream, i.e. can't emulate in response to a #NPF and + * instead relies on #NPF(RSVD) being reflected into the guest as #VC + * (the guest can then do a #VMGEXIT to request MMIO emulation). + */ + if (!enable_mmio_caching) + goto out; + /* Does the CPU support SEV-ES? */ if (!boot_cpu_has(X86_FEATURE_SEV_ES)) goto out; diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 38f873cb6f2c..f3813dbacb9f 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -5034,13 +5034,16 @@ static __init int svm_hardware_setup(void) /* Setup shadow_me_value and shadow_me_mask */ kvm_mmu_set_me_spte_mask(sme_me_mask, sme_me_mask); =20 - /* Note, SEV setup consumes npt_enabled. */ + svm_adjust_mmio_mask(); + + /* + * Note, SEV setup consumes npt_enabled and enable_mmio_caching (which + * may be modified by svm_adjust_mmio_mask()). + */ sev_hardware_setup(); =20 svm_hv_hardware_setup(); =20 - svm_adjust_mmio_mask(); - for_each_possible_cpu(cpu) { r =3D svm_cpu_init(cpu); if (r) --=20 2.37.1.559.g78731f0fdb-goog