From nobody Sun Apr 12 00:31:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E69BBC19F28 for ; Wed, 3 Aug 2022 19:27:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238609AbiHCT10 (ORCPT ); Wed, 3 Aug 2022 15:27:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60330 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238471AbiHCT1N (ORCPT ); Wed, 3 Aug 2022 15:27:13 -0400 Received: from mail-pg1-x549.google.com (mail-pg1-x549.google.com [IPv6:2607:f8b0:4864:20::549]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D321156BBD for ; Wed, 3 Aug 2022 12:27:11 -0700 (PDT) Received: by mail-pg1-x549.google.com with SMTP id r74-20020a632b4d000000b0041bc393913eso4503272pgr.10 for ; Wed, 03 Aug 2022 12:27:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:reply-to:from:to:cc; bh=S+w5TrS2aE3Gtpp3HC8mmkT4Qt+4IBb4hazG/v7qagI=; b=lmEYlMMVO7RosQH1pARCRiSvkT4wsXXKXfUp+jCo+GsJZRkS34/+uMIQSRuadC24YK hppsOHONTrzjUsbf2sjkvaEkzGHKAc8xMom3WelINp2MTfetiMQ5h6CFGQE1r5Eb3eai yS/7sxnhdwOhTm0kXBk9JVK9mQe9iiU+ZZAs7VpzaW6v1OWSlt65skDr2IGCB8IkeX+P 5zumLR1VErgkKXZiFu8nKojDR2XAoqZiAavHumGeIJwK3yK+ClI4HAjmw/KRk5FbRPtJ FuWNWP6APBTl0PNGV6O09kdS1qqTb3q5fX6fVJU2iJYgvuPukPluausbL8Ll23seGPT/ aXXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc; bh=S+w5TrS2aE3Gtpp3HC8mmkT4Qt+4IBb4hazG/v7qagI=; b=if6HqFayFrKU+C+jS3nUvGv95QqZvNK16nkLvhx/aNfgdZcXT6A+d4nXo59HcaGge1 R8sxcRKcjxM7oE3MdFcf7WrZ5z+OJ5ZZUD5W7uz49Cdg9+QfC+NCcsDr+PWB4ee7lBm8 CWwS/wjyhbCGO1rq+s/Upuw0eX4A/fSo1jyX+BEY6eGSvWuJWnq6ZPbbBg5ofCYf+6TY h1JOjgzx7px7eLxrA8sVBa5cIShOsddISwlEbL8srIRgWrEAyhSGS77QlOC+Oys0EFdK Uq2A7axepyycvRbjgUCUfZ7bd9Jo6vn0pNgm+FyZHNbvEI+a4Cob6yvR5BTLsP4s2ese iYBA== X-Gm-Message-State: ACgBeo1b2M03w8Az+b0vg/T7guLshxiHkMJqhVhDl1fIOIAcupbcoZ4o zv2VSCa4cUirWByxN6iz3KNZuuew5Gc= X-Google-Smtp-Source: AA6agR4o3cxWVgS7VIytOO8dO0l35jbwyG3DPxCP1ZD9nJgR/3J065dpus5g1cP/VkTWwQK9ibmPsnduNho= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:903:228f:b0:16f:1b48:230c with SMTP id b15-20020a170903228f00b0016f1b48230cmr2674111plh.78.1659554831157; Wed, 03 Aug 2022 12:27:11 -0700 (PDT) Reply-To: Sean Christopherson Date: Wed, 3 Aug 2022 19:26:56 +0000 In-Reply-To: <20220803192658.860033-1-seanjc@google.com> Message-Id: <20220803192658.860033-6-seanjc@google.com> Mime-Version: 1.0 References: <20220803192658.860033-1-seanjc@google.com> X-Mailer: git-send-email 2.37.1.559.g78731f0fdb-goog Subject: [PATCH v2 5/7] KVM: VMX: Use proper type-safe functions for vCPU => LBRs helpers From: Sean Christopherson To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Sean Christopherson , Paolo Bonzini Cc: Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Turn vcpu_to_lbr_desc() and vcpu_to_lbr_records() into functions in order to provide type safety, to document exactly what they return, and to allow consuming the helpers in vmx.h. Move the definitions as necessary (the macros "reference" to_vmx() before its definition). Opportunistically move the other PMU definitions/declarations to keep the PMU stuff bundled together. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/kvm/vmx/vmx.h | 50 ++++++++++++++++++++++++------------------ 1 file changed, 29 insertions(+), 21 deletions(-) diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h index fb8e3480a9d7..35b39dab175d 100644 --- a/arch/x86/kvm/vmx/vmx.h +++ b/arch/x86/kvm/vmx/vmx.h @@ -6,6 +6,7 @@ =20 #include #include +#include =20 #include "capabilities.h" #include "../kvm_cache_regs.h" @@ -92,27 +93,6 @@ union vmx_exit_reason { u32 full; }; =20 -static inline bool intel_pmu_has_perf_global_ctrl(struct kvm_pmu *pmu) -{ - /* - * Architecturally, Intel's SDM states that IA32_PERF_GLOBAL_CTRL is - * supported if "CPUID.0AH: EAX[7:0] > 0", i.e. if the PMU version is - * greater than zero. However, KVM only exposes and emulates the MSR - * to/for the guest if the guest PMU supports at least "Architectural - * Performance Monitoring Version 2". - */ - return pmu->version > 1; -} - -#define vcpu_to_lbr_desc(vcpu) (&to_vmx(vcpu)->lbr_desc) -#define vcpu_to_lbr_records(vcpu) (&to_vmx(vcpu)->lbr_desc.records) - -void intel_pmu_cross_mapped_check(struct kvm_pmu *pmu); -bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu); - -int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu); -void vmx_passthrough_lbr_msrs(struct kvm_vcpu *vcpu); - struct lbr_desc { /* Basic info about guest LBR records. */ struct x86_pmu_lbr records; @@ -542,6 +522,34 @@ static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu = *vcpu) return container_of(vcpu, struct vcpu_vmx, vcpu); } =20 +static inline struct lbr_desc *vcpu_to_lbr_desc(struct kvm_vcpu *vcpu) +{ + return &to_vmx(vcpu)->lbr_desc; +} + +static inline struct x86_pmu_lbr *vcpu_to_lbr_records(struct kvm_vcpu *vcp= u) +{ + return &vcpu_to_lbr_desc(vcpu)->records; +} + +static inline bool intel_pmu_has_perf_global_ctrl(struct kvm_pmu *pmu) +{ + /* + * Architecturally, Intel's SDM states that IA32_PERF_GLOBAL_CTRL is + * supported if "CPUID.0AH: EAX[7:0] > 0", i.e. if the PMU version is + * greater than zero. However, KVM only exposes and emulates the MSR + * to/for the guest if the guest PMU supports at least "Architectural + * Performance Monitoring Version 2". + */ + return pmu->version > 1; +} + +void intel_pmu_cross_mapped_check(struct kvm_pmu *pmu); +bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu); + +int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu); +void vmx_passthrough_lbr_msrs(struct kvm_vcpu *vcpu); + static inline unsigned long vmx_get_exit_qual(struct kvm_vcpu *vcpu) { struct vcpu_vmx *vmx =3D to_vmx(vcpu); --=20 2.37.1.559.g78731f0fdb-goog