From nobody Tue Apr 14 15:42:45 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3CEAC19F2C for ; Tue, 2 Aug 2022 22:37:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235414AbiHBWhz (ORCPT ); Tue, 2 Aug 2022 18:37:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235221AbiHBWhv (ORCPT ); Tue, 2 Aug 2022 18:37:51 -0400 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5642517A96 for ; Tue, 2 Aug 2022 15:37:50 -0700 (PDT) Received: by mail-pl1-x62e.google.com with SMTP id w10so14773835plq.0 for ; Tue, 02 Aug 2022 15:37:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=2z9VWF3hK7//dTsr3ET+yhlA0EUoj1I28bGbEnp5rNA=; b=DzfA8xUlGBHuYnAia4vD5rj+fXD1Re7St+u9/2ucmBIM0lCtoNKupWZ4tPkHKMBsvY OADjkVUYHRdAj/Z0rYGKqx2a/NcYmiVqNb3iP08kmZ6tcz4z+lXGd7FTYGPj1742wa0S P1/GSUMDp+tt+Is3076zFZB3jnd2itjWeLWYk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=2z9VWF3hK7//dTsr3ET+yhlA0EUoj1I28bGbEnp5rNA=; b=eqMFyzvgLUQk+TBfpnun/RU9yyRysnaZQozq4qtOdndJOrXjdXIXFJRZXIJTgoEyyK 2V9XENCTOL9c5wZ2yrGjAzLxozGo+XpoFbhHm3TxWO3PogvPIwAgcawtbokDZtXgvq/r HTyB7bAqKjz0AG0WmxgsT+3Ko7SThdXm8Hga+KLt5I33uMSo/tihpTuZsIFKEua0J89n ctNXsOYXED4/u9LC9N+NNm/g0h8MpviqFFGogMmKKNAGDucTpDdqd7c7MGpC4l7WjXOC oAQctAp4sTDRaMsQw9OefGSXkEpLRZbflsbrsXhWFzVkz+SkUf6k8z95bHvmVeAGgkMY P8SQ== X-Gm-Message-State: ACgBeo0OvsuSHtGJl1uz4BbjEkIPuEv3kZFnU9P53LWpcfXmE4SagGot RymbRX/86cvdnoLT5/Xo4FJhWw== X-Google-Smtp-Source: AA6agR7M6AxyAEjgTDhbxQMLH7upd96AsxWNvKLSMCEEt5qLO0zW8YPaTG5Y95obmNomqZGuYa4gbg== X-Received: by 2002:a17:902:6bc2:b0:16d:d2c2:7ff with SMTP id m2-20020a1709026bc200b0016dd2c207ffmr22353739plt.87.1659479869857; Tue, 02 Aug 2022 15:37:49 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:31c9:9937:c6bb:62f5]) by smtp.gmail.com with ESMTPSA id x185-20020a6263c2000000b00528c066678csm11353030pfb.72.2022.08.02.15.37.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Aug 2022 15:37:49 -0700 (PDT) From: Douglas Anderson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, Mark Brown , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Douglas Anderson , Archit Taneja , Daniel Vetter , David Airlie , Konrad Dybcio , Loic Poulain , Rajeev Nandan , Sean Paul , Stephen Boyd , linux-kernel@vger.kernel.org Subject: [PATCH v3 1/6] drm/msm/dsi: Fix number of regulators for msm8996_dsi_cfg Date: Tue, 2 Aug 2022 15:37:33 -0700 Message-Id: <20220802153434.v3.1.I1056ee3f77f71287f333279efe4c85f88d403f65@changeid> X-Mailer: git-send-email 2.37.1.455.g008518b4e5-goog In-Reply-To: <20220802223738.898592-1-dianders@chromium.org> References: <20220802223738.898592-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" 3 regulators are specified listed but the number 2 is specified. Fix it. Fixes: 3a3ff88a0fc1 ("drm/msm/dsi: Add 8x96 info in dsi_cfg") Signed-off-by: Douglas Anderson Reviewed-by: Abhinav Kumar Reviewed-by: Dmitry Baryshkov --- (no changes since v2) Changes in v2: - ("Fix number of regulators for msm8996_dsi_cfg") new for v2. drivers/gpu/drm/msm/dsi/dsi_cfg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/ds= i_cfg.c index 2c23324a2296..02000a7b7a18 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -109,7 +109,7 @@ static const char * const dsi_8996_bus_clk_names[] =3D { static const struct msm_dsi_config msm8996_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, .reg_cfg =3D { - .num =3D 2, + .num =3D 3, .regs =3D { {"vdda", 18160, 1 }, /* 1.25 V */ {"vcca", 17000, 32 }, /* 0.925 V */ --=20 2.37.1.455.g008518b4e5-goog From nobody Tue Apr 14 15:42:45 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A99B4C00140 for ; Tue, 2 Aug 2022 22:38:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236170AbiHBWiF (ORCPT ); Tue, 2 Aug 2022 18:38:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35344 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233730AbiHBWhx (ORCPT ); Tue, 2 Aug 2022 18:37:53 -0400 Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7080E17E1F for ; Tue, 2 Aug 2022 15:37:52 -0700 (PDT) Received: by mail-pj1-x102d.google.com with SMTP id t22so7017092pjy.1 for ; Tue, 02 Aug 2022 15:37:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=RdEXt6lST7n+LoKcJt89muoRfgacXACJbMNMi2diRZw=; b=meEnV6SKRxCATViJTGiI8yRisfitA/Ifcie2bONs0hT2imac/Ft1IIspNYJbX9Mesy AnXseRu1Y2GlCbGVQG+OMnMhtPuxW/Hi9yVjBpMAsTPuykC0AcVBPE4NtgnN0tIoHnUE 9nDDRaQpVrMjnff9i0Puon7FVq++R7V4cSP/E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=RdEXt6lST7n+LoKcJt89muoRfgacXACJbMNMi2diRZw=; b=qvRPKvLp197YwwWlM77dijCS1tv9aMOZon/FYWD9g8IIDddhLxj100eQgUfwp59cn/ DNlLlFogA1mTNxjDTFI8hOGGBPpSfHhQugoLWqaePAeRWGnXRse2D3OJp5u+Vw+rXwA5 QAqLZ7qvUjhphwCA5Anj55IX5UsvkuEJcNyQb6rzJgnJFDS3lqR8Ky+CsgKDxHJkGT4n hqOIcIXyRMoB9MPI5WpgC76u2O/kCa4oDw6ZnCItFmwnckVOo9DhmB8og9bqLCoEt7/5 UvqvvTNLMN4WwV9LTp08g/WkkbJOnBBvy4YW+8jg9WODrG2IchHdZg+WGaFMKGOFb69h kPAw== X-Gm-Message-State: ACgBeo13vP0nIMpUnXtITBWSuEimjloWWztHsW5k1Qjkyb52RXuF6G+8 XOUmmUgwTkkCOLVZaVQ2BTqyYA== X-Google-Smtp-Source: AA6agR6kwuvP8bBPDHcReSHv/U+3Fz0f7n7zbRA+IblQ1fr4TmASpT5VeILMORInZ9BsNAd5WoxSOQ== X-Received: by 2002:a17:90b:1e08:b0:1f5:1f0d:3736 with SMTP id pg8-20020a17090b1e0800b001f51f0d3736mr1776097pjb.58.1659479871969; Tue, 02 Aug 2022 15:37:51 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:31c9:9937:c6bb:62f5]) by smtp.gmail.com with ESMTPSA id x185-20020a6263c2000000b00528c066678csm11353030pfb.72.2022.08.02.15.37.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Aug 2022 15:37:51 -0700 (PDT) From: Douglas Anderson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, Mark Brown , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Douglas Anderson , Daniel Vetter , David Airlie , Konrad Dybcio , Loic Poulain , Rajeev Nandan , Sean Paul , Stephen Boyd , linux-kernel@vger.kernel.org Subject: [PATCH v3 2/6] drm/msm/dsi: Fix number of regulators for SDM660 Date: Tue, 2 Aug 2022 15:37:34 -0700 Message-Id: <20220802153434.v3.2.I94b3c3e412b7c208061349f05659e126483171b1@changeid> X-Mailer: git-send-email 2.37.1.455.g008518b4e5-goog In-Reply-To: <20220802223738.898592-1-dianders@chromium.org> References: <20220802223738.898592-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" 1 regulators is specified listed but the number 2 is specified. This presumably means we try to get a regulator with no name. Fix it. Fixes: 033f47f7f121 ("drm/msm/dsi: Add DSI configuration for SDM660") Signed-off-by: Douglas Anderson Reviewed-by: Abhinav Kumar Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten --- (no changes since v2) Changes in v2: - ("Fix number of regulators for SDM660") new for v2. drivers/gpu/drm/msm/dsi/dsi_cfg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/ds= i_cfg.c index 02000a7b7a18..72c018e26f47 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -148,7 +148,7 @@ static const char * const dsi_sdm660_bus_clk_names[] = =3D { static const struct msm_dsi_config sdm660_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, .reg_cfg =3D { - .num =3D 2, + .num =3D 1, .regs =3D { {"vdda", 12560, 4 }, /* 1.2 V */ }, --=20 2.37.1.455.g008518b4e5-goog From nobody Tue Apr 14 15:42:45 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C5A9C00140 for ; Tue, 2 Aug 2022 22:38:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235499AbiHBWiI (ORCPT ); Tue, 2 Aug 2022 18:38:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35418 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235221AbiHBWh4 (ORCPT ); Tue, 2 Aug 2022 18:37:56 -0400 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C0435183BC for ; Tue, 2 Aug 2022 15:37:54 -0700 (PDT) Received: by mail-pl1-x630.google.com with SMTP id v18so14721879plo.8 for ; Tue, 02 Aug 2022 15:37:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=70tgsTToQyngoKvQL1zGXWfJI+4T6mTRNc2DsRt8wBg=; b=OUuQ8ZX2m7oiDjZiZZz7emZKpfC5o6AfaNCX9b08AJae6wJ0pYgpSi+H0eVgvrkCDZ UkVkEDtwm9ZwgfKFvkb1tNe1nzEWv8+uzO5snMApAVRYpRxc+c60nzvrXJpBJglKBtcY 4a8Sc8EdfhpWcKr7A/dJAZj/3G6L2u/DfzGNw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=70tgsTToQyngoKvQL1zGXWfJI+4T6mTRNc2DsRt8wBg=; b=PBjx8a0hVpyLuZujVGs+DJaXaDA5WhN4h00JwPintOrjFWseJBkfemLEOWs69ARTQI luW0oDB5a+M39eUMZnuaeaDAvDrB2chsuEfkOUWV/SL9vyoL6yjBsE4Qqrm4Tyn0kkIT XZl6l40ZmeWGFFaqEDm3aK5GgnHkipdP6BHkAz+0IFQQFmvp0nmt7D8ACZDRQfZonaBj B1zHMdEPi2Yh14Hny+o1rT/8j0ZfirZn0EQ04jSoeKEnFtrxMnoFXlTv7TY6V0NlIn+E //YsnrrLDSfKgpdQWe3Yn3YN0mYzR+Wp0OqQtGkhavAT8kopZcezWWIBCrvx5WrdWsAg pEvg== X-Gm-Message-State: ACgBeo3xzK7d/QGuZTG9Yfc3J/lYsN1qdLumhEoDvqFP1ZBA+Ggmyz54 3olQzKU/0ptusQySG2txDbWAbg== X-Google-Smtp-Source: AA6agR4V2IqUluzEe8H06Cw96GmrlrqYcBZsin9VMDPLhSNbCaG0W+ISLlPsUGyvOxFKYsqiZRUPdA== X-Received: by 2002:a17:902:ef4f:b0:16c:d1a7:19f3 with SMTP id e15-20020a170902ef4f00b0016cd1a719f3mr23659328plx.65.1659479874044; Tue, 02 Aug 2022 15:37:54 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:31c9:9937:c6bb:62f5]) by smtp.gmail.com with ESMTPSA id x185-20020a6263c2000000b00528c066678csm11353030pfb.72.2022.08.02.15.37.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Aug 2022 15:37:53 -0700 (PDT) From: Douglas Anderson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, Mark Brown , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Douglas Anderson , AngeloGioacchino Del Regno , Bjorn Andersson , Daniel Vetter , David Airlie , Jonathan Marek , Konrad Dybcio , Loic Poulain , Marijn Suijten , Rajeev Nandan , Sean Paul , Stephen Boyd , Vinod Koul , Vladimir Lypak , linux-kernel@vger.kernel.org Subject: [PATCH v3 3/6] drm/msm/dsi: Don't set a load before disabling a regulator Date: Tue, 2 Aug 2022 15:37:35 -0700 Message-Id: <20220802153434.v3.3.If1f94fbbdb7c1d0fb3961de61483a851ad1971a7@changeid> X-Mailer: git-send-email 2.37.1.455.g008518b4e5-goog In-Reply-To: <20220802223738.898592-1-dianders@chromium.org> References: <20220802223738.898592-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" As of commit 5451781dadf8 ("regulator: core: Only count load for enabled consumers"), a load isn't counted for a disabled regulator. That means all the code in the DSI driver to specify and set loads before disabling a regulator is not actually doing anything useful. Let's remove it. It should be noted that all of the loads set that were being specified were pointless noise anyway. The only use for this number is to pick between low power and high power modes of regulators. Regulators appear to do this changeover at loads on the order of 10000 uA. You would need a lot of clients of the same rail for that 100 uA number to count for anything. Note that now that we get rid of the setting of the load at disable time, we can just set the load once when we first get the regulator and then forget it. It should also be noted that the regulator functions regulator_bulk_enable() and regulator_set_load() already print error messages when they encounter problems so while moving things around we get rid of some extra error prints. Signed-off-by: Douglas Anderson Reviewed-by: Abhinav Kumar Reviewed-by: Dmitry Baryshkov --- Changes in v3: - Fix typo in commit message. - Just directly call the bulk commands; get rid of the wrapper. drivers/gpu/drm/msm/dsi/dsi.h | 1 - drivers/gpu/drm/msm/dsi/dsi_cfg.c | 52 +++++++------- drivers/gpu/drm/msm/dsi/dsi_host.c | 71 ++++--------------- drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 52 ++------------ drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 4 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 6 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c | 4 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 6 +- .../gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c | 2 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 6 +- 10 files changed, 60 insertions(+), 144 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h index 580a1e6358bf..bb6a5bd05cb1 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.h +++ b/drivers/gpu/drm/msm/dsi/dsi.h @@ -37,7 +37,6 @@ enum msm_dsi_phy_usecase { struct dsi_reg_entry { char name[32]; int enable_load; - int disable_load; }; =20 struct dsi_reg_config { diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/ds= i_cfg.c index 72c018e26f47..901d6fd53800 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -14,9 +14,9 @@ static const struct msm_dsi_config apq8064_dsi_cfg =3D { .reg_cfg =3D { .num =3D 3, .regs =3D { - {"vdda", 100000, 100}, /* 1.2 V */ - {"avdd", 10000, 100}, /* 3.0 V */ - {"vddio", 100000, 100}, /* 1.8 V */ + {"vdda", 100000}, /* 1.2 V */ + {"avdd", 10000}, /* 3.0 V */ + {"vddio", 100000}, /* 1.8 V */ }, }, .bus_clk_names =3D dsi_v2_bus_clk_names, @@ -34,9 +34,9 @@ static const struct msm_dsi_config msm8974_apq8084_dsi_cf= g =3D { .reg_cfg =3D { .num =3D 3, .regs =3D { - {"vdd", 150000, 100}, /* 3.0 V */ - {"vdda", 100000, 100}, /* 1.2 V */ - {"vddio", 100000, 100}, /* 1.8 V */ + {"vdd", 150000}, /* 3.0 V */ + {"vdda", 100000}, /* 1.2 V */ + {"vddio", 100000}, /* 1.8 V */ }, }, .bus_clk_names =3D dsi_6g_bus_clk_names, @@ -54,8 +54,8 @@ static const struct msm_dsi_config msm8916_dsi_cfg =3D { .reg_cfg =3D { .num =3D 2, .regs =3D { - {"vdda", 100000, 100}, /* 1.2 V */ - {"vddio", 100000, 100}, /* 1.8 V */ + {"vdda", 100000}, /* 1.2 V */ + {"vddio", 100000}, /* 1.8 V */ }, }, .bus_clk_names =3D dsi_8916_bus_clk_names, @@ -73,8 +73,8 @@ static const struct msm_dsi_config msm8976_dsi_cfg =3D { .reg_cfg =3D { .num =3D 2, .regs =3D { - {"vdda", 100000, 100}, /* 1.2 V */ - {"vddio", 100000, 100}, /* 1.8 V */ + {"vdda", 100000}, /* 1.2 V */ + {"vddio", 100000}, /* 1.8 V */ }, }, .bus_clk_names =3D dsi_8976_bus_clk_names, @@ -88,12 +88,12 @@ static const struct msm_dsi_config msm8994_dsi_cfg =3D { .reg_cfg =3D { .num =3D 6, .regs =3D { - {"vdda", 100000, 100}, /* 1.25 V */ - {"vddio", 100000, 100}, /* 1.8 V */ - {"vcca", 10000, 100}, /* 1.0 V */ - {"vdd", 100000, 100}, /* 1.8 V */ - {"lab_reg", -1, -1}, - {"ibb_reg", -1, -1}, + {"vdda", 100000}, /* 1.25 V */ + {"vddio", 100000}, /* 1.8 V */ + {"vcca", 10000}, /* 1.0 V */ + {"vdd", 100000}, /* 1.8 V */ + {"lab_reg", -1}, + {"ibb_reg", -1}, }, }, .bus_clk_names =3D dsi_6g_bus_clk_names, @@ -111,9 +111,9 @@ static const struct msm_dsi_config msm8996_dsi_cfg =3D { .reg_cfg =3D { .num =3D 3, .regs =3D { - {"vdda", 18160, 1 }, /* 1.25 V */ - {"vcca", 17000, 32 }, /* 0.925 V */ - {"vddio", 100000, 100 },/* 1.8 V */ + {"vdda", 18160}, /* 1.25 V */ + {"vcca", 17000}, /* 0.925 V */ + {"vddio", 100000},/* 1.8 V */ }, }, .bus_clk_names =3D dsi_8996_bus_clk_names, @@ -131,8 +131,8 @@ static const struct msm_dsi_config msm8998_dsi_cfg =3D { .reg_cfg =3D { .num =3D 2, .regs =3D { - {"vdd", 367000, 16 }, /* 0.9 V */ - {"vdda", 62800, 2 }, /* 1.2 V */ + {"vdd", 367000}, /* 0.9 V */ + {"vdda", 62800}, /* 1.2 V */ }, }, .bus_clk_names =3D dsi_msm8998_bus_clk_names, @@ -150,7 +150,7 @@ static const struct msm_dsi_config sdm660_dsi_cfg =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vdda", 12560, 4 }, /* 1.2 V */ + {"vdda", 12560}, /* 1.2 V */ }, }, .bus_clk_names =3D dsi_sdm660_bus_clk_names, @@ -172,7 +172,7 @@ static const struct msm_dsi_config sdm845_dsi_cfg =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vdda", 21800, 4 }, /* 1.2 V */ + {"vdda", 21800}, /* 1.2 V */ }, }, .bus_clk_names =3D dsi_sdm845_bus_clk_names, @@ -186,7 +186,7 @@ static const struct msm_dsi_config sc7180_dsi_cfg =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vdda", 21800, 4 }, /* 1.2 V */ + {"vdda", 21800}, /* 1.2 V */ }, }, .bus_clk_names =3D dsi_sc7180_bus_clk_names, @@ -204,7 +204,7 @@ static const struct msm_dsi_config sc7280_dsi_cfg =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vdda", 8350, 0 }, /* 1.2 V */ + {"vdda", 8350}, /* 1.2 V */ }, }, .bus_clk_names =3D dsi_sc7280_bus_clk_names, @@ -222,7 +222,7 @@ static const struct msm_dsi_config qcm2290_dsi_cfg =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vdda", 21800, 4 }, /* 1.2 V */ + {"vdda", 21800}, /* 1.2 V */ }, }, .bus_clk_names =3D dsi_qcm2290_bus_clk_names, diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/d= si_host.c index a95d5df52653..9df278d39559 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -203,9 +203,6 @@ static inline void dsi_write(struct msm_dsi_host *msm_h= ost, u32 reg, u32 data) msm_writel(data, msm_host->ctrl_base + reg); } =20 -static int dsi_host_regulator_enable(struct msm_dsi_host *msm_host); -static void dsi_host_regulator_disable(struct msm_dsi_host *msm_host); - static const struct msm_dsi_cfg_handler *dsi_get_config( struct msm_dsi_host *msm_host) { @@ -256,56 +253,6 @@ static inline struct msm_dsi_host *to_msm_dsi_host(str= uct mipi_dsi_host *host) return container_of(host, struct msm_dsi_host, base); } =20 -static void dsi_host_regulator_disable(struct msm_dsi_host *msm_host) -{ - struct regulator_bulk_data *s =3D msm_host->supplies; - const struct dsi_reg_entry *regs =3D msm_host->cfg_hnd->cfg->reg_cfg.regs; - int num =3D msm_host->cfg_hnd->cfg->reg_cfg.num; - int i; - - DBG(""); - for (i =3D num - 1; i >=3D 0; i--) - if (regs[i].disable_load >=3D 0) - regulator_set_load(s[i].consumer, - regs[i].disable_load); - - regulator_bulk_disable(num, s); -} - -static int dsi_host_regulator_enable(struct msm_dsi_host *msm_host) -{ - struct regulator_bulk_data *s =3D msm_host->supplies; - const struct dsi_reg_entry *regs =3D msm_host->cfg_hnd->cfg->reg_cfg.regs; - int num =3D msm_host->cfg_hnd->cfg->reg_cfg.num; - int ret, i; - - DBG(""); - for (i =3D 0; i < num; i++) { - if (regs[i].enable_load >=3D 0) { - ret =3D regulator_set_load(s[i].consumer, - regs[i].enable_load); - if (ret < 0) { - pr_err("regulator %d set op mode failed, %d\n", - i, ret); - goto fail; - } - } - } - - ret =3D regulator_bulk_enable(num, s); - if (ret < 0) { - pr_err("regulator enable failed, %d\n", ret); - goto fail; - } - - return 0; - -fail: - for (i--; i >=3D 0; i--) - regulator_set_load(s[i].consumer, regs[i].disable_load); - return ret; -} - static int dsi_regulator_init(struct msm_dsi_host *msm_host) { struct regulator_bulk_data *s =3D msm_host->supplies; @@ -323,6 +270,15 @@ static int dsi_regulator_init(struct msm_dsi_host *msm= _host) return ret; } =20 + for (i =3D 0; i < num; i++) { + if (regs[i].enable_load >=3D 0) { + ret =3D regulator_set_load(s[i].consumer, + regs[i].enable_load); + if (ret < 0) + return ret; + } + } + return 0; } =20 @@ -2561,7 +2517,8 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host, =20 msm_dsi_sfpb_config(msm_host, true); =20 - ret =3D dsi_host_regulator_enable(msm_host); + ret =3D regulator_bulk_enable(msm_host->cfg_hnd->cfg->reg_cfg.num, + msm_host->supplies); if (ret) { pr_err("%s:Failed to enable vregs.ret=3D%d\n", __func__, ret); @@ -2601,7 +2558,8 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host, cfg_hnd->ops->link_clk_disable(msm_host); pm_runtime_put(&msm_host->pdev->dev); fail_disable_reg: - dsi_host_regulator_disable(msm_host); + regulator_bulk_disable(msm_host->cfg_hnd->cfg->reg_cfg.num, + msm_host->supplies); unlock_ret: mutex_unlock(&msm_host->dev_mutex); return ret; @@ -2628,7 +2586,8 @@ int msm_dsi_host_power_off(struct mipi_dsi_host *host) cfg_hnd->ops->link_clk_disable(msm_host); pm_runtime_put(&msm_host->pdev->dev); =20 - dsi_host_regulator_disable(msm_host); + regulator_bulk_disable(msm_host->cfg_hnd->cfg->reg_cfg.num, + msm_host->supplies); =20 msm_dsi_sfpb_config(msm_host, false); =20 diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/ds= i/phy/dsi_phy.c index a39de3bdc7fa..7c105120d73e 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c @@ -529,58 +529,16 @@ static int dsi_phy_regulator_init(struct msm_dsi_phy = *phy) return ret; } =20 - return 0; -} - -static void dsi_phy_regulator_disable(struct msm_dsi_phy *phy) -{ - struct regulator_bulk_data *s =3D phy->supplies; - const struct dsi_reg_entry *regs =3D phy->cfg->reg_cfg.regs; - int num =3D phy->cfg->reg_cfg.num; - int i; - - DBG(""); - for (i =3D num - 1; i >=3D 0; i--) - if (regs[i].disable_load >=3D 0) - regulator_set_load(s[i].consumer, regs[i].disable_load); - - regulator_bulk_disable(num, s); -} - -static int dsi_phy_regulator_enable(struct msm_dsi_phy *phy) -{ - struct regulator_bulk_data *s =3D phy->supplies; - const struct dsi_reg_entry *regs =3D phy->cfg->reg_cfg.regs; - struct device *dev =3D &phy->pdev->dev; - int num =3D phy->cfg->reg_cfg.num; - int ret, i; - - DBG(""); for (i =3D 0; i < num; i++) { if (regs[i].enable_load >=3D 0) { ret =3D regulator_set_load(s[i].consumer, regs[i].enable_load); - if (ret < 0) { - DRM_DEV_ERROR(dev, - "regulator %d set op mode failed, %d\n", - i, ret); - goto fail; - } + if (ret < 0) + return ret; } } =20 - ret =3D regulator_bulk_enable(num, s); - if (ret < 0) { - DRM_DEV_ERROR(dev, "regulator enable failed, %d\n", ret); - goto fail; - } - return 0; - -fail: - for (i--; i >=3D 0; i--) - regulator_set_load(s[i].consumer, regs[i].disable_load); - return ret; } =20 static int dsi_phy_enable_resource(struct msm_dsi_phy *phy) @@ -829,7 +787,7 @@ int msm_dsi_phy_enable(struct msm_dsi_phy *phy, goto res_en_fail; } =20 - ret =3D dsi_phy_regulator_enable(phy); + ret =3D regulator_bulk_enable(phy->cfg->reg_cfg.num, phy->supplies); if (ret) { DRM_DEV_ERROR(dev, "%s: regulator enable failed, %d\n", __func__, ret); @@ -866,7 +824,7 @@ int msm_dsi_phy_enable(struct msm_dsi_phy *phy, if (phy->cfg->ops.disable) phy->cfg->ops.disable(phy); phy_en_fail: - dsi_phy_regulator_disable(phy); + regulator_bulk_disable(phy->cfg->reg_cfg.num, phy->supplies); reg_en_fail: dsi_phy_disable_resource(phy); res_en_fail: @@ -880,7 +838,7 @@ void msm_dsi_phy_disable(struct msm_dsi_phy *phy) =20 phy->cfg->ops.disable(phy); =20 - dsi_phy_regulator_disable(phy); + regulator_bulk_disable(phy->cfg->reg_cfg.num, phy->supplies); dsi_phy_disable_resource(phy); } =20 diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c b/drivers/gpu/drm/m= sm/dsi/phy/dsi_phy_10nm.c index 08b015ea1b1e..6a10a1448051 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c @@ -1033,7 +1033,7 @@ const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vdds", 36000, 32}, + {"vdds", 36000}, }, }, .ops =3D { @@ -1055,7 +1055,7 @@ const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs = =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vdds", 36000, 32}, + {"vdds", 36000}, }, }, .ops =3D { diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/m= sm/dsi/phy/dsi_phy_14nm.c index 8199c53567f4..0f3d4c56c333 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c @@ -1029,7 +1029,7 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vcca", 17000, 32}, + {"vcca", 17000}, }, }, .ops =3D { @@ -1050,7 +1050,7 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs = =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vcca", 73400, 32}, + {"vcca", 73400}, }, }, .ops =3D { @@ -1071,7 +1071,7 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs = =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vcca", 17000, 32}, + {"vcca", 17000}, }, }, .ops =3D { diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c b/drivers/gpu/drm/m= sm/dsi/phy/dsi_phy_20nm.c index ee7c418a1c29..b7c621d94981 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c @@ -134,8 +134,8 @@ const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs =3D { .reg_cfg =3D { .num =3D 2, .regs =3D { - {"vddio", 100000, 100}, /* 1.8 V */ - {"vcca", 10000, 100}, /* 1.0 V */ + {"vddio", 100000}, /* 1.8 V */ + {"vcca", 10000}, /* 1.0 V */ }, }, .ops =3D { diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c b/drivers/gpu/drm/m= sm/dsi/phy/dsi_phy_28nm.c index 48eab80b548e..6beba387640d 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c @@ -774,7 +774,7 @@ const struct msm_dsi_phy_cfg dsi_phy_28nm_hpm_cfgs =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vddio", 100000, 100}, + {"vddio", 100000}, }, }, .ops =3D { @@ -795,7 +795,7 @@ const struct msm_dsi_phy_cfg dsi_phy_28nm_hpm_famb_cfgs= =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vddio", 100000, 100}, + {"vddio", 100000}, }, }, .ops =3D { @@ -816,7 +816,7 @@ const struct msm_dsi_phy_cfg dsi_phy_28nm_lp_cfgs =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vddio", 100000, 100}, /* 1.8 V */ + {"vddio", 100000}, /* 1.8 V */ }, }, .ops =3D { diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c b/drivers/gpu/= drm/msm/dsi/phy/dsi_phy_28nm_8960.c index fc56cdcc9ad6..2e942b10fffa 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c @@ -653,7 +653,7 @@ const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs =3D= { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vddio", 100000, 100}, /* 1.8 V */ + {"vddio", 100000}, /* 1.8 V */ }, }, .ops =3D { diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/ms= m/dsi/phy/dsi_phy_7nm.c index 66ed1919a1db..9c7c49ce1200 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c @@ -1041,7 +1041,7 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vdds", 36000, 32}, + {"vdds", 36000}, }, }, .ops =3D { @@ -1068,7 +1068,7 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs = =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vdds", 36000, 32}, + {"vdds", 36000}, }, }, .ops =3D { @@ -1090,7 +1090,7 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs = =3D { .reg_cfg =3D { .num =3D 1, .regs =3D { - {"vdds", 37550, 0}, + {"vdds", 37550}, }, }, .ops =3D { --=20 2.37.1.455.g008518b4e5-goog From nobody Tue Apr 14 15:42:45 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5BC25C19F2C for ; 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Tue, 02 Aug 2022 15:37:55 -0700 (PDT) From: Douglas Anderson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, Mark Brown , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Douglas Anderson , Daniel Vetter , David Airlie , Jonathan Marek , Rajeev Nandan , Sean Paul , Stephen Boyd , Vinod Koul , linux-kernel@vger.kernel.org Subject: [PATCH v3 4/6] drm/msm/dsi: Use the new regulator bulk feature to specify the load Date: Tue, 2 Aug 2022 15:37:36 -0700 Message-Id: <20220802153434.v3.4.I7b3c72949883846badb073cfeae985c55239da1d@changeid> X-Mailer: git-send-email 2.37.1.455.g008518b4e5-goog In-Reply-To: <20220802223738.898592-1-dianders@chromium.org> References: <20220802223738.898592-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" As of commit 6eabfc018e8d ("regulator: core: Allow specifying an initial load w/ the bulk API") we can now specify the initial load in the bulk data rather than having to manually call regulator_set_load() on each regulator. Let's use it. Signed-off-by: Douglas Anderson Reviewed-by: Abhinav Kumar Reviewed-by: Dmitry Baryshkov --- Changes in v3: - Update commit message to point at the git hash of the regulator change. Changes in v2: - ("Use the new regulator bulk feature to specify the load") new for v2. drivers/gpu/drm/msm/dsi/dsi_host.c | 13 +++---------- drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 13 +++---------- 2 files changed, 6 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/d= si_host.c index 9df278d39559..a0a1b6d61d05 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -260,8 +260,10 @@ static int dsi_regulator_init(struct msm_dsi_host *msm= _host) int num =3D msm_host->cfg_hnd->cfg->reg_cfg.num; int i, ret; =20 - for (i =3D 0; i < num; i++) + for (i =3D 0; i < num; i++) { s[i].supply =3D regs[i].name; + s[i].init_load_uA =3D regs[i].enable_load; + } =20 ret =3D devm_regulator_bulk_get(&msm_host->pdev->dev, num, s); if (ret < 0) { @@ -270,15 +272,6 @@ static int dsi_regulator_init(struct msm_dsi_host *msm= _host) return ret; } =20 - for (i =3D 0; i < num; i++) { - if (regs[i].enable_load >=3D 0) { - ret =3D regulator_set_load(s[i].consumer, - regs[i].enable_load); - if (ret < 0) - return ret; - } - } - return 0; } =20 diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/ds= i/phy/dsi_phy.c index 7c105120d73e..efb6b1726cdb 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c @@ -515,8 +515,10 @@ static int dsi_phy_regulator_init(struct msm_dsi_phy *= phy) int num =3D phy->cfg->reg_cfg.num; int i, ret; =20 - for (i =3D 0; i < num; i++) + for (i =3D 0; i < num; i++) { s[i].supply =3D regs[i].name; + s[i].init_load_uA =3D regs[i].enable_load; + } =20 ret =3D devm_regulator_bulk_get(dev, num, s); if (ret < 0) { @@ -529,15 +531,6 @@ static int dsi_phy_regulator_init(struct msm_dsi_phy *= phy) return ret; } =20 - for (i =3D 0; i < num; i++) { - if (regs[i].enable_load >=3D 0) { - ret =3D regulator_set_load(s[i].consumer, - regs[i].enable_load); - if (ret < 0) - return ret; - } - } - return 0; } =20 --=20 2.37.1.455.g008518b4e5-goog From nobody Tue Apr 14 15:42:45 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3342C19F2D for ; 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Tue, 02 Aug 2022 15:37:57 -0700 (PDT) From: Douglas Anderson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, Mark Brown , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Douglas Anderson , AngeloGioacchino Del Regno , Bjorn Andersson , Daniel Vetter , David Airlie , Jonathan Marek , =?UTF-8?q?Jos=C3=A9=20Exp=C3=B3sito?= , Konrad Dybcio , Loic Poulain , Marijn Suijten , Rajeev Nandan , Sean Paul , Sireesh Kodali , Stephen Boyd , Vinod Koul , Vladimir Lypak , linux-kernel@vger.kernel.org Subject: [PATCH v3 5/6] drm/msm/dsi: Take advantage of devm_regulator_bulk_get_const() Date: Tue, 2 Aug 2022 15:37:37 -0700 Message-Id: <20220802153434.v3.5.I55a9e65cb1c22221316629e98768ff473f47a067@changeid> X-Mailer: git-send-email 2.37.1.455.g008518b4e5-goog In-Reply-To: <20220802223738.898592-1-dianders@chromium.org> References: <20220802223738.898592-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" As of the commit 1de452a0edda ("regulator: core: Allow drivers to define their init data as const") we no longer need to do copying of regulator bulk data from initdata to something dynamic. Let's take advantage of that. In addition to saving some code, this also moves us to using ARRAY_SIZE() to specify how many regulators we have which is less error prone. This gets rid of some layers of wrappers which makes it obvious that we can get rid of an extra error print. devm_regulator_bulk_get_const() prints errors for you so you don't need an extra layer of printing. In all cases here I have preserved the old settings without any investigation about whether the loads being set are sensible. In the cases of some of the PHYs if several PHYs in the same file used exactly the same settings I had them point to the same data structure. NOTE: Though I haven't done the math, this is likely an overall savings in terms of "static const" data. We previously always allocated space for 8 supplies. Each of these supplies took up 36 bytes of data (32 for name, 4 for an int). Signed-off-by: Douglas Anderson Reviewed-by: Abhinav Kumar Reviewed-by: Dmitry Baryshkov --- Changes in v3: - Do all the PHYs too. - Get rid of error print after devm_regulator_bulk_get_const(). - Just directly call the bulk commands; get rid of the wrapper. - Update commit message to point at the git hash of the regulator change. Changes in v2: - ("Take advantage of devm_regulator_bulk_get_const") new for v2. drivers/gpu/drm/msm/dsi/dsi.h | 12 -- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 172 +++++++++--------- drivers/gpu/drm/msm/dsi/dsi_cfg.h | 3 +- drivers/gpu/drm/msm/dsi/dsi_host.c | 42 ++--- drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 37 +--- drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 5 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 20 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 32 ++-- drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c | 14 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 28 +-- .../gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c | 12 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 32 ++-- 12 files changed, 167 insertions(+), 242 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h index bb6a5bd05cb1..d661510d570d 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.h +++ b/drivers/gpu/drm/msm/dsi/dsi.h @@ -30,20 +30,8 @@ enum msm_dsi_phy_usecase { MSM_DSI_PHY_SLAVE, }; =20 -#define DSI_DEV_REGULATOR_MAX 8 #define DSI_BUS_CLK_MAX 4 =20 -/* Regulators for DSI devices */ -struct dsi_reg_entry { - char name[32]; - int enable_load; -}; - -struct dsi_reg_config { - int num; - struct dsi_reg_entry regs[DSI_DEV_REGULATOR_MAX]; -}; - struct msm_dsi { struct drm_device *dev; struct platform_device *pdev; diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/ds= i_cfg.c index 901d6fd53800..7e97c239ed48 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -9,16 +9,16 @@ static const char * const dsi_v2_bus_clk_names[] =3D { "core_mmss", "iface", "bus", }; =20 +static const struct regulator_bulk_data apq8064_dsi_regulators[] =3D { + { .supply =3D "vdda", .init_load_uA =3D 100000 }, /* 1.2 V */ + { .supply =3D "avdd", .init_load_uA =3D 10000 }, /* 3.0 V */ + { .supply =3D "vddio", .init_load_uA =3D 100000 }, /* 1.8 V */ +}; + static const struct msm_dsi_config apq8064_dsi_cfg =3D { .io_offset =3D 0, - .reg_cfg =3D { - .num =3D 3, - .regs =3D { - {"vdda", 100000}, /* 1.2 V */ - {"avdd", 10000}, /* 3.0 V */ - {"vddio", 100000}, /* 1.8 V */ - }, - }, + .regulator_data =3D apq8064_dsi_regulators, + .num_regulators =3D ARRAY_SIZE(apq8064_dsi_regulators), .bus_clk_names =3D dsi_v2_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_v2_bus_clk_names), .io_start =3D { 0x4700000, 0x5800000 }, @@ -29,16 +29,16 @@ static const char * const dsi_6g_bus_clk_names[] =3D { "mdp_core", "iface", "bus", "core_mmss", }; =20 +static const struct regulator_bulk_data msm8974_apq8084_regulators[] =3D { + { .supply =3D "vdd", .init_load_uA =3D 150000 }, /* 3.0 V */ + { .supply =3D "vdda", .init_load_uA =3D 100000 }, /* 1.2 V */ + { .supply =3D "vddio", .init_load_uA =3D 100000 }, /* 1.8 V */ +}; + static const struct msm_dsi_config msm8974_apq8084_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .reg_cfg =3D { - .num =3D 3, - .regs =3D { - {"vdd", 150000}, /* 3.0 V */ - {"vdda", 100000}, /* 1.2 V */ - {"vddio", 100000}, /* 1.8 V */ - }, - }, + .regulator_data =3D msm8974_apq8084_regulators, + .num_regulators =3D ARRAY_SIZE(msm8974_apq8084_regulators), .bus_clk_names =3D dsi_6g_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_6g_bus_clk_names), .io_start =3D { 0xfd922800, 0xfd922b00 }, @@ -49,15 +49,15 @@ static const char * const dsi_8916_bus_clk_names[] =3D { "mdp_core", "iface", "bus", }; =20 +static const struct regulator_bulk_data msm8916_dsi_regulators[] =3D { + { .supply =3D "vdda", .init_load_uA =3D 100000 }, /* 1.2 V */ + { .supply =3D "vddio", .init_load_uA =3D 100000 }, /* 1.8 V */ +}; + static const struct msm_dsi_config msm8916_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .reg_cfg =3D { - .num =3D 2, - .regs =3D { - {"vdda", 100000}, /* 1.2 V */ - {"vddio", 100000}, /* 1.8 V */ - }, - }, + .regulator_data =3D msm8916_dsi_regulators, + .num_regulators =3D ARRAY_SIZE(msm8916_dsi_regulators), .bus_clk_names =3D dsi_8916_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_8916_bus_clk_names), .io_start =3D { 0x1a98000 }, @@ -68,34 +68,34 @@ static const char * const dsi_8976_bus_clk_names[] =3D { "mdp_core", "iface", "bus", }; =20 +static const struct regulator_bulk_data msm8976_dsi_regulators[] =3D { + { .supply =3D "vdda", .init_load_uA =3D 100000 }, /* 1.2 V */ + { .supply =3D "vddio", .init_load_uA =3D 100000 }, /* 1.8 V */ +}; + static const struct msm_dsi_config msm8976_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .reg_cfg =3D { - .num =3D 2, - .regs =3D { - {"vdda", 100000}, /* 1.2 V */ - {"vddio", 100000}, /* 1.8 V */ - }, - }, + .regulator_data =3D msm8976_dsi_regulators, + .num_regulators =3D ARRAY_SIZE(msm8976_dsi_regulators), .bus_clk_names =3D dsi_8976_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_8976_bus_clk_names), .io_start =3D { 0x1a94000, 0x1a96000 }, .num_dsi =3D 2, }; =20 +static const struct regulator_bulk_data msm8994_dsi_regulators[] =3D { + { .supply =3D "vdda", .init_load_uA =3D 100000 }, /* 1.25 V */ + { .supply =3D "vddio", .init_load_uA =3D 100000 }, /* 1.8 V */ + { .supply =3D "vcca", .init_load_uA =3D 10000 }, /* 1.0 V */ + { .supply =3D "vdd", .init_load_uA =3D 100000 }, /* 1.8 V */ + { .supply =3D "lab_reg", .init_load_uA =3D -1 }, + { .supply =3D "ibb_reg", .init_load_uA =3D -1 }, +}; + static const struct msm_dsi_config msm8994_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .reg_cfg =3D { - .num =3D 6, - .regs =3D { - {"vdda", 100000}, /* 1.25 V */ - {"vddio", 100000}, /* 1.8 V */ - {"vcca", 10000}, /* 1.0 V */ - {"vdd", 100000}, /* 1.8 V */ - {"lab_reg", -1}, - {"ibb_reg", -1}, - }, - }, + .regulator_data =3D msm8994_dsi_regulators, + .num_regulators =3D ARRAY_SIZE(msm8994_dsi_regulators), .bus_clk_names =3D dsi_6g_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_6g_bus_clk_names), .io_start =3D { 0xfd998000, 0xfd9a0000 }, @@ -106,16 +106,16 @@ static const char * const dsi_8996_bus_clk_names[] = =3D { "mdp_core", "iface", "bus", "core_mmss", }; =20 +static const struct regulator_bulk_data msm8996_dsi_regulators[] =3D { + { .supply =3D "vdda", .init_load_uA =3D 18160 }, /* 1.25 V */ + { .supply =3D "vcca", .init_load_uA =3D 17000 }, /* 0.925 V */ + { .supply =3D "vddio", .init_load_uA =3D 100000 }, /* 1.8 V */ +}; + static const struct msm_dsi_config msm8996_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .reg_cfg =3D { - .num =3D 3, - .regs =3D { - {"vdda", 18160}, /* 1.25 V */ - {"vcca", 17000}, /* 0.925 V */ - {"vddio", 100000},/* 1.8 V */ - }, - }, + .regulator_data =3D msm8996_dsi_regulators, + .num_regulators =3D ARRAY_SIZE(msm8996_dsi_regulators), .bus_clk_names =3D dsi_8996_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_8996_bus_clk_names), .io_start =3D { 0x994000, 0x996000 }, @@ -126,15 +126,15 @@ static const char * const dsi_msm8998_bus_clk_names[]= =3D { "iface", "bus", "core", }; =20 +static const struct regulator_bulk_data msm8998_dsi_regulators[] =3D { + { .supply =3D "vdd", .init_load_uA =3D 367000 }, /* 0.9 V */ + { .supply =3D "vdda", .init_load_uA =3D 62800 }, /* 1.2 V */ +}; + static const struct msm_dsi_config msm8998_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .reg_cfg =3D { - .num =3D 2, - .regs =3D { - {"vdd", 367000}, /* 0.9 V */ - {"vdda", 62800}, /* 1.2 V */ - }, - }, + .regulator_data =3D msm8998_dsi_regulators, + .num_regulators =3D ARRAY_SIZE(msm8998_dsi_regulators), .bus_clk_names =3D dsi_msm8998_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_msm8998_bus_clk_names), .io_start =3D { 0xc994000, 0xc996000 }, @@ -145,14 +145,14 @@ static const char * const dsi_sdm660_bus_clk_names[] = =3D { "iface", "bus", "core", "core_mmss", }; =20 +static const struct regulator_bulk_data sdm660_dsi_regulators[] =3D { + { .supply =3D "vdda", .init_load_uA =3D 12560 }, /* 1.2 V */ +}; + static const struct msm_dsi_config sdm660_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vdda", 12560}, /* 1.2 V */ - }, - }, + .regulator_data =3D sdm660_dsi_regulators, + .num_regulators =3D ARRAY_SIZE(sdm660_dsi_regulators), .bus_clk_names =3D dsi_sdm660_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sdm660_bus_clk_names), .io_start =3D { 0xc994000, 0xc996000 }, @@ -167,28 +167,28 @@ static const char * const dsi_sc7180_bus_clk_names[] = =3D { "iface", "bus", }; =20 +static const struct regulator_bulk_data sdm845_dsi_regulators[] =3D { + { .supply =3D "vdda", .init_load_uA =3D 21800 }, /* 1.2 V */ +}; + static const struct msm_dsi_config sdm845_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vdda", 21800}, /* 1.2 V */ - }, - }, + .regulator_data =3D sdm845_dsi_regulators, + .num_regulators =3D ARRAY_SIZE(sdm845_dsi_regulators), .bus_clk_names =3D dsi_sdm845_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sdm845_bus_clk_names), .io_start =3D { 0xae94000, 0xae96000 }, .num_dsi =3D 2, }; =20 +static const struct regulator_bulk_data sc7180_dsi_regulators[] =3D { + { .supply =3D "vdda", .init_load_uA =3D 21800 }, /* 1.2 V */ +}; + static const struct msm_dsi_config sc7180_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vdda", 21800}, /* 1.2 V */ - }, - }, + .regulator_data =3D sc7180_dsi_regulators, + .num_regulators =3D ARRAY_SIZE(sc7180_dsi_regulators), .bus_clk_names =3D dsi_sc7180_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sc7180_bus_clk_names), .io_start =3D { 0xae94000 }, @@ -199,14 +199,14 @@ static const char * const dsi_sc7280_bus_clk_names[] = =3D { "iface", "bus", }; =20 +static const struct regulator_bulk_data sc7280_dsi_regulators[] =3D { + { .supply =3D "vdda", .init_load_uA =3D 8350 }, /* 1.2 V */ +}; + static const struct msm_dsi_config sc7280_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vdda", 8350}, /* 1.2 V */ - }, - }, + .regulator_data =3D sc7280_dsi_regulators, + .num_regulators =3D ARRAY_SIZE(sc7280_dsi_regulators), .bus_clk_names =3D dsi_sc7280_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sc7280_bus_clk_names), .io_start =3D { 0xae94000 }, @@ -217,14 +217,14 @@ static const char * const dsi_qcm2290_bus_clk_names[]= =3D { "iface", "bus", }; =20 +static const struct regulator_bulk_data qcm2290_dsi_cfg_regulators[] =3D { + { .supply =3D "vdda", .init_load_uA =3D 21800 }, /* 1.2 V */ +}; + static const struct msm_dsi_config qcm2290_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vdda", 21800}, /* 1.2 V */ - }, - }, + .regulator_data =3D qcm2290_dsi_cfg_regulators, + .num_regulators =3D ARRAY_SIZE(qcm2290_dsi_cfg_regulators), .bus_clk_names =3D dsi_qcm2290_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_qcm2290_bus_clk_names), .io_start =3D { 0x5e94000 }, diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/ds= i_cfg.h index fe54a999968b..8f04e685a74e 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h @@ -32,7 +32,8 @@ =20 struct msm_dsi_config { u32 io_offset; - struct dsi_reg_config reg_cfg; + const struct regulator_bulk_data *regulator_data; + int num_regulators; const char * const *bus_clk_names; const int num_bus_clks; const resource_size_t io_start[DSI_MAX]; diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/d= si_host.c index a0a1b6d61d05..3364b2affac5 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -106,7 +106,7 @@ struct msm_dsi_host { =20 void __iomem *ctrl_base; phys_addr_t ctrl_size; - struct regulator_bulk_data supplies[DSI_DEV_REGULATOR_MAX]; + struct regulator_bulk_data *supplies; =20 int num_bus_clks; struct clk_bulk_data bus_clks[DSI_BUS_CLK_MAX]; @@ -253,28 +253,6 @@ static inline struct msm_dsi_host *to_msm_dsi_host(str= uct mipi_dsi_host *host) return container_of(host, struct msm_dsi_host, base); } =20 -static int dsi_regulator_init(struct msm_dsi_host *msm_host) -{ - struct regulator_bulk_data *s =3D msm_host->supplies; - const struct dsi_reg_entry *regs =3D msm_host->cfg_hnd->cfg->reg_cfg.regs; - int num =3D msm_host->cfg_hnd->cfg->reg_cfg.num; - int i, ret; - - for (i =3D 0; i < num; i++) { - s[i].supply =3D regs[i].name; - s[i].init_load_uA =3D regs[i].enable_load; - } - - ret =3D devm_regulator_bulk_get(&msm_host->pdev->dev, num, s); - if (ret < 0) { - pr_err("%s: failed to init regulator, ret=3D%d\n", - __func__, ret); - return ret; - } - - return 0; -} - int dsi_clk_init_v2(struct msm_dsi_host *msm_host) { struct platform_device *pdev =3D msm_host->pdev; @@ -1982,6 +1960,7 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi) { struct msm_dsi_host *msm_host =3D NULL; struct platform_device *pdev =3D msm_dsi->pdev; + const struct msm_dsi_config *cfg; int ret; =20 msm_host =3D devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL); @@ -2014,6 +1993,7 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi) pr_err("%s: get config failed\n", __func__); goto fail; } + cfg =3D msm_host->cfg_hnd->cfg; =20 msm_host->id =3D dsi_host_get_id(msm_host); if (msm_host->id < 0) { @@ -2023,13 +2003,13 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi) } =20 /* fixup base address by io offset */ - msm_host->ctrl_base +=3D msm_host->cfg_hnd->cfg->io_offset; + msm_host->ctrl_base +=3D cfg->io_offset; =20 - ret =3D dsi_regulator_init(msm_host); - if (ret) { - pr_err("%s: regulator init failed\n", __func__); + ret =3D devm_regulator_bulk_get_const(&pdev->dev, cfg->num_regulators, + cfg->regulator_data, + &msm_host->supplies); + if (ret) goto fail; - } =20 ret =3D dsi_clk_init(msm_host); if (ret) { @@ -2510,7 +2490,7 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host, =20 msm_dsi_sfpb_config(msm_host, true); =20 - ret =3D regulator_bulk_enable(msm_host->cfg_hnd->cfg->reg_cfg.num, + ret =3D regulator_bulk_enable(msm_host->cfg_hnd->cfg->num_regulators, msm_host->supplies); if (ret) { pr_err("%s:Failed to enable vregs.ret=3D%d\n", @@ -2551,7 +2531,7 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host, cfg_hnd->ops->link_clk_disable(msm_host); pm_runtime_put(&msm_host->pdev->dev); fail_disable_reg: - regulator_bulk_disable(msm_host->cfg_hnd->cfg->reg_cfg.num, + regulator_bulk_disable(msm_host->cfg_hnd->cfg->num_regulators, msm_host->supplies); unlock_ret: mutex_unlock(&msm_host->dev_mutex); @@ -2579,7 +2559,7 @@ int msm_dsi_host_power_off(struct mipi_dsi_host *host) cfg_hnd->ops->link_clk_disable(msm_host); pm_runtime_put(&msm_host->pdev->dev); =20 - regulator_bulk_disable(msm_host->cfg_hnd->cfg->reg_cfg.num, + regulator_bulk_disable(msm_host->cfg_hnd->cfg->num_regulators, msm_host->supplies); =20 msm_dsi_sfpb_config(msm_host, false); diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/ds= i/phy/dsi_phy.c index efb6b1726cdb..0a00f9b73fc5 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c @@ -507,33 +507,6 @@ int msm_dsi_cphy_timing_calc_v4(struct msm_dsi_dphy_ti= ming *timing, return 0; } =20 -static int dsi_phy_regulator_init(struct msm_dsi_phy *phy) -{ - struct regulator_bulk_data *s =3D phy->supplies; - const struct dsi_reg_entry *regs =3D phy->cfg->reg_cfg.regs; - struct device *dev =3D &phy->pdev->dev; - int num =3D phy->cfg->reg_cfg.num; - int i, ret; - - for (i =3D 0; i < num; i++) { - s[i].supply =3D regs[i].name; - s[i].init_load_uA =3D regs[i].enable_load; - } - - ret =3D devm_regulator_bulk_get(dev, num, s); - if (ret < 0) { - if (ret !=3D -EPROBE_DEFER) { - DRM_DEV_ERROR(dev, - "%s: failed to init regulator, ret=3D%d\n", - __func__, ret); - } - - return ret; - } - - return 0; -} - static int dsi_phy_enable_resource(struct msm_dsi_phy *phy) { struct device *dev =3D &phy->pdev->dev; @@ -698,7 +671,9 @@ static int dsi_phy_driver_probe(struct platform_device = *pdev) goto fail; } =20 - ret =3D dsi_phy_regulator_init(phy); + ret =3D devm_regulator_bulk_get_const(dev, phy->cfg->num_regulators, + phy->cfg->regulator_data, + &phy->supplies); if (ret) goto fail; =20 @@ -780,7 +755,7 @@ int msm_dsi_phy_enable(struct msm_dsi_phy *phy, goto res_en_fail; } =20 - ret =3D regulator_bulk_enable(phy->cfg->reg_cfg.num, phy->supplies); + ret =3D regulator_bulk_enable(phy->cfg->num_regulators, phy->supplies); if (ret) { DRM_DEV_ERROR(dev, "%s: regulator enable failed, %d\n", __func__, ret); @@ -817,7 +792,7 @@ int msm_dsi_phy_enable(struct msm_dsi_phy *phy, if (phy->cfg->ops.disable) phy->cfg->ops.disable(phy); phy_en_fail: - regulator_bulk_disable(phy->cfg->reg_cfg.num, phy->supplies); + regulator_bulk_disable(phy->cfg->num_regulators, phy->supplies); reg_en_fail: dsi_phy_disable_resource(phy); res_en_fail: @@ -831,7 +806,7 @@ void msm_dsi_phy_disable(struct msm_dsi_phy *phy) =20 phy->cfg->ops.disable(phy); =20 - regulator_bulk_disable(phy->cfg->reg_cfg.num, phy->supplies); + regulator_bulk_disable(phy->cfg->num_regulators, phy->supplies); dsi_phy_disable_resource(phy); } =20 diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/ds= i/phy/dsi_phy.h index dc91b43d5a38..60a99c6525b2 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h @@ -29,7 +29,8 @@ struct msm_dsi_phy_ops { }; =20 struct msm_dsi_phy_cfg { - struct dsi_reg_config reg_cfg; + const struct regulator_bulk_data *regulator_data; + int num_regulators; struct msm_dsi_phy_ops ops; =20 unsigned long min_pll_rate; @@ -98,7 +99,7 @@ struct msm_dsi_phy { int id; =20 struct clk *ahb_clk; - struct regulator_bulk_data supplies[DSI_DEV_REGULATOR_MAX]; + struct regulator_bulk_data *supplies; =20 struct msm_dsi_dphy_timing timing; const struct msm_dsi_phy_cfg *cfg; diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c b/drivers/gpu/drm/m= sm/dsi/phy/dsi_phy_10nm.c index 6a10a1448051..e34a2274db87 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c @@ -1028,14 +1028,14 @@ static int dsi_10nm_phy_parse_dt(struct msm_dsi_phy= *phy) return 0; } =20 +static const struct regulator_bulk_data dsi_phy_10nm_regulators[] =3D { + { .supply =3D "vdds", .init_load_uA =3D 36000 }, +}; + const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs =3D { .has_phy_lane =3D true, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vdds", 36000}, - }, - }, + .regulator_data =3D dsi_phy_10nm_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_10nm_regulators), .ops =3D { .enable =3D dsi_10nm_phy_enable, .disable =3D dsi_10nm_phy_disable, @@ -1052,12 +1052,8 @@ const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs =3D { =20 const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs =3D { .has_phy_lane =3D true, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vdds", 36000}, - }, - }, + .regulator_data =3D dsi_phy_10nm_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_10nm_regulators), .ops =3D { .enable =3D dsi_10nm_phy_enable, .disable =3D dsi_10nm_phy_disable, diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/m= sm/dsi/phy/dsi_phy_14nm.c index 0f3d4c56c333..be1500368d95 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c @@ -1024,14 +1024,18 @@ static void dsi_14nm_phy_disable(struct msm_dsi_phy= *phy) wmb(); } =20 +static const struct regulator_bulk_data dsi_phy_14nm_17mA_regulators[] =3D= { + { .supply =3D "vcca", .init_load_uA =3D 17000 }, +}; + +static const struct regulator_bulk_data dsi_phy_14nm_73p4mA_regulators[] = =3D { + { .supply =3D "vcca", .init_load_uA =3D 73400 }, +}; + const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs =3D { .has_phy_lane =3D true, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vcca", 17000}, - }, - }, + .regulator_data =3D dsi_phy_14nm_17mA_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_14nm_17mA_regulators), .ops =3D { .enable =3D dsi_14nm_phy_enable, .disable =3D dsi_14nm_phy_disable, @@ -1047,12 +1051,8 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs =3D { =20 const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs =3D { .has_phy_lane =3D true, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vcca", 73400}, - }, - }, + .regulator_data =3D dsi_phy_14nm_73p4mA_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_14nm_73p4mA_regulators), .ops =3D { .enable =3D dsi_14nm_phy_enable, .disable =3D dsi_14nm_phy_disable, @@ -1068,12 +1068,8 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs = =3D { =20 const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs =3D { .has_phy_lane =3D true, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vcca", 17000}, - }, - }, + .regulator_data =3D dsi_phy_14nm_17mA_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_14nm_17mA_regulators), .ops =3D { .enable =3D dsi_14nm_phy_enable, .disable =3D dsi_14nm_phy_disable, diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c b/drivers/gpu/drm/m= sm/dsi/phy/dsi_phy_20nm.c index b7c621d94981..c9752b991744 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c @@ -129,15 +129,15 @@ static void dsi_20nm_phy_disable(struct msm_dsi_phy *= phy) dsi_20nm_phy_regulator_ctrl(phy, false); } =20 +static const struct regulator_bulk_data dsi_phy_20nm_regulators[] =3D { + { .supply =3D "vddio", .init_load_uA =3D 100000 }, /* 1.8 V */ + { .supply =3D "vcca", .init_load_uA =3D 10000 }, /* 1.0 V */ +}; + const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs =3D { .has_phy_regulator =3D true, - .reg_cfg =3D { - .num =3D 2, - .regs =3D { - {"vddio", 100000}, /* 1.8 V */ - {"vcca", 10000}, /* 1.0 V */ - }, - }, + .regulator_data =3D dsi_phy_20nm_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_20nm_regulators), .ops =3D { .enable =3D dsi_20nm_phy_enable, .disable =3D dsi_20nm_phy_disable, diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c b/drivers/gpu/drm/m= sm/dsi/phy/dsi_phy_28nm.c index 6beba387640d..578c671a3bb1 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c @@ -769,14 +769,14 @@ static void dsi_28nm_phy_disable(struct msm_dsi_phy *= phy) wmb(); } =20 +static const struct regulator_bulk_data dsi_phy_28nm_regulators[] =3D { + { .supply =3D "vddio", .init_load_uA =3D 100000 }, +}; + const struct msm_dsi_phy_cfg dsi_phy_28nm_hpm_cfgs =3D { .has_phy_regulator =3D true, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vddio", 100000}, - }, - }, + .regulator_data =3D dsi_phy_28nm_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_28nm_regulators), .ops =3D { .enable =3D dsi_28nm_phy_enable, .disable =3D dsi_28nm_phy_disable, @@ -792,12 +792,8 @@ const struct msm_dsi_phy_cfg dsi_phy_28nm_hpm_cfgs =3D= { =20 const struct msm_dsi_phy_cfg dsi_phy_28nm_hpm_famb_cfgs =3D { .has_phy_regulator =3D true, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vddio", 100000}, - }, - }, + .regulator_data =3D dsi_phy_28nm_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_28nm_regulators), .ops =3D { .enable =3D dsi_28nm_phy_enable, .disable =3D dsi_28nm_phy_disable, @@ -813,12 +809,8 @@ const struct msm_dsi_phy_cfg dsi_phy_28nm_hpm_famb_cfg= s =3D { =20 const struct msm_dsi_phy_cfg dsi_phy_28nm_lp_cfgs =3D { .has_phy_regulator =3D true, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vddio", 100000}, /* 1.8 V */ - }, - }, + .regulator_data =3D dsi_phy_28nm_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_28nm_regulators), .ops =3D { .enable =3D dsi_28nm_phy_enable, .disable =3D dsi_28nm_phy_disable, diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c b/drivers/gpu/= drm/msm/dsi/phy/dsi_phy_28nm_8960.c index 2e942b10fffa..fba1ba88de01 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c @@ -648,14 +648,14 @@ static void dsi_28nm_phy_disable(struct msm_dsi_phy *= phy) wmb(); } =20 +static const struct regulator_bulk_data dsi_phy_28nm_8960_regulators[] =3D= { + { .supply =3D "vddio", .init_load_uA =3D 100000 }, /* 1.8 V */ +}; + const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs =3D { .has_phy_regulator =3D true, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vddio", 100000}, /* 1.8 V */ - }, - }, + .regulator_data =3D dsi_phy_28nm_8960_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_28nm_8960_regulators), .ops =3D { .enable =3D dsi_28nm_phy_enable, .disable =3D dsi_28nm_phy_disable, diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/ms= m/dsi/phy/dsi_phy_7nm.c index 9c7c49ce1200..cef801c58cdf 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c @@ -1036,14 +1036,18 @@ static void dsi_7nm_phy_disable(struct msm_dsi_phy = *phy) DBG("DSI%d PHY disabled", phy->id); } =20 +static const struct regulator_bulk_data dsi_phy_7nm_36mA_regulators[] =3D { + { .supply =3D "vdds", .init_load_uA =3D 36000 }, +}; + +static const struct regulator_bulk_data dsi_phy_7nm_37750uA_regulators[] = =3D { + { .supply =3D "vdds", .init_load_uA =3D 37550 }, +}; + const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs =3D { .has_phy_lane =3D true, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vdds", 36000}, - }, - }, + .regulator_data =3D dsi_phy_7nm_36mA_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_7nm_36mA_regulators), .ops =3D { .enable =3D dsi_7nm_phy_enable, .disable =3D dsi_7nm_phy_disable, @@ -1065,12 +1069,8 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs =3D { =20 const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs =3D { .has_phy_lane =3D true, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vdds", 36000}, - }, - }, + .regulator_data =3D dsi_phy_7nm_36mA_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_7nm_36mA_regulators), .ops =3D { .enable =3D dsi_7nm_phy_enable, .disable =3D dsi_7nm_phy_disable, @@ -1087,12 +1087,8 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs = =3D { =20 const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs =3D { .has_phy_lane =3D true, - .reg_cfg =3D { - .num =3D 1, - .regs =3D { - {"vdds", 37550}, - }, - }, + .regulator_data =3D dsi_phy_7nm_37750uA_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_phy_7nm_37750uA_regulators), .ops =3D { .enable =3D dsi_7nm_phy_enable, .disable =3D dsi_7nm_phy_disable, --=20 2.37.1.455.g008518b4e5-goog From nobody Tue Apr 14 15:42:45 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3B5CC00140 for ; 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Tue, 02 Aug 2022 15:37:59 -0700 (PDT) From: Douglas Anderson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, Mark Brown , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Douglas Anderson , Daniel Vetter , David Airlie , Jonathan Marek , =?UTF-8?q?Jos=C3=A9=20Exp=C3=B3sito?= , Rajeev Nandan , Sean Paul , Stephen Boyd , Vladimir Lypak , linux-kernel@vger.kernel.org Subject: [PATCH v3 6/6] drm/msm/dsi: Improve dsi_phy_driver_probe() probe error handling Date: Tue, 2 Aug 2022 15:37:38 -0700 Message-Id: <20220802153434.v3.6.I969118a35934a0e5007fe4f80e3e28e9c0b7602a@changeid> X-Mailer: git-send-email 2.37.1.455.g008518b4e5-goog In-Reply-To: <20220802223738.898592-1-dianders@chromium.org> References: <20220802223738.898592-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The dsi_phy_driver_probe() function has a "goto fail" for no reason. Change it to just always return directly when it sees an error. Make this simpler by leveraging dev_err_probe() which is designed to make code like this shorter / simpler. Signed-off-by: Douglas Anderson Reviewed-by: Abhinav Kumar Reviewed-by: Dmitry Baryshkov --- Changes in v3: - ("Improve dsi_phy_driver_probe() probe error handling") new for v3. drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 74 ++++++++++----------------- 1 file changed, 27 insertions(+), 47 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/ds= i/phy/dsi_phy.c index 0a00f9b73fc5..57cd525de7a1 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c @@ -621,12 +621,9 @@ static int dsi_phy_driver_probe(struct platform_device= *pdev) phy->pdev =3D pdev; =20 phy->id =3D dsi_phy_get_id(phy); - if (phy->id < 0) { - ret =3D phy->id; - DRM_DEV_ERROR(dev, "%s: couldn't identify PHY index, %d\n", - __func__, ret); - goto fail; - } + if (phy->id < 0) + return dev_err_probe(dev, phy->id, + "Couldn't identify PHY index\n"); =20 phy->regulator_ldo_mode =3D of_property_read_bool(dev->of_node, "qcom,dsi-phy-regulator-ldo-mode"); @@ -634,88 +631,71 @@ static int dsi_phy_driver_probe(struct platform_devic= e *pdev) phy->cphy_mode =3D (phy_type =3D=3D PHY_TYPE_CPHY); =20 phy->base =3D msm_ioremap_size(pdev, "dsi_phy", &phy->base_size); - if (IS_ERR(phy->base)) { - DRM_DEV_ERROR(dev, "%s: failed to map phy base\n", __func__); - ret =3D -ENOMEM; - goto fail; - } + if (IS_ERR(phy->base)) + return dev_err_probe(dev, PTR_ERR(phy->base), + "Failed to map phy base\n"); =20 phy->pll_base =3D msm_ioremap_size(pdev, "dsi_pll", &phy->pll_size); - if (IS_ERR(phy->pll_base)) { - DRM_DEV_ERROR(&pdev->dev, "%s: failed to map pll base\n", __func__); - ret =3D -ENOMEM; - goto fail; - } + if (IS_ERR(phy->pll_base)) + return dev_err_probe(dev, PTR_ERR(phy->pll_base), + "Failed to map pll base\n"); =20 if (phy->cfg->has_phy_lane) { phy->lane_base =3D msm_ioremap_size(pdev, "dsi_phy_lane", &phy->lane_siz= e); - if (IS_ERR(phy->lane_base)) { - DRM_DEV_ERROR(&pdev->dev, "%s: failed to map phy lane base\n", __func__= ); - ret =3D -ENOMEM; - goto fail; - } + if (IS_ERR(phy->lane_base)) + return dev_err_probe(dev, PTR_ERR(phy->lane_base), + "Failed to map phy lane base\n"); } =20 if (phy->cfg->has_phy_regulator) { phy->reg_base =3D msm_ioremap_size(pdev, "dsi_phy_regulator", &phy->reg_= size); - if (IS_ERR(phy->reg_base)) { - DRM_DEV_ERROR(&pdev->dev, "%s: failed to map phy regulator base\n", __f= unc__); - ret =3D -ENOMEM; - goto fail; - } + if (IS_ERR(phy->reg_base)) + return dev_err_probe(dev, PTR_ERR(phy->reg_base), + "Failed to map phy regulator base\n"); } =20 if (phy->cfg->ops.parse_dt_properties) { ret =3D phy->cfg->ops.parse_dt_properties(phy); if (ret) - goto fail; + return ret; } =20 ret =3D devm_regulator_bulk_get_const(dev, phy->cfg->num_regulators, phy->cfg->regulator_data, &phy->supplies); if (ret) - goto fail; + return ret; =20 phy->ahb_clk =3D msm_clk_get(pdev, "iface"); - if (IS_ERR(phy->ahb_clk)) { - DRM_DEV_ERROR(dev, "%s: Unable to get ahb clk\n", __func__); - ret =3D PTR_ERR(phy->ahb_clk); - goto fail; - } + if (IS_ERR(phy->ahb_clk)) + return dev_err_probe(dev, PTR_ERR(phy->ahb_clk), + "Unable to get ahb clk\n"); =20 /* PLL init will call into clk_register which requires * register access, so we need to enable power and ahb clock. */ ret =3D dsi_phy_enable_resource(phy); if (ret) - goto fail; + return ret; =20 if (phy->cfg->ops.pll_init) { ret =3D phy->cfg->ops.pll_init(phy); - if (ret) { - DRM_DEV_INFO(dev, - "%s: pll init failed: %d, need separate pll clk driver\n", - __func__, ret); - goto fail; - } + if (ret) + return dev_err_probe(dev, ret, + "PLL init failed; need separate clk driver\n"); } =20 ret =3D devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, phy->provided_clocks); - if (ret) { - DRM_DEV_ERROR(dev, "%s: failed to register clk provider: %d\n", __func__= , ret); - goto fail; - } + if (ret) + return dev_err_probe(dev, ret, + "Failed to register clk provider\n"); =20 dsi_phy_disable_resource(phy); =20 platform_set_drvdata(pdev, phy); =20 return 0; - -fail: - return ret; } =20 static struct platform_driver dsi_phy_platform_driver =3D { --=20 2.37.1.455.g008518b4e5-goog