From nobody Sun Apr 12 04:20:59 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1B6BC00140 for ; Tue, 2 Aug 2022 05:32:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235682AbiHBFcY (ORCPT ); Tue, 2 Aug 2022 01:32:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230290AbiHBFcV (ORCPT ); Tue, 2 Aug 2022 01:32:21 -0400 Received: from wout3-smtp.messagingengine.com (wout3-smtp.messagingengine.com [64.147.123.19]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E81933D5B2; Mon, 1 Aug 2022 22:32:20 -0700 (PDT) Received: from compute2.internal (compute2.nyi.internal [10.202.2.46]) by mailout.west.internal (Postfix) with ESMTP id 61127320084E; Tue, 2 Aug 2022 01:32:19 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute2.internal (MEProxy); Tue, 02 Aug 2022 01:32:20 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm1; t=1659418338; x=1659504738; bh=rb jmZkkk6X840fiGkFSA29gDLZhKU9eVHRzenL4cBYo=; b=I8GLtdlMaokbsOUJpD G3yvCu0flCzmXUVObfm49uDZmlvfZFBAQPk5EYZKCinJy+nQ1ddqsegtOhJVlEHJ Q97ugQeI2Tf92BPrDEaBWveGf96r5NQqC5CUwSXtjD2uan6+nDMvKFNx7CuWlWcG Nm48j9JxcoNJj1RwgyK7cdErKEdeGOsgt1b9oQFE2PfN1iTFw51w/z48OTLdcZfc CRyZ56oy9i0hAhilBZq4741HLVtJMCab2kc+UWT9uY5ikz3vCW9JaRdNX3PdIJbo WNDCy0vWLGFsEjm/miEYNGdk/huOSSLTaB5/Tfqx55GYBXKbk7Ez13HqJmcK6eEX y0PQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :feedback-id:feedback-id:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; t=1659418338; x=1659504738; bh=rbjmZkkk6X840 fiGkFSA29gDLZhKU9eVHRzenL4cBYo=; b=jb488zcMgHsnIHyypHZPExSR9CbpZ qRWR/P20NT2oJIJJlYqguu+XvjjgRiZQrqcP6lqX0u7SvDnbKEb6BLcLOW5Kp1It izTda/WLyDyI52ylz1Rfr+/sPbbUThYWOi7EVbbbNkRA11/TiaT4P6/AFLbQM6bF CfguOLFOxY7Ju1olWK25S4A0C8H96tIzVmG9NJwDEB1lXOYm9oKkIrbGh8CEejHv 4Zs1Cu4rpx+VmA0jeXx54prIQ4HkKG8pBsvr7IMH1RkbpxZ0NxrUwJ9GZJHNh2zl E8XObz0Z5mctRhYVtOjtGBlEOgp9Lb68dfRa2Pvfe3Mezq9bRNza8/HJg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvfedrvddvgedgleejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufgrmhhu vghlucfjohhllhgrnhguuceoshgrmhhuvghlsehshhholhhlrghnugdrohhrgheqnecugg ftrfgrthhtvghrnhepudekteeuudehtdelteevgfduvddvjefhfedulefgudevgeeghefg udefiedtveetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepshgrmhhuvghlsehshhholhhlrghnugdrohhrgh X-ME-Proxy: Feedback-ID: i0ad843c9:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 2 Aug 2022 01:32:18 -0400 (EDT) From: Samuel Holland To: Liam Girdwood , Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Rob Herring Cc: Samuel Holland , Maxime Ripard , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev Subject: [PATCH v2 1/4] dt-bindings: sram: sunxi-sram: Add optional regulators child Date: Tue, 2 Aug 2022 00:32:10 -0500 Message-Id: <20220802053213.3645-2-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220802053213.3645-1-samuel@sholland.org> References: <20220802053213.3645-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Some sunxi SoCs have in-package regulators controlled by a register in the system control MMIO block. Allow a child node for these regulators in addition to SRAM child nodes. Signed-off-by: Samuel Holland --- Changes in v2: - New patch for v2 .../bindings/sram/allwinner,sun4i-a10-system-control.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-sys= tem-control.yaml b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a= 10-system-control.yaml index 1c426c211e36..cc57836b2906 100644 --- a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-con= trol.yaml +++ b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-con= trol.yaml @@ -56,6 +56,9 @@ properties: =20 ranges: true =20 + regulators: + type: object + patternProperties: "^sram@[a-z0-9]+": type: object --=20 2.35.1 From nobody Sun Apr 12 04:20:59 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A092C19F28 for ; Tue, 2 Aug 2022 05:32:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235689AbiHBFcb (ORCPT ); Tue, 2 Aug 2022 01:32:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47014 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235692AbiHBFcY (ORCPT ); Tue, 2 Aug 2022 01:32:24 -0400 Received: from wout3-smtp.messagingengine.com (wout3-smtp.messagingengine.com [64.147.123.19]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C0CD1419B5; Mon, 1 Aug 2022 22:32:23 -0700 (PDT) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id 3DDE6320014C; Tue, 2 Aug 2022 01:32:22 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute4.internal (MEProxy); Tue, 02 Aug 2022 01:32:23 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm1; t=1659418341; x=1659504741; bh=Wt MXBT+59nWEb2J1x8DNZxQ7gooH85ypsgA1qbaYSaE=; b=tXm963gc+4S4p0cn16 9zp3SYOM3N3+Qzw95uABkmcQoWsuaTjCWZqTE2HEMwKeVMQErigomgJYyS8dCbhs Ele0GjF2wgEVbObGKKqGRGobv4yWC0y7s6fTlNAjmf8IXC6doDSTAv6tBh08AgSq ZhGZBIhoYUoyNE6qyirIETObOHzTY2pvZhBy/LFaabca/xFUr5uGzmvewy74pFSU 4/sVH5YZ8DxIwAMohzSgFbXqRpKFCWvCbgl+dB5n3pY4iQxGb9YbJnoOQVrV52tb odzomMQvGzqHgFeHX0A5oAd5hhhaOxwNQ3CvEiNbJf79o64gI+ZnnaKbm/8kuBZE 8v/w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :feedback-id:feedback-id:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; t=1659418341; x=1659504741; bh=WtMXBT+59nWEb 2J1x8DNZxQ7gooH85ypsgA1qbaYSaE=; b=g1FdcSV+dV9CHdQ7BpcQgj1BJOBsP sLoIk6DdAAzfKeME0wDPttDcrRvOtmMMaRhIgTrvNymATa4TMAeh8HQucV2ORL/5 cMLjVFadIk7tAdBAe98HdRU4MTnQcw2EnAcNr1YRYAIrkJZz5p7u2NmHS/9jhN1P B6pzf6JjSHA5Y4lDFFhFmw3n1P7HLH2Y65FzKZU3oabguszC7XnmpO1FeuHvqn8Y yu3nkoOgfNoyFxGL6SAnkdO6UOrKcACpRNDCaEKJYmlvdwrOnsH41b9TSZF4KqI2 n4LIyryqenXxmHejo5cfCtljSHQR7Gnm6tWn/mmR2/jjIs4aMuaC3YFAg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvfedrvddvgedgleejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufgrmhhu vghlucfjohhllhgrnhguuceoshgrmhhuvghlsehshhholhhlrghnugdrohhrgheqnecugg ftrfgrthhtvghrnhepudekteeuudehtdelteevgfduvddvjefhfedulefgudevgeeghefg udefiedtveetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepshgrmhhuvghlsehshhholhhlrghnugdrohhrgh X-ME-Proxy: Feedback-ID: i0ad843c9:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 2 Aug 2022 01:32:20 -0400 (EDT) From: Samuel Holland To: Liam Girdwood , Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Rob Herring Cc: Samuel Holland , Maxime Ripard , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev Subject: [PATCH v2 2/4] soc: sunxi: sram: Only iterate over SRAM children Date: Tue, 2 Aug 2022 00:32:11 -0500 Message-Id: <20220802053213.3645-3-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220802053213.3645-1-samuel@sholland.org> References: <20220802053213.3645-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Now that a "regulators" child is accepted by the controller binding, the debugfs show routine must be explicitly limited to "sram" children. Otherwise, it will crash because the "regulators" node has no address. Signed-off-by: Samuel Holland --- Changes in v2: - New patch for v2 drivers/soc/sunxi/sunxi_sram.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c index a8f3876963a0..b3016b9698fb 100644 --- a/drivers/soc/sunxi/sunxi_sram.c +++ b/drivers/soc/sunxi/sunxi_sram.c @@ -120,6 +120,9 @@ static int sunxi_sram_show(struct seq_file *s, void *da= ta) seq_puts(s, "--------------------\n\n"); =20 for_each_child_of_node(sram_dev->of_node, sram_node) { + if (!of_node_name_eq(sram_node, "sram")) + continue; + sram_addr_p =3D of_get_address(sram_node, 0, NULL, NULL); =20 seq_printf(s, "sram@%08x\n", --=20 2.35.1 From nobody Sun Apr 12 04:20:59 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A370CC19F2B for ; Tue, 2 Aug 2022 05:32:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235761AbiHBFce (ORCPT ); Tue, 2 Aug 2022 01:32:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235717AbiHBFc3 (ORCPT ); Tue, 2 Aug 2022 01:32:29 -0400 Received: from wout3-smtp.messagingengine.com (wout3-smtp.messagingengine.com [64.147.123.19]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 871AA1E3C2; Mon, 1 Aug 2022 22:32:26 -0700 (PDT) Received: from compute2.internal (compute2.nyi.internal [10.202.2.46]) by mailout.west.internal (Postfix) with ESMTP id 062B3320084E; Tue, 2 Aug 2022 01:32:24 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute2.internal (MEProxy); Tue, 02 Aug 2022 01:32:26 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm1; t=1659418344; x=1659504744; bh=Cd xH8UECdWP/FcfgxxRpxsH2KZRjenbkyAWm1xRm+GE=; b=G4FKdF+nAkhHdDc9xU V11QudM9pIImMjuaM/1DmummhBzGUwRaxnApIpJO9PT+x8KJeUa4RFgyb8cLhSUb OdB7KHKZxTBtuMRSEc1x/eFPx21cpBReM3SJbtjPsts7kBVmKf+KeSeH6x4On0oL riHKBDio9FODZoJqxjgEeDECVSuuw/p/CtT/00y435ix+pR8oQJrA/Quyx2cs5rh yfRUGqlokjL/9oW6w60tbGRe7kUHjaLFciu13qnxPPLGlRUhFd6CAaudnNksciyX wELgA9FRSd6/af82YdqcRhffq2jfaaFsg45VI/dcChtbRo9ztElWRdyZX6TgWpWJ 0rYw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :feedback-id:feedback-id:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; t=1659418344; x=1659504744; bh=CdxH8UECdWP/F cfgxxRpxsH2KZRjenbkyAWm1xRm+GE=; b=bf0f5UIm+QtFpyTXIdcU8+e1WUEMp 5PN8EQ6pLBYw1Cjfqld+K7Mc4oganQYhXhavV53ZUqPtDcTr2N/2FnkmKkzkNd+6 i0IIcCHOf73WdehybnnyJfE4gEGs28O7/6gnllHQVWUqkqJlMwNyfMhJRBHM7kHL QXlE4XRp+N4zmEANOUJlY8Q0IY3aZLqucV82g2mh5uqWUn55Q0fs+h7Lm0rumr1q tXZQSWvUoOsXPw7daooIMVemBJ7mC3sgEgpSfZ4r23BlBRSROLCcJahxQQXfesRu fIB0wY1dQnsFVtBOHkIhPrx/BifYd/L6hPyTn8Xu2dZ/knJfWdnPv+sDQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvfedrvddvgedgleejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufgrmhhu vghlucfjohhllhgrnhguuceoshgrmhhuvghlsehshhholhhlrghnugdrohhrgheqnecugg ftrfgrthhtvghrnhepgffhvefhgfehjeehgfekheeuffegheffjeegheeuudeufeffhffh ueeihfeufffhnecuffhomhgrihhnpeguvghvihgtvghtrhgvvgdrohhrghenucevlhhush htvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehsrghmuhgvlhesshhh ohhllhgrnhgurdhorhhg X-ME-Proxy: Feedback-ID: i0ad843c9:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 2 Aug 2022 01:32:23 -0400 (EDT) From: Samuel Holland To: Liam Girdwood , Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Rob Herring Cc: Samuel Holland , Maxime Ripard , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev Subject: [PATCH v2 3/4] regulator: dt-bindings: Add Allwinner D1 LDOs Date: Tue, 2 Aug 2022 00:32:12 -0500 Message-Id: <20220802053213.3645-4-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220802053213.3645-1-samuel@sholland.org> References: <20220802053213.3645-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Allwinner D1 SoC contains two pairs of in-package LDOs. One pair is for general purpose use. LDOA generally powers the board's 1.8 V rail. LDOB generally powers the in-package DRAM, where applicable. The other pair of LDOs powers the analog power domains inside the SoC, including the audio codec, thermal sensor, and ADCs. These LDOs require a 0.9 V bandgap voltage reference. The calibration value for the voltage reference is stored in an eFuse, accessed via an NVMEM cell. Neither LDO control register is in its own MMIO range; instead, each regulator device relies on a regmap/syscon exported by its parent. Signed-off-by: Samuel Holland --- Changes in v2: - Remove syscon property from bindings - Update binding examples to fix warnings and provide context .../allwinner,sun20i-d1-analog-ldos.yaml | 65 +++++++++++++++++++ .../allwinner,sun20i-d1-system-ldos.yaml | 57 ++++++++++++++++ 2 files changed, 122 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/allwinner,s= un20i-d1-analog-ldos.yaml create mode 100644 Documentation/devicetree/bindings/regulator/allwinner,s= un20i-d1-system-ldos.yaml diff --git a/Documentation/devicetree/bindings/regulator/allwinner,sun20i-d= 1-analog-ldos.yaml b/Documentation/devicetree/bindings/regulator/allwinner,= sun20i-d1-analog-ldos.yaml new file mode 100644 index 000000000000..19c984ef4e53 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-analo= g-ldos.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/allwinner,sun20i-d1-analog-ld= os.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner D1 Analog LDOs + +description: + Allwinner D1 contains a set of LDOs which are designed to supply analog = power + inside and outside the SoC. They are controlled by a register within the= audio + codec MMIO space, but which is not part of the audio codec clock/reset d= omain. + +maintainers: + - Samuel Holland + +properties: + compatible: + enum: + - allwinner,sun20i-d1-analog-ldos + + nvmem-cells: + items: + - description: NVMEM cell for the calibrated bandgap reference trim = value + + nvmem-cell-names: + items: + - const: bg_trim + +patternProperties: + "^(aldo|hpldo)$": + type: object + $ref: regulator.yaml# + +required: + - compatible + - nvmem-cells + - nvmem-cell-names + +unevaluatedProperties: false + +examples: + - | + audio-codec@2030000 { + compatible =3D "simple-mfd", "syscon"; + reg =3D <0x2030000 0x1000>; + + regulators { + compatible =3D "allwinner,sun20i-d1-analog-ldos"; + nvmem-cells =3D <&bg_trim>; + nvmem-cell-names =3D "bg_trim"; + + reg_aldo: aldo { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + + reg_hpldo: hpldo { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/regulator/allwinner,sun20i-d= 1-system-ldos.yaml b/Documentation/devicetree/bindings/regulator/allwinner,= sun20i-d1-system-ldos.yaml new file mode 100644 index 000000000000..c95030a827d6 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-syste= m-ldos.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/allwinner,sun20i-d1-system-ld= os.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner D1 System LDOs + +description: + Allwinner D1 contains a pair of general-purpose LDOs which are designed = to + supply power inside and outside the SoC. They are controlled by a regist= er + within the system control MMIO space. + +maintainers: + - Samuel Holland + +properties: + compatible: + enum: + - allwinner,sun20i-d1-system-ldos + +patternProperties: + "^(ldoa|ldob)$": + type: object + $ref: regulator.yaml# + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + syscon@3000000 { + compatible =3D "allwinner,sun20i-d1-system-control"; + reg =3D <0x3000000 0x1000>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + + regulators { + compatible =3D "allwinner,sun20i-d1-system-ldos"; + + reg_ldoa: ldoa { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + + reg_ldob: ldob { + regulator-name =3D "vcc-dram"; + regulator-min-microvolt =3D <1500000>; + regulator-max-microvolt =3D <1500000>; + }; + }; + }; + +... --=20 2.35.1 From nobody Sun Apr 12 04:20:59 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25AA0C00140 for ; Tue, 2 Aug 2022 05:32:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235812AbiHBFci (ORCPT ); Tue, 2 Aug 2022 01:32:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47170 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235725AbiHBFca (ORCPT ); Tue, 2 Aug 2022 01:32:30 -0400 Received: from wout3-smtp.messagingengine.com (wout3-smtp.messagingengine.com [64.147.123.19]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 59C59419B4; Mon, 1 Aug 2022 22:32:29 -0700 (PDT) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.west.internal (Postfix) with ESMTP id D0FEC320029B; Tue, 2 Aug 2022 01:32:27 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Tue, 02 Aug 2022 01:32:28 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm1; t=1659418347; x=1659504747; bh=R/ +5h2/DAfq0YCIGUVxS5EwHlMEbm7OFJH1J6Sy47ck=; b=sspf3FLqhx1v+GhxFE twX3YF012CRJpjcX9YjZXud3u7bRq8x+B2WKBIJsrHCcB7dwtDmxLjuWFKrcGfff GNdJpt2y8RXLvbXGosDqxua1pggG543qaj/WE48u/fwenDpEKaVjeLJKtQY1zNAk EhHA/SRd0mXHmCVxpjPZtclvLW7eKBdzdPknj+fikGQTZ7mNAm6J6bODU5EKTv6M iXkEfEI4OsiwHF2WmFVdK7e6ytfQRnJEq+O4dv6v54ZGlOsbrljRKcEqayb57lUN fjL7hbh+XLQ/YsEXmXKcMFjpLHqEmzlX9UORnI4mm89YfgG15ZwJiEH84RWLJ2nk 6sbw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :feedback-id:feedback-id:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; t=1659418347; x=1659504747; bh=R/+5h2/DAfq0Y CIGUVxS5EwHlMEbm7OFJH1J6Sy47ck=; b=2MUbs1AmBJuyWTbT277VEKlR+Sfkl 8vHD+tbQowt3KYTUz87uWbtHQB5bSbnT9U/G/yY+61dLwDGuGlnZiMJeNASBlv/u sJWJCFStJRi2EUDsSY2HmQ4VBOFBDPaW1/jrfBIYwnx9YSWnXcv/eMOVReUBRH+G lrcv3wtq0vWYbnc3FhR/QBLIFcA9JD6nUklCq+EJYUH0xxLQJnVmhK2ivJmQSxUZ zsvROlA2JvcIL+xLW9mr4r6q6FP/y2PrmWa/b12HezAt7dWWhAkAzROwXYb4MgZa xJKmW4Oda1Iac6onGp/ATYmaCa3tfOdrDWHrqXNJQCNC4xR8qQOiY8Tmw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvfedrvddvgedgleejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufgrmhhu vghlucfjohhllhgrnhguuceoshgrmhhuvghlsehshhholhhlrghnugdrohhrgheqnecugg ftrfgrthhtvghrnhepudekteeuudehtdelteevgfduvddvjefhfedulefgudevgeeghefg udefiedtveetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepshgrmhhuvghlsehshhholhhlrghnugdrohhrgh X-ME-Proxy: Feedback-ID: i0ad843c9:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 2 Aug 2022 01:32:26 -0400 (EDT) From: Samuel Holland To: Liam Girdwood , Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Rob Herring Cc: Samuel Holland , Maxime Ripard , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev Subject: [PATCH v2 4/4] regulator: sun20i: Add support for Allwinner D1 LDOs Date: Tue, 2 Aug 2022 00:32:13 -0500 Message-Id: <20220802053213.3645-5-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220802053213.3645-1-samuel@sholland.org> References: <20220802053213.3645-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" D1 contains two pairs of LDOs. Since they have similar bindings, and they always exist together, put them in a single driver. The analog LDOs are relatively boring, with a single linear range. Their one quirk is that a bandgap reference must be calibrated for them to produce the correct voltage. The system LDOs have the complication that their voltage step is not an integer, so a custom .list_voltage is needed to get the rounding right. Signed-off-by: Samuel Holland --- Changes in v2: - Use decimal numbers for .n_voltages instead of field widths - Get the regmap from the parent device instead of a property/phandle drivers/regulator/Kconfig | 8 + drivers/regulator/Makefile | 1 + drivers/regulator/sun20i-regulator.c | 232 +++++++++++++++++++++++++++ 3 files changed, 241 insertions(+) create mode 100644 drivers/regulator/sun20i-regulator.c diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index cbe0f96ca342..20a22f900bb2 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -1234,6 +1234,14 @@ config REGULATOR_STW481X_VMMC This driver supports the internal VMMC regulator in the STw481x PMIC chips. =20 +config REGULATOR_SUN20I + tristate "Allwinner D1 internal LDOs" + depends on ARCH_SUNXI || COMPILE_TEST + depends on MFD_SYSCON && NVMEM + default ARCH_SUNXI + help + This driver supports the internal LDOs in the Allwinner D1 SoC. + config REGULATOR_SY7636A tristate "Silergy SY7636A voltage regulator" help diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 8d3ee8b6d41d..cb3ac9290fc3 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -145,6 +145,7 @@ obj-$(CONFIG_REGULATOR_STM32_VREFBUF) +=3D stm32-vrefbu= f.o obj-$(CONFIG_REGULATOR_STM32_PWR) +=3D stm32-pwr.o obj-$(CONFIG_REGULATOR_STPMIC1) +=3D stpmic1_regulator.o obj-$(CONFIG_REGULATOR_STW481X_VMMC) +=3D stw481x-vmmc.o +obj-$(CONFIG_REGULATOR_SUN20I) +=3D sun20i-regulator.o obj-$(CONFIG_REGULATOR_SY7636A) +=3D sy7636a-regulator.o obj-$(CONFIG_REGULATOR_SY8106A) +=3D sy8106a-regulator.o obj-$(CONFIG_REGULATOR_SY8824X) +=3D sy8824x.o diff --git a/drivers/regulator/sun20i-regulator.c b/drivers/regulator/sun20= i-regulator.c new file mode 100644 index 000000000000..789a68829630 --- /dev/null +++ b/drivers/regulator/sun20i-regulator.c @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright (c) 2021-2022 Samuel Holland +// + +#include +#include +#include +#include +#include +#include +#include + +#define SUN20I_POWER_REG 0x348 + +#define SUN20I_SYS_LDO_CTRL_REG 0x150 + +struct sun20i_regulator_data { + int (*init)(struct device *dev, + struct regmap *regmap); + const struct regulator_desc *descs; + unsigned int ndescs; +}; + +static int sun20i_d1_analog_ldos_init(struct device *dev, struct regmap *r= egmap) +{ + u8 bg_trim; + int ret; + + ret =3D nvmem_cell_read_u8(dev, "bg_trim", &bg_trim); + if (ret) + return dev_err_probe(dev, ret, "Failed to get bg_trim value\n"); + + /* The default value corresponds to 900 mV. */ + if (!bg_trim) + bg_trim =3D 0x19; + + return regmap_update_bits(regmap, SUN20I_POWER_REG, + GENMASK(7, 0), bg_trim); +} + +static const struct regulator_ops sun20i_d1_analog_ldo_ops =3D { + .list_voltage =3D regulator_list_voltage_linear, + .map_voltage =3D regulator_map_voltage_linear, + .set_voltage_sel =3D regulator_set_voltage_sel_regmap, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, + .enable =3D regulator_enable_regmap, + .disable =3D regulator_disable_regmap, + .is_enabled =3D regulator_is_enabled_regmap, +}; + +static const struct regulator_desc sun20i_d1_analog_ldo_descs[] =3D { + { + .name =3D "aldo", + .supply_name =3D "vdd33", + .of_match =3D "aldo", + .ops =3D &sun20i_d1_analog_ldo_ops, + .type =3D REGULATOR_VOLTAGE, + .owner =3D THIS_MODULE, + .n_voltages =3D 8, + .min_uV =3D 1650000, + .uV_step =3D 50000, + .vsel_reg =3D SUN20I_POWER_REG, + .vsel_mask =3D GENMASK(14, 12), + .enable_reg =3D SUN20I_POWER_REG, + .enable_mask =3D BIT(31), + }, + { + .name =3D "hpldo", + .supply_name =3D "hpldoin", + .of_match =3D "hpldo", + .ops =3D &sun20i_d1_analog_ldo_ops, + .type =3D REGULATOR_VOLTAGE, + .owner =3D THIS_MODULE, + .n_voltages =3D 8, + .min_uV =3D 1650000, + .uV_step =3D 50000, + .vsel_reg =3D SUN20I_POWER_REG, + .vsel_mask =3D GENMASK(10, 8), + .enable_reg =3D SUN20I_POWER_REG, + .enable_mask =3D BIT(30), + }, +}; + +static const struct sun20i_regulator_data sun20i_d1_analog_ldos =3D { + .init =3D sun20i_d1_analog_ldos_init, + .descs =3D sun20i_d1_analog_ldo_descs, + .ndescs =3D ARRAY_SIZE(sun20i_d1_analog_ldo_descs), +}; + +/* regulator_list_voltage_linear() modified for the non-integral uV_step. = */ +static int sun20i_d1_system_ldo_list_voltage(struct regulator_dev *rdev, + unsigned int selector) +{ + const struct regulator_desc *desc =3D rdev->desc; + unsigned int uV; + + if (selector >=3D desc->n_voltages) + return -EINVAL; + + uV =3D desc->min_uV + (desc->uV_step * selector); + + /* Produce correctly-rounded absolute voltages. */ + return uV + ((selector + 1 + (desc->min_uV % 4)) / 3); +} + +static const struct regulator_ops sun20i_d1_system_ldo_ops =3D { + .list_voltage =3D sun20i_d1_system_ldo_list_voltage, + .map_voltage =3D regulator_map_voltage_ascend, + .set_voltage_sel =3D regulator_set_voltage_sel_regmap, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_desc sun20i_d1_system_ldo_descs[] =3D { + { + .name =3D "ldoa", + .supply_name =3D "ldo-in", + .of_match =3D "ldoa", + .ops =3D &sun20i_d1_system_ldo_ops, + .type =3D REGULATOR_VOLTAGE, + .owner =3D THIS_MODULE, + .n_voltages =3D 32, + .min_uV =3D 1600000, + .uV_step =3D 13333, /* repeating */ + .vsel_reg =3D SUN20I_SYS_LDO_CTRL_REG, + .vsel_mask =3D GENMASK(7, 0), + }, + { + .name =3D "ldob", + .supply_name =3D "ldo-in", + .of_match =3D "ldob", + .ops =3D &sun20i_d1_system_ldo_ops, + .type =3D REGULATOR_VOLTAGE, + .owner =3D THIS_MODULE, + .n_voltages =3D 64, + .min_uV =3D 1166666, + .uV_step =3D 13333, /* repeating */ + .vsel_reg =3D SUN20I_SYS_LDO_CTRL_REG, + .vsel_mask =3D GENMASK(15, 8), + }, +}; + +static const struct sun20i_regulator_data sun20i_d1_system_ldos =3D { + .descs =3D sun20i_d1_system_ldo_descs, + .ndescs =3D ARRAY_SIZE(sun20i_d1_system_ldo_descs), +}; + +static const struct of_device_id sun20i_regulator_of_match[] =3D { + { + .compatible =3D "allwinner,sun20i-d1-analog-ldos", + .data =3D &sun20i_d1_analog_ldos, + }, + { + .compatible =3D "allwinner,sun20i-d1-system-ldos", + .data =3D &sun20i_d1_system_ldos, + }, + { }, +}; +MODULE_DEVICE_TABLE(of, sun20i_regulator_of_match); + +static struct regmap *sun20i_regulator_get_regmap(struct device *dev) +{ + struct regmap *regmap; + + /* + * First try the syscon interface. The system control device is not + * compatible with "syscon", so fall back to getting the regmap from + * its platform device. This is ugly, but required for devicetree + * backward compatibility. + */ + regmap =3D syscon_node_to_regmap(dev->parent->of_node); + if (!IS_ERR(regmap)) + return regmap; + + regmap =3D dev_get_regmap(dev->parent, NULL); + if (!regmap) + return ERR_PTR(-EPROBE_DEFER); + + return regmap; +} + +static int sun20i_regulator_probe(struct platform_device *pdev) +{ + const struct sun20i_regulator_data *data; + struct device *dev =3D &pdev->dev; + struct regulator_config config; + struct regmap *regmap; + int ret; + + data =3D of_device_get_match_data(dev); + if (!data) + return -EINVAL; + + regmap =3D sun20i_regulator_get_regmap(dev); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to get regmap\n"); + + if (data->init) { + ret =3D data->init(dev, regmap); + if (ret) + return ret; + } + + config =3D (struct regulator_config) { + .dev =3D dev, + .regmap =3D regmap, + }; + + for (unsigned int i =3D 0; i < data->ndescs; ++i) { + const struct regulator_desc *desc =3D &data->descs[i]; + struct regulator_dev *rdev; + + rdev =3D devm_regulator_register(dev, desc, &config); + if (IS_ERR(rdev)) + return PTR_ERR(rdev); + } + + return 0; +} + +static struct platform_driver sun20i_regulator_driver =3D { + .probe =3D sun20i_regulator_probe, + .driver =3D { + .name =3D "sun20i-regulator", + .of_match_table =3D sun20i_regulator_of_match, + }, +}; +module_platform_driver(sun20i_regulator_driver); + +MODULE_AUTHOR("Samuel Holland "); +MODULE_DESCRIPTION("Allwinner D1 internal LDO driver"); +MODULE_LICENSE("GPL"); --=20 2.35.1