From nobody Sun Apr 19 12:42:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F01DC19F2C for ; Wed, 27 Jul 2022 23:34:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233590AbiG0Xei (ORCPT ); Wed, 27 Jul 2022 19:34:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232904AbiG0Xee (ORCPT ); Wed, 27 Jul 2022 19:34:34 -0400 Received: from mail-pl1-x64a.google.com (mail-pl1-x64a.google.com [IPv6:2607:f8b0:4864:20::64a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E838C56B9D for ; Wed, 27 Jul 2022 16:34:33 -0700 (PDT) Received: by mail-pl1-x64a.google.com with SMTP id s6-20020a170902a50600b0016d2e77252eso174820plq.18 for ; Wed, 27 Jul 2022 16:34:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=reply-to:date:in-reply-to:message-id:mime-version:references :subject:from:to:cc; bh=tcg4fyWcMhApmssB1rrZxLEKjBF7sSie1JOHuz2QyKw=; b=Y22uyc7My63H8qiFF1kgEwUBLMnNiTDQAspI9xMCMaI8CL4pMsFZwEy5qqqu/OAbjk dCkhYEVY81t7juGyB3KIxXTQ16K2PW8Lbb0TiJluF1RHfns+Gpb4V79FfA53W3Jo94he OhcXVYyDhnTAEAhhX4NcAbrMDp1GYhjOIRVOBGVk99IfkIzYylefYMyoW1sFSV14LpXR /loGYZXkjgZj34YAUF1U+FsjpNVxIp22oA9ihhclEeuBB1IqhuA/NrFqXW3aYoCx0I57 74hrMCbtPcUJHybQ8N6HeVjtcLXTs1aNHY455CaZL+xFrrAx8aGJU+hv7v53sWhV6ZIR zeaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:reply-to:date:in-reply-to:message-id :mime-version:references:subject:from:to:cc; bh=tcg4fyWcMhApmssB1rrZxLEKjBF7sSie1JOHuz2QyKw=; b=ZVVVEIXEwIT0wPEEVLh2sYNwiK7p/V7ABD54cy2Hthfr7Cfq7iATSJjT8WaErAnRTJ cQlqQ9o3KjeyJrmVwouH3LbPMfP/rMSbIKf72GfuRS+34w69zIw732i9opXMvB56afCg amVeMRoJDWO4VA1FtBEJS3FBoKi/x/6k1XHEHd72Ms4rBdb0G23sfn0Mrv6iIaxsRifj rP/jGNQ7drlKBfliMb6J0KXv5fWdGJlcmxWiDg5JCGLkRKfYoE6/tXtsYUKSCnYPc4lg F89pbAV+Tp+WV+hsX4BzQ1ezTsFGhntoCjZ7QqKcgR9VvVFeEwnui/okqr0IneetJXkb ToYQ== X-Gm-Message-State: AJIora+piEwL+PekxXlkqkMavd0yhM+uOAMdyTguuCcoqRPV8n9VDCQn AghoO6pSzojFZxKypd6gJ5yJzd+0ZLs= X-Google-Smtp-Source: AGRyM1v9kW5QkJ7txPbJ2wbBnmnKx7n0zh8SlRr9e8pUg1+T0qGL/PY7sqMWVgiX+DZcxx9VtWqNPiGmxJI= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:aa7:9e9b:0:b0:528:2948:e974 with SMTP id p27-20020aa79e9b000000b005282948e974mr24092040pfq.79.1658964873498; Wed, 27 Jul 2022 16:34:33 -0700 (PDT) Reply-To: Sean Christopherson Date: Wed, 27 Jul 2022 23:34:22 +0000 In-Reply-To: <20220727233424.2968356-1-seanjc@google.com> Message-Id: <20220727233424.2968356-2-seanjc@google.com> Mime-Version: 1.0 References: <20220727233424.2968356-1-seanjc@google.com> X-Mailer: git-send-email 2.37.1.359.gd136c6c3e2-goog Subject: [PATCH 1/3] KVM: x86: Refresh PMU after writes to MSR_IA32_PERF_CAPABILITIES From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Refresh the PMU if userspace modifies MSR_IA32_PERF_CAPABILITIES. KVM consumes the vCPU's PERF_CAPABILITIES when enumerating PEBS support, but relies on CPUID updates to refresh the PMU. I.e. KVM will do the wrong thing if userspace stuffs PERF_CAPABILITIES _after_ setting guest CPUID. Opportunistically fix a curly-brace indentation. Fixes: c59a1f106f5c ("KVM: x86/pmu: Add IA32_PEBS_ENABLE MSR emulation for = extended PEBS") Cc: Like Xu Signed-off-by: Sean Christopherson --- arch/x86/kvm/x86.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 5366f884e9a7..362c538285db 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3543,9 +3543,9 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct = msr_data *msr_info) return 1; =20 vcpu->arch.perf_capabilities =3D data; - + kvm_pmu_refresh(vcpu); return 0; - } + } case MSR_EFER: return set_efer(vcpu, msr_info); case MSR_K7_HWCR: --=20 2.37.1.359.gd136c6c3e2-goog From nobody Sun Apr 19 12:42:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21537C04A68 for ; Wed, 27 Jul 2022 23:34:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233766AbiG0Xel (ORCPT ); Wed, 27 Jul 2022 19:34:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233263AbiG0Xeg (ORCPT ); Wed, 27 Jul 2022 19:34:36 -0400 Received: from mail-pj1-x1049.google.com (mail-pj1-x1049.google.com [IPv6:2607:f8b0:4864:20::1049]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80DA9564E4 for ; Wed, 27 Jul 2022 16:34:35 -0700 (PDT) Received: by mail-pj1-x1049.google.com with SMTP id b8-20020a17090a010800b001f1f4fc8178so46892pjb.8 for ; Wed, 27 Jul 2022 16:34:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=reply-to:date:in-reply-to:message-id:mime-version:references :subject:from:to:cc; bh=9adtlHGn9FKeVF+3PI8cEyItaITWCpmMoTEZzIf1mcM=; b=MxgkAjshFD75JkjIup9q/SXMa6S6NoCx9gVLA1H+AQFV5thN3RjNINV2iRYwUHD6EX gJZJ5O1ynmeduCLJQt0/UkNObPn8A7bprprHXX1O8RU88TJH4Nj/EawxCIlt+UveuKZY imPdS/udjs99VBxkQ3Wdy2BojQjLlbsNxP60/mEjJoIbbiL+5sHSiUK2xQkx/Vryn9ZL 7TXOoUPd2hJDRQRohZ2BTJzDf6S1hUtfXrZa3Qfz5kfBPqM9aKib6JvBKenSc6PSP4RG iY4Lm/Sg1Fhy9o1iM78AMxbcBxl8WkMyk0W7p1NSNYYAh3KV6UFdXjB9X2rLfOuGm86e KyHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:reply-to:date:in-reply-to:message-id :mime-version:references:subject:from:to:cc; bh=9adtlHGn9FKeVF+3PI8cEyItaITWCpmMoTEZzIf1mcM=; b=c2sorTPfkl5/QrZNFESPuFV5SZ1gvc52at+25YLAzRcptyz5QOBRRwcCtAmvzOfoQp 7YObShnnKSxvHN87j6BiTfiiRzOdLZI4I3LAmilxMkqqEDbmLIlXh4sbT/os+BcCmDCt UDs+PfDFdwJqjE8+1SeO3aaE2b5eWqLuli1LmaUzkZJTO8PgTHYfEeTDk6DKY2wC7+F9 Ucd8T9WNYbWN4ZzdOY4RqDuVrHpo3Vw+E3FgC2+S+Bksa5ueBUiPGgm2fa3wigpxOYGa AisdOIYmZm1uEoE1ML7znTA5h6yGAMHhYl827wP57JKrBu4/3La5akuF6jmZwSCOtU0r HeBA== X-Gm-Message-State: AJIora/AcV9wNkQKGejwAKf8X0cAFhxED5pY3MwfQfW/TbFk5+X7A/uU uILLMz5tdLn9Ak6AbrMH43Pwgx1SihU= X-Google-Smtp-Source: AGRyM1t4yxhEgp8+BSQkOzsakccZRL77cL08/ZNyF5q5C7BitXgV7iYO7x2oypitk2O1HFgkgsi3N9utlD8= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:d507:b0:16d:7d89:15dc with SMTP id b7-20020a170902d50700b0016d7d8915dcmr14924262plg.31.1658964875032; Wed, 27 Jul 2022 16:34:35 -0700 (PDT) Reply-To: Sean Christopherson Date: Wed, 27 Jul 2022 23:34:23 +0000 In-Reply-To: <20220727233424.2968356-1-seanjc@google.com> Message-Id: <20220727233424.2968356-3-seanjc@google.com> Mime-Version: 1.0 References: <20220727233424.2968356-1-seanjc@google.com> X-Mailer: git-send-email 2.37.1.359.gd136c6c3e2-goog Subject: [PATCH 2/3] KVM: VMX: Use proper type-safe functions for vCPU => LBRs helpers From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Turn vcpu_to_lbr_desc() and vcpu_to_lbr_records() into functions in order to provide type safety, to document exactly what they return, and to allow consuming the helpers in vmx.h. Move the definitions as necessary (the macros "reference" to_vmx() before its definition). No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/kvm/vmx/vmx.h | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h index 286c88e285ea..690421b7d26c 100644 --- a/arch/x86/kvm/vmx/vmx.h +++ b/arch/x86/kvm/vmx/vmx.h @@ -6,6 +6,7 @@ =20 #include #include +#include =20 #include "capabilities.h" #include "kvm_cache_regs.h" @@ -91,15 +92,6 @@ union vmx_exit_reason { u32 full; }; =20 -#define vcpu_to_lbr_desc(vcpu) (&to_vmx(vcpu)->lbr_desc) -#define vcpu_to_lbr_records(vcpu) (&to_vmx(vcpu)->lbr_desc.records) - -void intel_pmu_cross_mapped_check(struct kvm_pmu *pmu); -bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu); - -int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu); -void vmx_passthrough_lbr_msrs(struct kvm_vcpu *vcpu); - struct lbr_desc { /* Basic info about guest LBR records. */ struct x86_pmu_lbr records; @@ -524,6 +516,22 @@ static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu = *vcpu) return container_of(vcpu, struct vcpu_vmx, vcpu); } =20 +static inline struct lbr_desc *vcpu_to_lbr_desc(struct kvm_vcpu *vcpu) +{ + return &to_vmx(vcpu)->lbr_desc; +} + +static inline struct x86_pmu_lbr *vcpu_to_lbr_records(struct kvm_vcpu *vcp= u) +{ + return &vcpu_to_lbr_desc(vcpu)->records; +} + +void intel_pmu_cross_mapped_check(struct kvm_pmu *pmu); +bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu); + +int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu); +void vmx_passthrough_lbr_msrs(struct kvm_vcpu *vcpu); + static inline unsigned long vmx_get_exit_qual(struct kvm_vcpu *vcpu) { struct vcpu_vmx *vmx =3D to_vmx(vcpu); --=20 2.37.1.359.gd136c6c3e2-goog From nobody Sun Apr 19 12:42:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2507C04A68 for ; Wed, 27 Jul 2022 23:34:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233709AbiG0Xer (ORCPT ); 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Wed, 27 Jul 2022 16:34:36 -0700 (PDT) Reply-To: Sean Christopherson Date: Wed, 27 Jul 2022 23:34:24 +0000 In-Reply-To: <20220727233424.2968356-1-seanjc@google.com> Message-Id: <20220727233424.2968356-4-seanjc@google.com> Mime-Version: 1.0 References: <20220727233424.2968356-1-seanjc@google.com> X-Mailer: git-send-email 2.37.1.359.gd136c6c3e2-goog Subject: [PATCH 3/3] KVM: VMX: Adjust number of LBR records for PERF_CAPABILITIES at refresh From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Now that the PMU is refreshed when MSR_IA32_PERF_CAPABILITIES is written by host userspace, zero out the number of LBR records for a vCPU during PMU refresh if PMU_CAP_LBR_FMT is not set in PERF_CAPABILITIES instead of handling the check at run-time. guest_cpuid_has() is expensive due to the linear search of guest CPUID entries, intel_pmu_lbr_is_enabled() is checked on every VM-Enter, _and_ simply enumerating the same "Model" as the host causes KVM to set the number of LBR records to a non-zero value. Signed-off-by: Sean Christopherson --- arch/x86/kvm/vmx/pmu_intel.c | 12 +++--------- arch/x86/kvm/vmx/vmx.h | 7 +++++-- 2 files changed, 8 insertions(+), 11 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index cfcb590afaa7..d111dc0d86df 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -171,13 +171,6 @@ static inline struct kvm_pmc *get_fw_gp_pmc(struct kvm= _pmu *pmu, u32 msr) return get_gp_pmc(pmu, msr, MSR_IA32_PMC0); } =20 -bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu) -{ - struct x86_pmu_lbr *lbr =3D vcpu_to_lbr_records(vcpu); - - return lbr->nr && (vcpu_get_perf_capabilities(vcpu) & PMU_CAP_LBR_FMT); -} - static bool intel_pmu_is_valid_lbr_msr(struct kvm_vcpu *vcpu, u32 index) { struct x86_pmu_lbr *records =3D vcpu_to_lbr_records(vcpu); @@ -590,7 +583,9 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) bitmap_set(pmu->all_valid_pmc_idx, INTEL_PMC_MAX_GENERIC, pmu->nr_arch_fixed_counters); =20 - if (cpuid_model_is_consistent(vcpu)) + perf_capabilities =3D vcpu_get_perf_capabilities(vcpu); + if (cpuid_model_is_consistent(vcpu) && + (perf_capabilities & PMU_CAP_LBR_FMT)) x86_perf_get_lbr(&lbr_desc->records); else lbr_desc->records.nr =3D 0; @@ -598,7 +593,6 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) if (lbr_desc->records.nr) bitmap_set(pmu->all_valid_pmc_idx, INTEL_PMC_IDX_FIXED_VLBR, 1); =20 - perf_capabilities =3D vcpu_get_perf_capabilities(vcpu); if (perf_capabilities & PERF_CAP_PEBS_FORMAT) { if (perf_capabilities & PERF_CAP_PEBS_BASELINE) { pmu->pebs_enable_mask =3D counter_mask; diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h index 690421b7d26c..c05e302fe2b1 100644 --- a/arch/x86/kvm/vmx/vmx.h +++ b/arch/x86/kvm/vmx/vmx.h @@ -526,9 +526,12 @@ static inline struct x86_pmu_lbr *vcpu_to_lbr_records(= struct kvm_vcpu *vcpu) return &vcpu_to_lbr_desc(vcpu)->records; } =20 +static inline bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu) +{ + return !!vcpu_to_lbr_records(vcpu)->nr; +} + void intel_pmu_cross_mapped_check(struct kvm_pmu *pmu); -bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu); - int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu); void vmx_passthrough_lbr_msrs(struct kvm_vcpu *vcpu); =20 --=20 2.37.1.359.gd136c6c3e2-goog