From nobody Fri Apr 17 22:34:55 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A897C433EF for ; Thu, 21 Jul 2022 15:36:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232370AbiGUPgi (ORCPT ); Thu, 21 Jul 2022 11:36:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50824 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232158AbiGUPgK (ORCPT ); Thu, 21 Jul 2022 11:36:10 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CB45125DB; Thu, 21 Jul 2022 08:35:58 -0700 (PDT) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 26LAYZnS012998; Thu, 21 Jul 2022 17:35:38 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=0d7CzvXYqhLpfvtRLJSziF8ECa0o8FdEE91pv2G6/M4=; b=h9utPlen7aHyNLl7kJbDMwIkc+CL55Z5DOJ1alhfmMogQvSkOyWgUGuxRApG9IQuTXOv A8phIOcx3n0qQF1JecU/v5PaMHa1eJ8Rixmosi89T+MAPGoLcOPaxfCwRG+j2rqS2qb+ sLk8wyl1LFUdfSs5s/913aU/gYIHqcMS2uUBI15PvO//iwkPTGuoIDelLKN8hrj0iSau HKDY8FZOm8ye8sVmfCWG/xN/JHKmdmzJRU3+uOxbkevxMlFZjnRYz9zAnv1PHlR6DLv3 5dG6obSCyrVKPUtI8yC/pFbQrHlxAX0RgWTp6kEDDnZf10B2c9KQeTpQQtMxcay7VwqR vg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3hf55vher3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 21 Jul 2022 17:35:38 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 0D1F5100034; Thu, 21 Jul 2022 17:35:38 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 08168226FDC; Thu, 21 Jul 2022 17:35:38 +0200 (CEST) Received: from localhost (10.75.127.50) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2308.20; Thu, 21 Jul 2022 17:35:37 +0200 From: Alain Volmat To: CC: , , , , , , , Subject: [PATCH 1/2] ARM: dts: stm32: add spi nodes into stm32mp131.dtsi Date: Thu, 21 Jul 2022 17:34:54 +0200 Message-ID: <20220721153455.3805586-2-alain.volmat@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220721153455.3805586-1-alain.volmat@foss.st.com> References: <20220721153455.3805586-1-alain.volmat@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-21_18,2022-07-20_01,2022-06-22_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the 5 instances of spi busses supported by the stm32mp131. Signed-off-by: Alain Volmat --- arch/arm/boot/dts/stm32mp131.dtsi | 70 +++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp1= 31.dtsi index da9e8a6ca663..db3d1b900d5c 100644 --- a/arch/arm/boot/dts/stm32mp131.dtsi +++ b/arch/arm/boot/dts/stm32mp131.dtsi @@ -97,6 +97,34 @@ scmi_shm: scmi-sram@0 { }; }; =20 + spi2: spi@4000b000 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "st,stm32h7-spi"; + reg =3D <0x4000b000 0x400>; + interrupts =3D ; + clocks =3D <&rcc SPI2_K>; + resets =3D <&rcc SPI2_R>; + dmas =3D <&dmamux1 39 0x400 0x01>, + <&dmamux1 40 0x400 0x01>; + dma-names =3D "rx", "tx"; + status =3D "disabled"; + }; + + spi3: spi@4000c000 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "st,stm32h7-spi"; + reg =3D <0x4000c000 0x400>; + interrupts =3D ; + clocks =3D <&rcc SPI3_K>; + resets =3D <&rcc SPI3_R>; + dmas =3D <&dmamux1 61 0x400 0x01>, + <&dmamux1 62 0x400 0x01>; + dma-names =3D "rx", "tx"; + status =3D "disabled"; + }; + uart4: serial@40010000 { compatible =3D "st,stm32h7-uart"; reg =3D <0x40010000 0x400>; @@ -142,6 +170,20 @@ i2c2: i2c@40013000 { status =3D "disabled"; }; =20 + spi1: spi@44004000 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "st,stm32h7-spi"; + reg =3D <0x44004000 0x400>; + interrupts =3D ; + clocks =3D <&rcc SPI1_K>; + resets =3D <&rcc SPI1_R>; + dmas =3D <&dmamux1 37 0x400 0x01>, + <&dmamux1 38 0x400 0x01>; + dma-names =3D "rx", "tx"; + status =3D "disabled"; + }; + dma1: dma-controller@48000000 { compatible =3D "st,stm32-dma"; reg =3D <0x48000000 0x400>; @@ -189,6 +231,34 @@ dmamux1: dma-router@48002000 { dma-channels =3D <16>; }; =20 + spi4: spi@4c002000 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "st,stm32h7-spi"; + reg =3D <0x4c002000 0x400>; + interrupts =3D ; + clocks =3D <&rcc SPI4_K>; + resets =3D <&rcc SPI4_R>; + dmas =3D <&dmamux1 83 0x400 0x01>, + <&dmamux1 84 0x400 0x01>; + dma-names =3D "rx", "tx"; + status =3D "disabled"; + }; + + spi5: spi@4c003000 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "st,stm32h7-spi"; + reg =3D <0x4c003000 0x400>; + interrupts =3D ; + clocks =3D <&rcc SPI5_K>; + resets =3D <&rcc SPI5_R>; + dmas =3D <&dmamux1 85 0x400 0x01>, + <&dmamux1 86 0x400 0x01>; + dma-names =3D "rx", "tx"; + status =3D "disabled"; + }; + i2c3: i2c@4c004000 { compatible =3D "st,stm32mp13-i2c"; reg =3D <0x4c004000 0x400>; --=20 2.25.1 From nobody Fri Apr 17 22:34:55 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3C20CCA489 for ; Thu, 21 Jul 2022 15:36:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231612AbiGUPgZ (ORCPT ); Thu, 21 Jul 2022 11:36:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50590 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231965AbiGUPgH (ORCPT ); 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Thu, 21 Jul 2022 17:35:38 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6206B100038; Thu, 21 Jul 2022 17:35:38 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 5D866226FDC; Thu, 21 Jul 2022 17:35:38 +0200 (CEST) Received: from localhost (10.75.127.50) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2308.20; Thu, 21 Jul 2022 17:35:38 +0200 From: Alain Volmat To: CC: , , , , , , , Subject: [PATCH 2/2] ARM: dts: stm32: add pinctrl and disabled spi5 node in stm32mp135f-dk Date: Thu, 21 Jul 2022 17:34:55 +0200 Message-ID: <20220721153455.3805586-3-alain.volmat@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220721153455.3805586-1-alain.volmat@foss.st.com> References: <20220721153455.3805586-1-alain.volmat@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-21_18,2022-07-20_01,2022-06-22_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add pinctrl information and a disabled spi5 node within stm32mp135f-dk.dts in order to use the spi5 bus which is available via the GPIO expansion pins of the STM32MP135 Discovery board. Signed-off-by: Alain Volmat --- arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 23 +++++++++++++++++++++++ arch/arm/boot/dts/stm32mp135f-dk.dts | 7 +++++++ 2 files changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/s= tm32mp13-pinctrl.dtsi index 749078ba9d42..efdd163eba30 100644 --- a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi @@ -142,6 +142,29 @@ pins { }; }; =20 + spi5_pins_a: spi5-0 { + pins1 { + pinmux =3D , /* SPI5_SCK */ + ; /* SPI5_MOSI */ + bias-disable; + drive-push-pull; + slew-rate =3D <1>; + }; + + pins2 { + pinmux =3D ; /* SPI5_MISO */ + bias-disable; + }; + }; + + spi5_sleep_pins_a: spi5-sleep-0 { + pins { + pinmux =3D , /* SPI5_SCK */ + , /* SPI5_MISO */ + ; /* SPI5_MOSI */ + }; + }; + uart4_pins_a: uart4-0 { pins1 { pinmux =3D ; /* UART4_TX */ diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32= mp135f-dk.dts index 3e2823332d51..de341d17e87d 100644 --- a/arch/arm/boot/dts/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/stm32mp135f-dk.dts @@ -116,6 +116,13 @@ &sdmmc1 { status =3D "okay"; }; =20 +&spi5 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&spi5_pins_a>; + pinctrl-1 =3D <&spi5_sleep_pins_a>; + status =3D "disabled"; +}; + &uart4 { pinctrl-names =3D "default"; pinctrl-0 =3D <&uart4_pins_a>; --=20 2.25.1