From nobody Fri Apr 17 22:32:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85E2BC433EF for ; Thu, 21 Jul 2022 15:30:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231573AbiGUPaZ (ORCPT ); Thu, 21 Jul 2022 11:30:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230291AbiGUPaR (ORCPT ); Thu, 21 Jul 2022 11:30:17 -0400 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39220D9D; Thu, 21 Jul 2022 08:30:11 -0700 (PDT) Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 26LFIMDr006815; Thu, 21 Jul 2022 17:29:54 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=6G9UfE0wFCTuuFaKCQKQnT0MV0TreW/ELTGxWMqwGZg=; b=lNZevbAfDC71CHhZ+rScxpbk81xn9P2iYTQkoHq6bmxTuFuuKoXtW/zGzexp7PGQ1ZVV 6rkzoXVilm+EEEiCBd5pdjtxtQrd7veFiAG7Uey/rto71F0reJS3ItzYWAmdNMTeMX+e 8jj6dvxdXHEyGmkEPO1cJsBGX+mc1bPwbDxjycnPoYMSYRyjsVToQxbkoK75ixXAMELB lNgxjEEFlTRloDzrnVAm2oupV2PEip19V1vrPHO4U3kiYqulJzp9Yjanp58AvZYEtIPo GAYMvhUimGyvTlkD36lG6gA4EU8Vk3VjflaTpzQz5cUe8EEaxRu5UrcU/O95ZC5g02ra Zw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3hbnp6du3b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 21 Jul 2022 17:29:54 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7B328100034; Thu, 21 Jul 2022 17:29:52 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 7673C226FCB; Thu, 21 Jul 2022 17:29:52 +0200 (CEST) Received: from localhost (10.75.127.50) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2308.20; Thu, 21 Jul 2022 17:29:52 +0200 From: Alain Volmat To: CC: , , , , , , , Subject: [PATCH 1/2] ARM: dts: stm32: add i2c nodes into stm32mp131.dtsi Date: Thu, 21 Jul 2022 17:29:32 +0200 Message-ID: <20220721152933.3805272-2-alain.volmat@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220721152933.3805272-1-alain.volmat@foss.st.com> References: <20220721152933.3805272-1-alain.volmat@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-21_18,2022-07-20_01,2022-06-22_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the 5 instances of i2c busses supported by the stm32mp131. Signed-off-by: Alain Volmat --- arch/arm/boot/dts/stm32mp131.dtsi | 90 +++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp1= 31.dtsi index 3a921db23e9f..da9e8a6ca663 100644 --- a/arch/arm/boot/dts/stm32mp131.dtsi +++ b/arch/arm/boot/dts/stm32mp131.dtsi @@ -106,6 +106,42 @@ uart4: serial@40010000 { status =3D "disabled"; }; =20 + i2c1: i2c@40012000 { + compatible =3D "st,stm32mp13-i2c"; + reg =3D <0x40012000 0x400>; + interrupt-names =3D "event", "error"; + interrupts =3D , + ; + clocks =3D <&rcc I2C1_K>; + resets =3D <&rcc I2C1_R>; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dmamux1 33 0x400 0x1>, + <&dmamux1 34 0x400 0x1>; + dma-names =3D "rx", "tx"; + st,syscfg-fmp =3D <&syscfg 0x4 0x1>; + i2c-analog-filter; + status =3D "disabled"; + }; + + i2c2: i2c@40013000 { + compatible =3D "st,stm32mp13-i2c"; + reg =3D <0x40013000 0x400>; + interrupt-names =3D "event", "error"; + interrupts =3D , + ; + clocks =3D <&rcc I2C2_K>; + resets =3D <&rcc I2C2_R>; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dmamux1 35 0x400 0x1>, + <&dmamux1 36 0x400 0x1>; + dma-names =3D "rx", "tx"; + st,syscfg-fmp =3D <&syscfg 0x4 0x2>; + i2c-analog-filter; + status =3D "disabled"; + }; + dma1: dma-controller@48000000 { compatible =3D "st,stm32-dma"; reg =3D <0x48000000 0x400>; @@ -153,6 +189,60 @@ dmamux1: dma-router@48002000 { dma-channels =3D <16>; }; =20 + i2c3: i2c@4c004000 { + compatible =3D "st,stm32mp13-i2c"; + reg =3D <0x4c004000 0x400>; + interrupt-names =3D "event", "error"; + interrupts =3D , + ; + clocks =3D <&rcc I2C3_K>; + resets =3D <&rcc I2C3_R>; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dmamux1 73 0x400 0x1>, + <&dmamux1 74 0x400 0x1>; + dma-names =3D "rx", "tx"; + st,syscfg-fmp =3D <&syscfg 0x4 0x4>; + i2c-analog-filter; + status =3D "disabled"; + }; + + i2c4: i2c@4c005000 { + compatible =3D "st,stm32mp13-i2c"; + reg =3D <0x4c005000 0x400>; + interrupt-names =3D "event", "error"; + interrupts =3D , + ; + clocks =3D <&rcc I2C4_K>; + resets =3D <&rcc I2C4_R>; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dmamux1 75 0x400 0x1>, + <&dmamux1 76 0x400 0x1>; + dma-names =3D "rx", "tx"; + st,syscfg-fmp =3D <&syscfg 0x4 0x8>; + i2c-analog-filter; + status =3D "disabled"; + }; + + i2c5: i2c@4c006000 { + compatible =3D "st,stm32mp13-i2c"; + reg =3D <0x4c006000 0x400>; + interrupt-names =3D "event", "error"; + interrupts =3D , + ; + clocks =3D <&rcc I2C5_K>; + resets =3D <&rcc I2C5_R>; + #address-cells =3D <1>; + #size-cells =3D <0>; + dmas =3D <&dmamux1 115 0x400 0x1>, + <&dmamux1 116 0x400 0x1>; + dma-names =3D "rx", "tx"; + st,syscfg-fmp =3D <&syscfg 0x4 0x10>; + i2c-analog-filter; + status =3D "disabled"; + }; + rcc: rcc@50000000 { compatible =3D "st,stm32mp13-rcc", "syscon"; reg =3D <0x50000000 0x1000>; --=20 2.25.1 From nobody Fri Apr 17 22:32:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B816C43334 for ; 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Thu, 21 Jul 2022 17:29:52 +0200 From: Alain Volmat To: CC: , , , , , , , Subject: [PATCH 2/2] ARM: dts: stm32: enable i2c1 and i2c5 on stm32mp135f-dk.dts Date: Thu, 21 Jul 2022 17:29:33 +0200 Message-ID: <20220721152933.3805272-3-alain.volmat@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220721152933.3805272-1-alain.volmat@foss.st.com> References: <20220721152933.3805272-1-alain.volmat@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.75.127.49] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-21_18,2022-07-20_01,2022-06-22_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Enable the two i2c busses i2c1 and i2c5 available on the stm32mp135f-dk Discovery board. Signed-off-by: Alain Volmat --- arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 34 ++++++++++++++++++++++++ arch/arm/boot/dts/stm32mp135f-dk.dts | 26 ++++++++++++++++++ 2 files changed, 60 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/s= tm32mp13-pinctrl.dtsi index d2472cd8f1d0..749078ba9d42 100644 --- a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi @@ -6,6 +6,40 @@ #include =20 &pinctrl { + i2c1_pins_a: i2c1-0 { + pins { + pinmux =3D , /* I2C1_SCL */ + ; /* I2C1_SDA */ + bias-disable; + drive-open-drain; + slew-rate =3D <0>; + }; + }; + + i2c1_sleep_pins_a: i2c1-sleep-0 { + pins { + pinmux =3D , /* I2C1_SCL */ + ; /* I2C1_SDA */ + }; + }; + + i2c5_pins_a: i2c5-0 { + pins { + pinmux =3D , /* I2C5_SCL */ + ; /* I2C5_SDA */ + bias-disable; + drive-open-drain; + slew-rate =3D <0>; + }; + }; + + i2c5_sleep_pins_a: i2c5-sleep-0 { + pins { + pinmux =3D , /* I2C5_SCL */ + ; /* I2C5_SDA */ + }; + }; + sdmmc1_b4_pins_a: sdmmc1-b4-0 { pins { pinmux =3D , /* SDMMC1_D0 */ diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32= mp135f-dk.dts index e6b8ffd332c7..3e2823332d51 100644 --- a/arch/arm/boot/dts/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/stm32mp135f-dk.dts @@ -68,6 +68,32 @@ vdd_sd: vdd-sd { }; }; =20 +&i2c1 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&i2c1_pins_a>; + pinctrl-1 =3D <&i2c1_sleep_pins_a>; + i2c-scl-rising-time-ns =3D <96>; + i2c-scl-falling-time-ns =3D <3>; + clock-frequency =3D <1000000>; + status =3D "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; +}; + +&i2c5 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&i2c5_pins_a>; + pinctrl-1 =3D <&i2c5_sleep_pins_a>; + i2c-scl-rising-time-ns =3D <170>; + i2c-scl-falling-time-ns =3D <5>; + clock-frequency =3D <400000>; + status =3D "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; +}; + &iwdg2 { timeout-sec =3D <32>; status =3D "okay"; --=20 2.25.1