From nobody Sat Sep 21 19:48:33 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B129C433EF for ; Thu, 21 Jul 2022 13:42:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229768AbiGUNmr (ORCPT ); Thu, 21 Jul 2022 09:42:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229510AbiGUNme (ORCPT ); Thu, 21 Jul 2022 09:42:34 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C1FBF6E2EE; Thu, 21 Jul 2022 06:42:33 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 109F76601AA6; Thu, 21 Jul 2022 14:42:32 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1658410952; bh=c9v3l9FdU2UcsKgOUHjJo+v/EkJQURQSMnGUGxmVLvk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OkVDZWha7vPOkYv3QWOdwwcm0I3l+qpeL6HLXUlu7an+/a25Dqt08Et+Ocjvwraen gP/uSu0tKir44Fm+2Ies0QgSzDZGEUieIlctq7Zk+1JRcdoszRdXu/7czwWlkcRisJ IWIZB798RJ8vi+RMdYa4M12s2+W3OmBy3+CyOWNqiXSz0LRiuc/l0wfNT4ELTCmlG5 FyhhgtiVh3tNrDYQhQD0uiczHmU9z/OFA5+USzig9kx79xiqisJF+kIEFVHaJcdag0 RmLCR+NQxJidkdvVxLTvpvKnzakYMpURuez0cs44BQSn6ddfHlHEmqaJjXCW10HUE3 O2cfVZJNU6Jqg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH 1/8] arm64: dts: mediatek: cherry: Enable the System Companion Processor Date: Thu, 21 Jul 2022 15:42:21 +0200 Message-Id: <20220721134228.310178-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> References: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" MT8195 features a SCP like some other older SoCs, and Cherry uses it for various tasks. Add the required pin configuration and DMA pool and enable the node. Signed-off-by: AngeloGioacchino Del Regno --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index fcc600674339..feebbe367e93 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -104,6 +104,18 @@ usb_vbus: regulator-5v0-usb-vbus { enable-active-high; regulator-always-on; }; + + reserved_memory: reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + scp_mem: memory@50000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x50000000 0 0x2900000>; + no-map; + }; + }; }; =20 &i2c0 { @@ -600,6 +612,14 @@ pins-low-power-pupd { }; }; =20 + scp_pins: scp-default-pins { + pins-vreq { + pinmux =3D ; + bias-disable; + input-enable; + }; + }; + spi0_pins: spi0-default-pins { pins-cs-mosi-clk { pinmux =3D , @@ -643,6 +663,14 @@ &pmic { interrupts-extended =3D <&pio 222 IRQ_TYPE_LEVEL_HIGH>; }; =20 +&scp { + status =3D "okay"; + + memory-region =3D <&scp_mem>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&scp_pins>; +}; + &spi0 { status =3D "okay"; =20 --=20 2.35.1 From nobody Sat Sep 21 19:48:33 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4C61C433EF for ; Thu, 21 Jul 2022 13:43:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229907AbiGUNnB (ORCPT ); Thu, 21 Jul 2022 09:43:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48454 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229581AbiGUNmf (ORCPT ); Thu, 21 Jul 2022 09:42:35 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 630E277A57; Thu, 21 Jul 2022 06:42:34 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 9B9546601AA9; Thu, 21 Jul 2022 14:42:32 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1658410953; bh=iCe3nCCYP+CXI4lEolJz5G4aPJpz8Pwnh2r8Gx2Y2to=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kvdipG7Z82dZH4MIB+y1Wp2W1XRbve5/yn0e4BdYOopiK6MV0Wji3WZsq2twmuZY9 WXjHIUwsvYqBmS3jMKBsCTMWnL23keX+8/amwEzogQ6nNU7o0GizYXTeuhHqWE0u/j GOzU2eTWR2asG2urNsY+Gnc8WFjUFg1c5n8dWq2W2C36rw+3fT+1wE10rdRzyhk8uh PvJNNzivXRqkR4ODTtSQsvv0+eloOJN4rYDNYXxcanm3I6WRtFBNTwNuN/jHJymOPW 3X/UvG2R5CRAUra5+q7g9UbJ26EZr6rnKgfhFXieid2Et3S22Ypu2l8VwaVd1SkxXO z+g8hdvVcPSWQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH 2/8] arm64: dts: mediatek: cherry: Wire up the ChromeOS EC and GSC Date: Thu, 21 Jul 2022 15:42:22 +0200 Message-Id: <20220721134228.310178-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> References: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Wire up the ChromeOS Embedded Controller on SPI0 and its communication channel via SCP RPMSG along with all of the offered functionality, including Keyboard, Smart Battery Metrics (SBS), PWM controller, I2C tunnel, regulators and Type-C connector management. While at it, also add support for the Cr50 Google Security Chip (GSC) found on this platform on I2C3 to support TPM and also use it as an entropy source for the kernel. Signed-off-by: AngeloGioacchino Del Regno --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 93 +++++++++++++++++++ 1 file changed, 93 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index feebbe367e93..87ac2b4f9814 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -149,6 +149,14 @@ &i2c3 { clock-frequency =3D <400000>; pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c3_pins>; + + cr50@50 { + compatible =3D "google,cr50"; + reg =3D <0x50>; + interrupts-extended =3D <&pio 88 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cr50_int>; + }; }; =20 &i2c4 { @@ -426,6 +434,21 @@ &pio { "AP_SPI_FLASH_MOSI", "AP_SPI_FLASH_MISO"; =20 + cr50_int: cr50-irq-default-pins { + pins-gsc-ap-int-odl { + pinmux =3D ; + input-enable; + }; + }; + + cros_ec_int: cros-ec-irq-default-pins { + pins-ec-ap-int-odl { + pinmux =3D ; + bias-pull-up =3D ; + input-enable; + }; + }; + i2c0_pins: i2c0-default-pins { pins-bus { pinmux =3D , @@ -669,6 +692,11 @@ &scp { memory-region =3D <&scp_mem>; pinctrl-names =3D "default"; pinctrl-0 =3D <&scp_pins>; + + cros-ec-rpmsg { + compatible =3D "google,cros-ec-rpmsg"; + mediatek,rpmsg-name =3D "cros-ec-rpmsg"; + }; }; =20 &spi0 { @@ -677,6 +705,68 @@ &spi0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&spi0_pins>; mediatek,pad-select =3D <0>; + + cros_ec: ec@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + + compatible =3D "google,cros-ec-spi"; + reg =3D <0>; + interrupts-extended =3D <&pio 4 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cros_ec_int>; + spi-max-frequency =3D <3000000>; + + cros_ec_pwm: ec-pwm { + compatible =3D "google,cros-ec-pwm"; + #pwm-cells =3D <1>; + }; + + i2c_tunnel: i2c-tunnel { + compatible =3D "google,cros-ec-i2c-tunnel"; + google,remote-bus =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + mt_pmic_vmc_ldo_reg: regulator@0 { + compatible =3D "google,cros-ec-regulator"; + reg =3D <0>; + regulator-name =3D "mt_pmic_vmc_ldo"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <3600000>; + }; + + mt_pmic_vmch_ldo_reg: regulator@1 { + compatible =3D "google,cros-ec-regulator"; + reg =3D <1>; + regulator-name =3D "mt_pmic_vmch_ldo"; + regulator-min-microvolt =3D <2700000>; + regulator-max-microvolt =3D <3600000>; + }; + + typec { + compatible =3D "google,cros-ec-typec"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + usb_c0: connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + power-role =3D "dual"; + data-role =3D "host"; + try-power-role =3D "source"; + }; + + usb_c1: connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + power-role =3D "dual"; + data-role =3D "host"; + try-power-role =3D "source"; + }; + }; + }; }; =20 &u3phy0 { @@ -728,3 +818,6 @@ &xhci3 { vusb33-supply =3D <&mt6359_vusb_ldo_reg>; vbus-supply =3D <&usb_vbus>; }; + +#include +#include --=20 2.35.1 From nobody Sat Sep 21 19:48:33 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBA2FC433EF for ; Thu, 21 Jul 2022 13:42:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229787AbiGUNmx (ORCPT ); Thu, 21 Jul 2022 09:42:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48476 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229608AbiGUNmg (ORCPT ); Thu, 21 Jul 2022 09:42:36 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CC3FF7CB75; Thu, 21 Jul 2022 06:42:34 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 322456601AAA; Thu, 21 Jul 2022 14:42:33 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1658410953; bh=JK6KfDUPzV5yJTwbi0+SKom1B+2IFfpMg25WH7f86kE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hfyYxRxrxs7BFToL5NTnw+b49Un2W291Oe7UeRrPflcqwKScbBojvWIe4Mt2lLQuj Ine9oWvUCakBhWNsWuHjqWlhrt92BFx2iCdF7Csprx0OcOU5VPTfatwFBhD3qqIM2N sM7FGve2CWkgmHHPBzKJF2LvI8/qSLERByDES0Y8AE5VJphHRNiuvcCAEfeE/WB+HF PNjy4zRDbP2p4VKDuI0QbcV+GX2v9+4rjvpsaInOFvPXj8yY+3suxuMPDcHVWnb/rr ml89pDwjmWcobi0pWvksEzRgIaT8gOClBT7LQSpbUnP7PC9AhGEM2xOdgD6w5kEmTL rJVC07/12jiRQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH 3/8] arm64: dts: mediatek: cherry: Add keyboard mapping for the top row Date: Thu, 21 Jul 2022 15:42:23 +0200 Message-Id: <20220721134228.310178-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> References: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Chromebooks' embedded keyboards differ from standard layouts for the top row, as this one doesn't have the standard function keys but shortcuts instead: map these keys to achieve the functionality that is pictured on the printouts. Signed-off-by: AngeloGioacchino Del Regno --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 87ac2b4f9814..2853f7f76c90 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -821,3 +821,33 @@ &xhci3 { =20 #include #include + +&keyboard_controller { + function-row-physmap =3D < + MATRIX_KEY(0x00, 0x02, 0) /* T1 */ + MATRIX_KEY(0x03, 0x02, 0) /* T2 */ + MATRIX_KEY(0x02, 0x02, 0) /* T3 */ + MATRIX_KEY(0x01, 0x02, 0) /* T4 */ + MATRIX_KEY(0x03, 0x04, 0) /* T5 */ + MATRIX_KEY(0x02, 0x04, 0) /* T6 */ + MATRIX_KEY(0x01, 0x04, 0) /* T7 */ + MATRIX_KEY(0x02, 0x09, 0) /* T8 */ + MATRIX_KEY(0x01, 0x09, 0) /* T9 */ + MATRIX_KEY(0x00, 0x04, 0) /* T10 */ + >; + + linux,keymap =3D < + MATRIX_KEY(0x00, 0x02, KEY_BACK) + MATRIX_KEY(0x03, 0x02, KEY_REFRESH) + MATRIX_KEY(0x02, 0x02, KEY_ZOOM) + MATRIX_KEY(0x01, 0x02, KEY_SCALE) + MATRIX_KEY(0x03, 0x04, KEY_SYSRQ) + MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) + MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP) + MATRIX_KEY(0x02, 0x09, KEY_MUTE) + MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN) + MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) + + CROS_STD_MAIN_KEYMAP + >; +}; --=20 2.35.1 From nobody Sat Sep 21 19:48:33 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B97BC433EF for ; Thu, 21 Jul 2022 13:43:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229815AbiGUNnF (ORCPT ); Thu, 21 Jul 2022 09:43:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229615AbiGUNmg (ORCPT ); Thu, 21 Jul 2022 09:42:36 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 68BF27D1D5; Thu, 21 Jul 2022 06:42:35 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id C33386601AAD; Thu, 21 Jul 2022 14:42:33 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1658410954; bh=V/+LAph7U+k+GMlqnvKVF6jJXNo43acPvSyK01bfszA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZKmwj5u6AmDHNat16iPXJq9ybhfIRR4GgMbGrHHSWEBRFvIus/1ycmgKs3lqjV9P4 I2sIiZLf01mL1bT0byJ+Qdc3WQ62hHmIY7gnXN8fYYov0fVuWDYNpA0HX5J+za6Qft E3LQGAAOURaF7NxyGjOIckl4sk0FSHChCkMMXyO+68kLz+zSwgDjBj6n3ShMiJQq/R 8Qc9Mo0s2ggRsU9wddVRNI8nSEWdhmCvnSCjmB5I+BcpBcrZGXqcdb0X6G4OyXnzW8 m8yLsib9m6zVwTvBzLCEZLT1xTP0ay0xNRtouHtY5YMU4YKDAZefdJhws25J1ldihb fxmc4QJffcvnw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH 4/8] arm64: dts: mediatek: cherry: Enable secondary SD/MMC controller Date: Thu, 21 Jul 2022 15:42:24 +0200 Message-Id: <20220721134228.310178-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> References: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" As of now, all of the boards based on the cherry platform have a usable secondary SD/MMC controller, usually for SD cards: enable it to allow both booting from it and generally accessing external storage. Signed-off-by: AngeloGioacchino Del Regno --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 2853f7f76c90..8859957c7b27 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -17,6 +17,7 @@ aliases { i2c5 =3D &i2c5; i2c7 =3D &i2c7; mmc0 =3D &mmc0; + mmc1 =3D &mmc1; serial0 =3D &uart0; }; =20 @@ -227,6 +228,24 @@ &mmc0 { vqmmc-supply =3D <&mt6359_vufs_ldo_reg>; }; =20 +&mmc1 { + status =3D "okay"; + + bus-width =3D <4>; + cap-sd-highspeed; + cd-gpios =3D <&pio 54 GPIO_ACTIVE_LOW>; + max-frequency =3D <200000000>; + no-mmc; + no-sdio; + pinctrl-names =3D "default", "state_uhs"; + pinctrl-0 =3D <&mmc1_pins_default>; + pinctrl-1 =3D <&mmc1_pins_uhs>; + sd-uhs-sdr50; + sd-uhs-sdr104; + vmmc-supply =3D <&mt_pmic_vmch_ldo_reg>; + vqmmc-supply =3D <&mt_pmic_vmc_ldo_reg>; +}; + /* for CPU-L */ &mt6359_vcore_buck_reg { regulator-always-on; @@ -575,6 +594,49 @@ pins-rst { }; }; =20 + mmc1_pins_default: mmc1-default-pins { + pins-cmd-dat { + pinmux =3D , + , + , + , + ; + input-enable; + drive-strength =3D <8>; + bias-pull-up =3D ; + }; + + pins-clk { + pinmux =3D ; + drive-strength =3D <8>; + bias-pull-down =3D ; + }; + + pins-insert { + pinmux =3D ; + bias-pull-up; + }; + }; + + mmc1_pins_uhs: mmc1-uhs-pins { + pins-cmd-dat { + pinmux =3D , + , + , + , + ; + input-enable; + drive-strength =3D <8>; + bias-pull-up =3D ; + }; + + pins-clk { + pinmux =3D ; + drive-strength =3D <8>; + bias-pull-down =3D ; + }; + }; + nor_pins_default: nor-default-pins { pins-ck-io { pinmux =3D , --=20 2.35.1 From nobody Sat Sep 21 19:48:33 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDBE6C43334 for ; Thu, 21 Jul 2022 13:42:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229769AbiGUNm6 (ORCPT ); Thu, 21 Jul 2022 09:42:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48484 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229616AbiGUNmg (ORCPT ); Thu, 21 Jul 2022 09:42:36 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DECDE7E31D; Thu, 21 Jul 2022 06:42:35 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 5AB8D6601AAE; Thu, 21 Jul 2022 14:42:34 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1658410954; bh=akTb+gtu7ReGU7vaNrXZI/GzP5obrfG91xyx1IuWCT0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Y80YZP2S/6CF3IswsEqGwn3wtC0MpOrFK8QfIWWO1/6JCSR7ztz+LzVSO8296vSfB CMEpRj39aea0i2ZYb+jIIWtBpCspZK9iKSMLwvhI+wf0B8ObD38rRgOX9qLqKOcsbc MFftWcYIc3t9lgt+B8vrBwWGgkeK9LooeNH/gyKzfawBYazMO5RyhaplrrmRG+1jxy VYA0acB+ULdpIBfaqTtVRTHY/ogDJMSkyJ/le2fqblWP9ohkLup7ZrnCpF5SStL2yB ulM49iOcPewfTVMqmYD9CnaqAOU5klDURHZ409dMwBbPFO/09fe76Cf+P0vdlGGSoB nAnN8oU/PJGkw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH 5/8] arm64: dts: mediatek: cherry: Enable Elantech eKTH3000 i2c trackpad Date: Thu, 21 Jul 2022 15:42:25 +0200 Message-Id: <20220721134228.310178-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> References: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Cherry platform uses an Elantech touchpad/trackpad: enable probing it at address 0x15 on I2C1. Signed-off-by: AngeloGioacchino Del Regno --- .../arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 8859957c7b27..58349d4c3c8b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -134,6 +134,16 @@ &i2c1 { i2c-scl-internal-delay-ns =3D <12500>; pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c1_pins>; + + trackpad@15 { + compatible =3D "elan,ekth3000"; + reg =3D <0x15>; + interrupts-extended =3D <&pio 6 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&trackpad_pins>; + vcc-supply =3D <&pp3300_s3>; + wakeup-source; + }; }; =20 &i2c2 { @@ -727,6 +737,14 @@ subpmic_pin_irq: pins-subpmic-int-n { }; }; =20 + trackpad_pins: trackpad-default-pins { + pins-int-n { + pinmux =3D ; + input-enable; + bias-pull-up; + }; + }; + touchscreen_pins: touchscreen-default-pins { pins-int-n { pinmux =3D ; --=20 2.35.1 From nobody Sat Sep 21 19:48:33 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B59ACCA487 for ; Thu, 21 Jul 2022 13:43:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229452AbiGUNnV (ORCPT ); Thu, 21 Jul 2022 09:43:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229653AbiGUNmi (ORCPT ); Thu, 21 Jul 2022 09:42:38 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70EC45A476; Thu, 21 Jul 2022 06:42:36 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id E4CD56601AAF; Thu, 21 Jul 2022 14:42:34 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1658410955; bh=dlqdtSuo04KavAzVuh7wvb7toYorthQcXqSIIZVLL6M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=g+P9MM+AWoHjLIq62e484C/HRNq88fz3TVaXhZcj0KYZDt9FmuNBEKQZz8g36jNxb H0UyK+//tRmueKYzwOXvC6o4uDBAMaN5movVlvUxkDUuasdF5HyxWVgOKVhlPLmRGP 2dJZYXAJk5PB7pWVcsRGesavGJ1LAgqcVh5uArn5tyPFZSmrX2lA5P1jnVgSA/5qkO 8Vl03pfv8I49ajVikz7IcIR/8Gt+vAQ6V0Cm9fWjI5sPbGiDGxHzULmYFdY9sERy+t n2AZP0b+VfaUCZsZDgVC0vGg066qiRPdgLSYKo3k9A02Ej6zG444fnDEphdv6YjaOx QiOlfAjND6ZoA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH 6/8] arm64: dts: mediatek: cherry: Enable DSP, audio codec and sound card Date: Thu, 21 Jul 2022 15:42:26 +0200 Message-Id: <20220721134228.310178-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> References: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" All machines of the Cherry platform have a working DSP (integrated into the MT8195 SoC), and audio support, some with a different audio codec: specifically, some using Realtek's RT5682I and some RT5682S. Write a configuration for all the audio bits to enable functionality. Signed-off-by: AngeloGioacchino Del Regno --- .../dts/mediatek/mt8195-cherry-tomato-r1.dts | 10 ++ .../dts/mediatek/mt8195-cherry-tomato-r2.dts | 10 ++ .../dts/mediatek/mt8195-cherry-tomato-r3.dts | 10 ++ .../boot/dts/mediatek/mt8195-cherry.dtsi | 117 ++++++++++++++++++ 4 files changed, 147 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts b/arc= h/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts index 3348ba69ff6c..2d5e8f371b6d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts @@ -10,6 +10,16 @@ / { compatible =3D "google,tomato-rev1", "google,tomato", "mediatek,mt8195"; }; =20 +&audio_codec { + compatible =3D "realtek,rt5682i"; + realtek,btndet-delay =3D <16>; +}; + +&sound { + compatible =3D "mediatek,mt8195_mt6359_rt1019_rt5682"; + model =3D "mt8195_r1019_5682"; +}; + &ts_10 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts b/arc= h/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts index 4669e9d917f8..2586c32ce6e6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts @@ -10,6 +10,11 @@ / { compatible =3D "google,tomato-rev2", "google,tomato", "mediatek,mt8195"; }; =20 +&audio_codec { + compatible =3D "realtek,rt5682i"; + realtek,btndet-delay =3D <16>; +}; + &pio_default { pins-low-power-hdmi-disable { pinmux =3D , @@ -30,6 +35,11 @@ pins-low-power-pcie0-disable { }; }; =20 +&sound { + compatible =3D "mediatek,mt8195_mt6359_rt1019_rt5682"; + model =3D "mt8195_r1019_5682"; +}; + &ts_10 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts b/arc= h/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts index 5021edd02f7c..f54f9477b99d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts @@ -11,6 +11,11 @@ / { "google,tomato", "mediatek,mt8195"; }; =20 +&audio_codec { + compatible =3D "realtek,rt5682s"; + realtek,amic-delay-ms =3D <250>; +}; + &pio_default { pins-low-power-hdmi-disable { pinmux =3D , @@ -31,6 +36,11 @@ pins-low-power-pcie0-disable { }; }; =20 +&sound { + compatible =3D "mediatek,mt8195_mt6359_rt1019_rt5682"; + model =3D "m8195_r1019_5682s"; +}; + &ts_10 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 58349d4c3c8b..ca9955a97f8f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -25,6 +25,12 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 + dmic_codec: dmic-codec { + compatible =3D "dmic-codec"; + num-channels =3D <2>; + wakeup-delay-ms =3D <50>; + }; + memory@40000000 { device_type =3D "memory"; reg =3D <0 0x40000000 0 0x80000000>; @@ -116,9 +122,49 @@ scp_mem: memory@50000000 { reg =3D <0 0x50000000 0 0x2900000>; no-map; }; + + adsp_mem: memory@60000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x60000000 0 0xd80000>; + no-map; + }; + + afe_mem: memory@60d80000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x60d80000 0 0x100000>; + no-map; + }; + + adsp_device_mem: memory@60e80000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x60e80000 0 0x280000>; + no-map; + }; + }; + + spk_amplifier: rt1019p { + compatible =3D "realtek,rt1019p"; + label =3D "rt1019p"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rt1019p_pins_default>; + sdb-gpios =3D <&pio 100 GPIO_ACTIVE_HIGH>; }; }; =20 +&adsp { + status =3D "okay"; + + memory-region =3D <&adsp_device_mem>, <&adsp_mem>; +}; + +&afe { + status =3D "okay"; + + mediatek,etdm-in2-cowork-source =3D <2>; + mediatek,etdm-out2-cowork-source =3D <0>; + memory-region =3D <&afe_mem>; +}; + &i2c0 { status =3D "okay"; =20 @@ -152,6 +198,17 @@ &i2c2 { clock-frequency =3D <400000>; pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c2_pins>; + + audio_codec: codec@1a { + /* Realtek RT5682i or RT5682s, sharing the same configuration */ + reg =3D <0x1a>; + interrupts-extended =3D <&pio 89 IRQ_TYPE_EDGE_BOTH>; + realtek,jd-src =3D <1>; + + AVDD-supply =3D <&mt6359_vio18_ldo_reg>; + MICVDD-supply =3D <&pp3300_z2>; + VBAT-supply =3D <&pp3300_z5>; + }; }; =20 &i2c3 { @@ -256,6 +313,11 @@ &mmc1 { vqmmc-supply =3D <&mt_pmic_vmc_ldo_reg>; }; =20 +&mt6359codec { + mediatek,dmic-mode =3D <1>; /* one-wire */ + mediatek,mic-type-0 =3D <2>; /* DMIC */ +}; + /* for CPU-L */ &mt6359_vcore_buck_reg { regulator-always-on; @@ -463,6 +525,34 @@ &pio { "AP_SPI_FLASH_MOSI", "AP_SPI_FLASH_MISO"; =20 + aud_pins_default: audio-default-pins { + pins-cmd-dat { + pinmux =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pins-hp-jack-int-odl { + pinmux =3D ; + input-enable; + bias-pull-up =3D ; + }; + }; + cr50_int: cr50-irq-default-pins { pins-gsc-ap-int-odl { pinmux =3D ; @@ -707,6 +797,21 @@ pins-low-power-pupd { }; }; =20 + rt1011_pins_default: rt1011-default-pins { + pins-spk { + pinmux =3D , + ; + output-high; + }; + }; + + rt1019p_pins_default: rt1019p-default-pins { + pins-amp-sdb { + pinmux =3D ; + output-low; + }; + }; + scp_pins: scp-default-pins { pins-vreq { pinmux =3D ; @@ -779,6 +884,18 @@ cros-ec-rpmsg { }; }; =20 +&sound { + status =3D "okay"; + + mediatek,adsp =3D <&adsp>; + mediatek,dai-link =3D + "DL10_FE", "DPTX_BE", "ETDM1_IN_BE", "ETDM2_IN_BE", + "ETDM1_OUT_BE", "ETDM2_OUT_BE","UL_SRC1_BE", + "AFE_SOF_DL2", "AFE_SOF_DL3", "AFE_SOF_UL4", "AFE_SOF_UL5"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&aud_pins_default>; +}; + &spi0 { status =3D "okay"; =20 --=20 2.35.1 From nobody Sat Sep 21 19:48:33 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03A4ACCA479 for ; Thu, 21 Jul 2022 13:43:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229849AbiGUNn2 (ORCPT ); Thu, 21 Jul 2022 09:43:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48504 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229648AbiGUNmi (ORCPT ); Thu, 21 Jul 2022 09:42:38 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 07B066E2EE; Thu, 21 Jul 2022 06:42:37 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 7C2756601AB1; Thu, 21 Jul 2022 14:42:35 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1658410955; bh=PxVOdo3kmX5GhVqhInInTAsKF/mvybao/JRyPYM/wN0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cJNzoD20dvOfLbAiqZBy7pcLSt3Rveh1ZcqZcd4l/bAFKjUef6AExV9iPKOW0SWDh EuC9msbg50W57KzztU5B5Zq8h3Q8NHgF6r7CJrN7AUbqHMp5qS/aTt7x6OwkFzJnnQ A1Hb7rrsfrnMhR5fVFia1KYKZuuCnqnrxDiAyaEcyN/T+QVWFakRPOg6+jQKi2bR5e KlpsBJE0f+WNau0FKKUOVKNRvjWLYBfXkLJIsaIeWbGcFjP6mvE+Cnj4L5q1jCVdXg 3HWcxdm/Z+sVVA2b1YSzQtxxsIHG955XyL238G29WI3q4aSk3ypuOaAF/Xdn73If5p cVjk6jn56XPfA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH 7/8] arm64: dts: mediatek: cherry: Enable keyboard PWM backlight Date: Thu, 21 Jul 2022 15:42:27 +0200 Message-Id: <20220721134228.310178-8-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> References: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a pwm-leds node to enable the PWM controlled keyboard backlight. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index ca9955a97f8f..9086a440a995 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -4,6 +4,7 @@ */ =20 #include +#include #include "mt8195.dtsi" #include "mt6359.dtsi" =20 @@ -31,6 +32,18 @@ dmic_codec: dmic-codec { wakeup-delay-ms =3D <50>; }; =20 + led-controller { + compatible =3D "pwm-leds"; + + keyboard_backlight: keyboard-backlight { + default-state =3D "off"; + function =3D LED_FUNCTION_KBD_BACKLIGHT; + label =3D "cros_ec::kbd_backlight"; + max-brightness =3D <1023>; + pwms =3D <&cros_ec_pwm 3>; + }; + }; + memory@40000000 { device_type =3D "memory"; reg =3D <0 0x40000000 0 0x80000000>; --=20 2.35.1 From nobody Sat Sep 21 19:48:33 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20CF7C43334 for ; Thu, 21 Jul 2022 13:43:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229949AbiGUNnP (ORCPT ); Thu, 21 Jul 2022 09:43:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229659AbiGUNmi (ORCPT ); Thu, 21 Jul 2022 09:42:38 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 971946FA02; Thu, 21 Jul 2022 06:42:37 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 138A46601AB2; Thu, 21 Jul 2022 14:42:36 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1658410956; bh=wMIiEPoxAhEiKY22jDJpVVBvPTPTcpvE8DsrxOXPpJ0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QiekTYt7ct2roixZMYW/tBDip+jdYZ4dfA5pHkwJqsU9TFI+kQxFNdiRy6JGdS2/A crpVrzx4emlQvlmqKYw6P6JBhuUoX8XCQ0DgJ+vBuF/uz5Ut9yZ6ACTTubUEsddTzz N0ihjwbCfIiTFP0Vdo+ln3COjCzfmuAGJIXjvfL8whuSEXYNkNL35lMatyW282ufIb LVE2JwdLGu6V/1deaF2+yNeo0mdsf9cZlBmJabmz4UhcFEQrwwlt8mTFnhDcWZAmeC qxVCKZXXIhrcl65bAVt2O/EHep1/Tm0Dc0/ahlD7sKzUJaCs5wkBpsm3UglDRXG4iy gxqHYKyDDCj+w== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno Subject: [PATCH 8/8] arm64: dts: mediatek: cherry: Enable MT6315 regulators on SPMI bus Date: Thu, 21 Jul 2022 15:42:28 +0200 Message-Id: <20220721134228.310178-9-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> References: <20220721134228.310178-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" All machines in the Cherry platform use MT6315 over SPMI: add the two instances, providing Vbcpu and Vgpu regulators. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/Makefile | 52 +------------------ .../boot/dts/mediatek/mt8195-cherry.dtsi | 42 +++++++++++++++ 2 files changed, 44 insertions(+), 50 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/me= diatek/Makefile index 04597ffc4286..ede7b208c882 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -1,54 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt2712-evb.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt6755-evb.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt6779-evb.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt6795-evb.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt6797-evb.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt6797-x20-dev.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt7622-rfb1.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt7622-bananapi-bpi-r64.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt7986a-rfb.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt7986b-rfb.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8167-pumpkin.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8173-elm.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8173-elm-hana.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8173-elm-hana-rev7.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8173-evb.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-evb.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-burnet.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-cozmo.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-damu.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-fennel-sku1.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-fennel-sku6.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-fennel-sku7.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-fennel14.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-fennel14-sku2.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-juniper-sku16.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-kappa.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-kenzo.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-willow-sku0.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-jacuzzi-willow-sku1.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-kakadu.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-kakadu-sku22.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-kodama-sku16.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-kodama-sku272.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-kodama-sku288.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-kodama-sku32.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-krane-sku0.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-krane-sku176.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-pumpkin.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8186-corsola-kingler.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8186-corsola-krabby.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8186-corsola-steelix-sku131072.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8186-corsola-rusty-sku196608.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8186-corsola-rusty-sku196609.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8186-evb.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8192-asurada-hayato-r1.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8192-asurada-spherion-r0.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8192-evb.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-cherry-tomato-r1.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-cherry-tomato-r2.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-cherry-tomato-r3.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-demo.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-evb.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8516-pumpkin.dtb + diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 9086a440a995..6219544e9912 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -5,6 +5,7 @@ =20 #include #include +#include #include "mt8195.dtsi" #include "mt6359.dtsi" =20 @@ -979,6 +980,47 @@ usb_c1: connector@1 { }; }; =20 +&spmi { + #address-cells =3D <2>; + #size-cells =3D <0>; + + mt6315@6 { + compatible =3D "mediatek,mt6315-regulator"; + reg =3D <0x6 SPMI_USID>; + + regulators { + mt6315_6_vbuck1: vbuck1 { + regulator-compatible =3D "vbuck1"; + regulator-name =3D "Vbcpu"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1193750>; + regulator-enable-ramp-delay =3D <256>; + regulator-ramp-delay =3D <6250>; + regulator-allowed-modes =3D <0 1 2>; + regulator-always-on; + }; + }; + }; + + mt6315@7 { + compatible =3D "mediatek,mt6315-regulator"; + reg =3D <0x7 SPMI_USID>; + + regulators { + mt6315_7_vbuck1: vbuck1 { + regulator-compatible =3D "vbuck1"; + regulator-name =3D "Vgpu"; + regulator-min-microvolt =3D <625000>; + regulator-max-microvolt =3D <1193750>; + regulator-enable-ramp-delay =3D <256>; + regulator-ramp-delay =3D <6250>; + regulator-allowed-modes =3D <0 1 2>; + regulator-always-on; + }; + }; + }; +}; + &u3phy0 { status =3D "okay"; }; --=20 2.35.1