From nobody Tue Apr 28 09:05:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A29E5C433EF for ; Thu, 21 Jul 2022 12:32:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232427AbiGUMcR (ORCPT ); Thu, 21 Jul 2022 08:32:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231521AbiGUMcO (ORCPT ); Thu, 21 Jul 2022 08:32:14 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09D7F743C3 for ; Thu, 21 Jul 2022 05:32:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1658406732; x=1689942732; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pmv0IWJld+qqpIiD2c41BQkOFDDXirYpdTr9umch9LM=; b=CDQkMXyxkBS+hiyaj+OEzH0l2E8593Ay73PPR8wmNLiwep7NJn8IZomB 6CNwtS4N52N2QdH5jmwrDIgIsbrtvo1RPDWOFl/a51QS6912i9BlAyKfM JEnV8zn0AumgAwOcxYVRSQ9s29bS2bGn1kd+0c5Y52nQMXKK6yjUkoR2V rDHshTtTpBibxUgji8uhLqSFF6eO7/3SbCvtxhK9E9b86reexxAB2c/1w ofga7vn8v46CpKXTbrhNcbhQEsxLFQ/ILDstJEmcYFdmBYr3nd8W8wkVg gXWh1Tahhduf7O8EGvhutEG9FWKZEq1/5F9AiqhHWJtQYvfgTfwvAsYA+ g==; X-IronPort-AV: E=McAfee;i="6400,9594,10414"; a="273878665" X-IronPort-AV: E=Sophos;i="5.92,289,1650956400"; d="scan'208";a="273878665" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jul 2022 05:32:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,289,1650956400"; d="scan'208";a="573720542" Received: from unknown (HELO localhost.localdomain) ([10.226.216.117]) by orsmga006.jf.intel.com with ESMTP; 21 Jul 2022 05:32:08 -0700 From: kah.jing.lee@intel.com To: linux-kernel@vger.kernel.org, gregkh@linuxfoundation.org, arnd@arndb.de Cc: rafael.j.wysocki@intel.com, tien.sung.ang@intel.com, dinh.nguyen@intel.com, Kah Jing Lee , Zhou@vger.kernel.org, Furong , Pierre-Louis Bossart Subject: [PATCH v2 1/3] drivers: misc: intel_sysid: Add sysid from arch to drivers Date: Thu, 21 Jul 2022 20:31:50 +0800 Message-Id: <20220721123149.416618-1-kah.jing.lee@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220721123017.416438-1-kah.jing.lee@intel.com> References: <20220721123017.416438-1-kah.jing.lee@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kah Jing Lee Add new sysid driver. The Altera(Intel) Sysid component is generally part of an FPGA design. The component can be hotplugged when the FPGA is reconfigured. This driver support the component being hotplugged. The sysid driver stores unique 32-bit id value which is similar to a check-sum value; different components, different configuration options, or both, can be configured to produce different id values. Timestamp field is the unique 32-bit value that is based on the system generation time. There are two basic ways to use the system ID core: - Verify the system ID before downloading new software to a system. This method can be used by software development tools, before downloading a program to a target hardware system, if the program is compiled for different hardware. - Check system ID after reset. If a program is running on hardware other than the expected Platform Designer system, the program may fail to function altogether. If the program does not crash, it can behave erroneously in subtle ways that are difficult to debug. To protect against this case, a program can compare the expected system ID against the system ID core, and report an error if they do not match. Usage: cat /sys/bus/platform/devices/soc:base_fpga_region/ soc:base_fpga_region:fpga_pr_region0/[addr.sysid]/sysid/id cat /sys/bus/platform/devices/soc:base_fpga_region/ soc:base_fpga_region:fpga_pr_region0/[addr.sysid]/sysid/buildtime Based on an initial contribution from Ley Foon Tan at Altera Signed-off-by: Kah Jing Lee Reviewed-by: Zhou, Furong Reviewed-by: Pierre-Louis Bossart Reported-by: kernel test robot --- v2: - Updated license header, commit message and author since original author no longer here - Updated driver description - Removed redundant word in Kconfig - Updated timestamp function, renamed timestamp -> buildtime due to program= med time during design generation instead of real-time timestamp reading - Updated Kconfig description - Updated sysfs add to devm_add_group - Add the Documentation/ABI/testing file - Updated header and newline formatting --- --- drivers/misc/Kconfig | 9 +++ drivers/misc/Makefile | 1 + drivers/misc/intel_sysid.c | 114 +++++++++++++++++++++++++++++++++++++ 3 files changed, 124 insertions(+) create mode 100644 drivers/misc/intel_sysid.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 41d2bb0ae23a..30cf36916593 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -483,6 +483,15 @@ config OPEN_DICE =20 If unsure, say N. =20 +config INTEL_SYSID + tristate "Intel System ID" + help + This enables the Intel System ID driver for a soft core. + Say Y here if you want to build a driver for Intel System ID. + + To compile this driver as a module, choose M here: the + module will be called intel_sysid. If unsure, say N here. + source "drivers/misc/c2port/Kconfig" source "drivers/misc/eeprom/Kconfig" source "drivers/misc/cb710/Kconfig" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 70e800e9127f..301c854b4cd3 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -40,6 +40,7 @@ obj-$(CONFIG_PCH_PHUB) +=3D pch_phub.o obj-y +=3D ti-st/ obj-y +=3D lis3lv02d/ obj-$(CONFIG_ALTERA_STAPL) +=3Daltera-stapl/ +obj-$(CONFIG_INTEL_SYSID) +=3D intel_sysid.o obj-$(CONFIG_INTEL_MEI) +=3D mei/ obj-$(CONFIG_VMWARE_VMCI) +=3D vmw_vmci/ obj-$(CONFIG_LATTICE_ECP3_CONFIG) +=3D lattice-ecp3-config.o diff --git a/drivers/misc/intel_sysid.c b/drivers/misc/intel_sysid.c new file mode 100644 index 000000000000..b63dbde63347 --- /dev/null +++ b/drivers/misc/intel_sysid.c @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022, Intel Corporation. + * Copyright (C) 2013-2015, Altera Corporation. + * + * Ley Foon Tan + * Kah Jing Lee + */ + +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "intel_sysid" + +struct intel_sysid { + void __iomem *regs; +}; + +/* System ID Registers*/ +#define SYSID_REG_ID 0x0 +#define SYSID_REG_TIMESTAMP 0x4 + +static ssize_t id_show(struct device *dev, struct device_attribute *attr, = char *buf) +{ + struct intel_sysid *sysid =3D dev_get_drvdata(dev); + + return sprintf(buf, "%u\n", readl(sysid->regs + SYSID_REG_ID)); +} + +static void convert_readable_timestamp(struct tm *buildtime) +{ + buildtime->tm_year +=3D 1900; + buildtime->tm_mon +=3D 1; +} + +static ssize_t buildtime_show(struct device *dev, struct device_attribute = *attr, char *buf) +{ + unsigned int reg; + struct tm buildtime; + struct intel_sysid *sysid =3D dev_get_drvdata(dev); + + reg =3D readl(sysid->regs + SYSID_REG_TIMESTAMP); + time64_to_tm(reg, 0, &buildtime); + convert_readable_timestamp(&buildtime); + + return sprintf(buf, "%u (%u-%u-%u %u:%u:%u UTC)\n", reg, + (unsigned int)(buildtime.tm_year), + buildtime.tm_mon, buildtime.tm_mday, buildtime.tm_hour, + buildtime.tm_min, buildtime.tm_sec); +} + +static DEVICE_ATTR_RO(id); +static DEVICE_ATTR_RO(buildtime); + +static struct attribute *intel_sysid_attrs[] =3D { + &dev_attr_id.attr, + &dev_attr_buildtime.attr, + NULL +}; + +struct attribute_group intel_sysid_attr_group =3D { + .name =3D "sysid", + .attrs =3D intel_sysid_attrs, +}; + +static int intel_sysid_probe(struct platform_device *pdev) +{ + struct intel_sysid *sysid; + struct resource *regs; + + sysid =3D devm_kzalloc(&pdev->dev, sizeof(struct intel_sysid), + GFP_KERNEL); + if (!sysid) + return -ENOMEM; + + regs =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!regs) + return -ENXIO; + + sysid->regs =3D devm_ioremap_resource(&pdev->dev, regs); + if (IS_ERR(sysid->regs)) + return PTR_ERR(sysid->regs); + + platform_set_drvdata(pdev, sysid); + + return devm_device_add_group(&pdev->dev, &intel_sysid_attr_group); +} + +static const struct of_device_id intel_sysid_match[] =3D { + { .compatible =3D "intel,socfpga-sysid-1.0" }, + { /* Sentinel */ } +}; + +MODULE_DEVICE_TABLE(of, intel_sysid_match); + +static struct platform_driver intel_sysid_platform_driver =3D { + .driver =3D { + .name =3D DRV_NAME, + .of_match_table =3D of_match_ptr(intel_sysid_match), + }, + .probe =3D intel_sysid_probe, +}; + +module_platform_driver(intel_sysid_platform_driver); + +MODULE_AUTHOR("Kah Jing Lee "); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Intel System ID driver"); +MODULE_ALIAS("platform:" DRV_NAME); --=20 2.25.1 From nobody Tue Apr 28 09:05:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AA98C433EF for ; Thu, 21 Jul 2022 12:32:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233571AbiGUMc5 (ORCPT ); Thu, 21 Jul 2022 08:32:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229497AbiGUMcz (ORCPT ); Thu, 21 Jul 2022 08:32:55 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E3AA6173C for ; Thu, 21 Jul 2022 05:32:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1658406774; x=1689942774; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8sKkrl0mKQraN12jKx8DZsTPCIjkH/bm4bE5zt6c6OA=; b=Oc/E2RmYxMbIVomUVKpfqFykSfQTTsAAWsqOOSp8+Kd1dy5l+fbiEWZt UJQZK9nlMBHGc7aO+gZOCJK38ggqUrFgHhF7EODxvzBqAe4flKnVMCeLH 0MTRlBpw8aWH4jRx8nvWzmKzaFGyDJuLAWidnbbFBAdkajXVEHQ+6MFUg dX3Zj/IuU7VUoJLwoCOUBVMpr/0705JMcL7vsFTsvEIrp+EqTPhEMC881 Ag5B/2dzcTmaTzAi/TIJSbrjNaxaoJ/znzzRgYGHFA725GNRaMfCQM8T2 CqWKWcy4PHt5wNfwohqI1hD0Led/UlZd1JBWefhUS5i5cmgrgFyMeBNaA w==; X-IronPort-AV: E=McAfee;i="6400,9594,10414"; a="312743591" X-IronPort-AV: E=Sophos;i="5.92,289,1650956400"; d="scan'208";a="312743591" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jul 2022 05:32:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,289,1650956400"; d="scan'208";a="573720719" Received: from unknown (HELO localhost.localdomain) ([10.226.216.117]) by orsmga006.jf.intel.com with ESMTP; 21 Jul 2022 05:32:51 -0700 From: kah.jing.lee@intel.com To: linux-kernel@vger.kernel.org, gregkh@linuxfoundation.org, arnd@arndb.de Cc: rafael.j.wysocki@intel.com, tien.sung.ang@intel.com, dinh.nguyen@intel.com, Kah Jing Lee , Zhou Furong , Pierre-Louis Bossart Subject: [PATCH v2 2/3] dt-bindings: misc: intel_sysid: Add the system id binding for Altera(Intel) FPGA platform Date: Thu, 21 Jul 2022 20:32:17 +0800 Message-Id: <20220721123216.416696-1-kah.jing.lee@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220721123017.416438-1-kah.jing.lee@intel.com> References: <20220721123017.416438-1-kah.jing.lee@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kah Jing Lee This binding is created for Altera(Intel) FPGA platform System ID soft IP. The Altera(Intel) Sysid component is generally part of an FPGA design. The component can be hotplugged when the FPGA is reconfigured. Based on an initial contribution from Ley Foon Tan at Altera Signed-off-by: Kah Jing Lee Reviewed-by: Zhou Furong Reviewed-by: Pierre-Louis Bossart --- .../bindings/misc/intel,socfpga-sysid.yaml | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/intel,socfpga-sy= sid.yaml diff --git a/Documentation/devicetree/bindings/misc/intel,socfpga-sysid.yam= l b/Documentation/devicetree/bindings/misc/intel,socfpga-sysid.yaml new file mode 100644 index 000000000000..055f4cb305ac --- /dev/null +++ b/Documentation/devicetree/bindings/misc/intel,socfpga-sysid.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2022, Intel Corporation. +# Copyright (C) 2013-2015, Altera Corporation. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/intel,socfpga-sysid.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Altera(Intel) Sysid IP core driver + +maintainers: + - Arnd Bergmann + - Greg Kroah-Hartman + +description: | + The Altera(Intel) Sysid component is generally part of an FPGA design. T= he + component can be hotplugged when the FPGA is reconfigured. This patch + fixes the driver to support the component being hotplugged. + +properties: + compatible: + items: + - const: intel,socfpga-sysid-1.0 + + reg: + items: + - description: physical address and length of the registers which + contain revision and debug features + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + sysid_qsys: sysid@10000 { + compatible =3D "intel,socfpga-sysid-1.0"; + reg =3D < 0x10000 0x00000008 >; + }; --=20 2.25.1 From nobody Tue Apr 28 09:05:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 640E9C43334 for ; Thu, 21 Jul 2022 12:33:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233618AbiGUMdQ (ORCPT ); Thu, 21 Jul 2022 08:33:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39666 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229497AbiGUMdO (ORCPT ); Thu, 21 Jul 2022 08:33:14 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C9CC743C4 for ; Thu, 21 Jul 2022 05:33:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1658406794; x=1689942794; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9Mastm4bVBpgeITeul311rbm3Z4aqMWvLnpkTWQve5Q=; b=OJSP0q9ssN1S2rjiNsljXOHqaAno/TNMr3Br+Z+VY8lwyD1lGFVmA5dK Xhy4yeAPQNhyzCH3sNeTb3rUNiuEEJhdNJGSgvKI6g8gGOltx3jhbEYNW a55q0B0FV15QtgpPhAXMUW1tzEhsfQ27/45SEs+JX1D1DphzvSQQdGtjq GPaO2g/bzuueM8fwtOmb6LYAq0MWdYRau2M2aAXjRjGSt2So4S60wqzQT ADT7YSDggangEkogZy3Zfnzz9b9zoGbqRXT4B0Ewkak6++7UIFnAesi7D Bhf4buuKjWd7p/Fr4dEMr1pbK+6Hc4EIxZaSWwR2QLKz442IIuMWu5igm A==; X-IronPort-AV: E=McAfee;i="6400,9594,10414"; a="373332458" X-IronPort-AV: E=Sophos;i="5.92,289,1650956400"; d="scan'208";a="373332458" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jul 2022 05:33:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,289,1650956400"; d="scan'208";a="573720813" Received: from unknown (HELO localhost.localdomain) ([10.226.216.117]) by orsmga006.jf.intel.com with ESMTP; 21 Jul 2022 05:33:11 -0700 From: kah.jing.lee@intel.com To: linux-kernel@vger.kernel.org, gregkh@linuxfoundation.org, arnd@arndb.de Cc: rafael.j.wysocki@intel.com, tien.sung.ang@intel.com, dinh.nguyen@intel.com, Kah Jing Lee , Zhou Furong , Pierre-Louis Bossart Subject: [PATCH v2 3/3] documentation: misc: intel_sysid: Add the system id sysfs documentation for Altera(Intel) FPGA platform Date: Thu, 21 Jul 2022 20:32:59 +0800 Message-Id: <20220721123258.416802-1-kah.jing.lee@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220721123017.416438-1-kah.jing.lee@intel.com> References: <20220721123017.416438-1-kah.jing.lee@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kah Jing Lee This sysfs documentation is created for Altera(Intel) FPGA platform System ID soft IP. The Altera(Intel) Sysid component is generally part of an FPGA design. The component can be hotplugged when the FPGA is reconfigured. Based on an initial contribution from Ley Foon Tan at Altera Signed-off-by: Kah Jing Lee Reviewed-by: Zhou Furong Reviewed-by: Pierre-Louis Bossart --- .../testing/sysfs-devices-platform-soc-sysid | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-devices-platform-soc-sy= sid diff --git a/Documentation/ABI/testing/sysfs-devices-platform-soc-sysid b/D= ocumentation/ABI/testing/sysfs-devices-platform-soc-sysid new file mode 100644 index 000000000000..9fa58fd88dc0 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-devices-platform-soc-sysid @@ -0,0 +1,27 @@ +What: /sys/devices/platform/soc@X/soc:base_fpga_region/ +soc:base_fpga_region:fpga_pr_region0/XXXXXXXX.sysid/ +Date: May 2022 +KernelVersion: v5.18 +Contact: Kah Jing Lee +Description: + The soc@X/soc:base_fpga_region/soc:base_fpga_region:fpga_pr_region0/ + XXXXXXXX.sysid/ directory contains read-only attributes exposing + information about an System ID soft IP device. The X values could vary, + based on the FPGA platform System ID soft IP register address. + +What: .../XXXXXXX.sysid/sysid +Date: May 2022 +KernelVersion: v5.18 +Contact: Kah Jing Lee +Description: + The .../XXXXXXX.sysid/sysid file contains the System ID for the FPGA + platform which is unique for the platform type and can be used for + checking the platform type for software download purposes. + +What: .../XXXXXXX.sysid/buildtime +Date: May 2022 +KernelVersion: v5.18 +Contact: Kah Jing Lee +Description: + The .../XXXXXXX.sysid/buildtime file contains the buildtime for the + FPGA board file generation. --=20 2.25.1