From nobody Sat Sep 21 23:14:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4D60C433EF for ; Wed, 20 Jul 2022 12:32:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240951AbiGTMcM (ORCPT ); Wed, 20 Jul 2022 08:32:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60816 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238067AbiGTMaj (ORCPT ); Wed, 20 Jul 2022 08:30:39 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E6DC4B0E9; Wed, 20 Jul 2022 05:30:37 -0700 (PDT) X-UUID: 8b395bc8d83148e8a8192667bfda31e9-20220720 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.8,REQID:8f834e73-00dd-43fb-ba90-f71f6e377c98,OB:10,L OB:40,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham, ACTION:release,TS:90 X-CID-INFO: VERSION:1.1.8,REQID:8f834e73-00dd-43fb-ba90-f71f6e377c98,OB:10,LOB :40,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D, ACTION:quarantine,TS:90 X-CID-META: VersionHash:0f94e32,CLOUDID:b9547d33-b9e4-42b8-b28a-6364427c76bb,C OID:cb13ecc38a9a,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,QS:nil,BEC:nil,COL:0 X-UUID: 8b395bc8d83148e8a8192667bfda31e9-20220720 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1399166967; Wed, 20 Jul 2022 20:30:27 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Wed, 20 Jul 2022 20:30:26 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 20 Jul 2022 20:30:26 +0800 From: Tinghan Shen To: Yong Wu , Joerg Roedel , Will Deacon , Robin Murphy , Rob Herring , Krzysztof Kozlowski , Lee Jones , Matthias Brugger , Tinghan Shen , AngeloGioacchino Del Regno , MandyJH Liu CC: , , , , , , Trevor Wu Subject: [PATCH v3 16/21] arm64: dts: mt8195: Add audio related nodes Date: Wed, 20 Jul 2022 20:30:18 +0800 Message-ID: <20220720123023.13500-17-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220720123023.13500-1-tinghan.shen@mediatek.com> References: <20220720123023.13500-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add audio related nodes for mt8195. Signed-off-by: Trevor Wu Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 58 ++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index f35540637197..635d8cf9fe19 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -226,6 +226,17 @@ <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; }; =20 + dmic_codec: dmic-codec { + compatible =3D "dmic-codec"; + num-channels =3D <2>; + wakeup-delay-ms =3D <50>; + }; + + sound: mt8195-sound { + mediatek,platform =3D <&afe>; + status =3D "disabled"; + }; + clk26m: oscillator-26m { compatible =3D "fixed-clock"; #clock-cells =3D <0>; @@ -728,6 +739,53 @@ #clock-cells =3D <1>; }; =20 + afe: mt8195-afe-pcm@10890000 { + compatible =3D "mediatek,mt8195-audio"; + reg =3D <0 0x10890000 0 0x10000>; + mediatek,topckgen =3D <&topckgen>; + power-domains =3D <&spm MT8195_POWER_DOMAIN_AUDIO>; + interrupts =3D ; + clocks =3D <&clk26m>, + <&apmixedsys CLK_APMIXED_APLL1>, + <&apmixedsys CLK_APMIXED_APLL2>, + <&topckgen CLK_TOP_APLL12_DIV0>, + <&topckgen CLK_TOP_APLL12_DIV1>, + <&topckgen CLK_TOP_APLL12_DIV2>, + <&topckgen CLK_TOP_APLL12_DIV3>, + <&topckgen CLK_TOP_APLL12_DIV9>, + <&topckgen CLK_TOP_A1SYS_HP>, + <&topckgen CLK_TOP_AUD_INTBUS>, + <&topckgen CLK_TOP_AUDIO_H>, + <&topckgen CLK_TOP_AUDIO_LOCAL_BUS>, + <&topckgen CLK_TOP_DPTX_MCK>, + <&topckgen CLK_TOP_I2SO1_MCK>, + <&topckgen CLK_TOP_I2SO2_MCK>, + <&topckgen CLK_TOP_I2SI1_MCK>, + <&topckgen CLK_TOP_I2SI2_MCK>, + <&infracfg_ao CLK_INFRA_AO_AUDIO_26M_B>, + <&scp_adsp CLK_SCP_ADSP_AUDIODSP>; + clock-names =3D "clk26m", + "apll1_ck", + "apll2_ck", + "apll12_div0", + "apll12_div1", + "apll12_div2", + "apll12_div3", + "apll12_div9", + "a1sys_hp_sel", + "aud_intbus_sel", + "audio_h_sel", + "audio_local_bus_sel", + "dptx_m_sel", + "i2so1_m_sel", + "i2so2_m_sel", + "i2si1_m_sel", + "i2si2_m_sel", + "infra_ao_audio_26m_b", + "scp_adsp_audiodsp"; + status =3D "disabled"; + }; + uart0: serial@11001100 { compatible =3D "mediatek,mt8195-uart", "mediatek,mt6577-uart"; --=20 2.18.0