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[122.107.196.14]) by smtp.gmail.com with ESMTPSA id a8-20020a1709027e4800b0016cbb46806asm9075813pln.278.2022.07.18.17.20.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Jul 2022 17:20:04 -0700 (PDT) From: Daniil Lunev To: Adrian Hunter , Bart Van Assche Cc: Daniil Lunev , Avri Altman , Bean Huo , "James E.J. Bottomley" , "Martin K. Petersen" , linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Subject: [PATCH v2] scsi: ufs: ufs-pci: Correct check for RESET DSM Date: Tue, 19 Jul 2022 10:19:54 +1000 Message-Id: <20220719101903.v2.1.I22460c4f4a9ccf2c96c3f9bb392b409926d80b2f@changeid> X-Mailer: git-send-email 2.31.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" dsm_fns is a bitmap, and it is 0-indexed according to the check in __intel_dsm funciton. But common initialization was checking it as if it was 1-indexed. The CL corrects the discrepancy. This change won't break any existing calls to the function, since before the change both bits 0 and 1 were checked and needed to be set. Signed-off-by: Daniil Lunev Reviewed-by: Adrian Hunter Reviewed-by: Bart Van Assche --- Changes in v2: * Make __INTEL_DSM_SUPPORTED a function * use `1u` instead of `1` in shift operator drivers/ufs/host/ufshcd-pci.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/ufs/host/ufshcd-pci.c b/drivers/ufs/host/ufshcd-pci.c index 04166bda41daa..c13c31c2ae793 100644 --- a/drivers/ufs/host/ufshcd-pci.c +++ b/drivers/ufs/host/ufshcd-pci.c @@ -24,7 +24,7 @@ struct ufs_host { void (*late_init)(struct ufs_hba *hba); }; =20 -enum { +enum intel_ufs_dsm_func_id { INTEL_DSM_FNS =3D 0, INTEL_DSM_RESET =3D 1, }; @@ -42,6 +42,15 @@ static const guid_t intel_dsm_guid =3D GUID_INIT(0x1A4832A0, 0x7D03, 0x43CA, 0xB0, 0x20, 0xF6, 0xDC, 0xD1, 0x2A, 0x19, 0x50); =20 +static bool __intel_dsm_supported(struct intel_host *host, + enum intel_ufs_dsm_func_id fn) +{ + return fn < 32 && fn >=3D 0 && (host->dsm_fns & (1u << fn)); +} + +#define INTEL_DSM_SUPPORTED(host, name) \ + __intel_dsm_supported(host, INTEL_DSM_##name) + static int __intel_dsm(struct intel_host *intel_host, struct device *dev, unsigned int fn, u32 *result) { @@ -71,7 +80,7 @@ static int __intel_dsm(struct intel_host *intel_host, str= uct device *dev, static int intel_dsm(struct intel_host *intel_host, struct device *dev, unsigned int fn, u32 *result) { - if (fn > 31 || !(intel_host->dsm_fns & (1 << fn))) + if (!__intel_dsm_supported(intel_host, fn)) return -EOPNOTSUPP; =20 return __intel_dsm(intel_host, dev, fn, result); @@ -300,7 +309,7 @@ static int ufs_intel_device_reset(struct ufs_hba *hba) { struct intel_host *host =3D ufshcd_get_variant(hba); =20 - if (host->dsm_fns & INTEL_DSM_RESET) { + if (INTEL_DSM_SUPPORTED(host, RESET)) { u32 result =3D 0; int err; =20 @@ -342,7 +351,7 @@ static int ufs_intel_common_init(struct ufs_hba *hba) return -ENOMEM; ufshcd_set_variant(hba, host); intel_dsm_init(host, hba->dev); - if (host->dsm_fns & INTEL_DSM_RESET) { + if (INTEL_DSM_SUPPORTED(host, RESET)) { if (hba->vops->device_reset) hba->caps |=3D UFSHCD_CAP_DEEPSLEEP; } else { --=20 2.31.0