From nobody Sat Apr 18 07:35:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6799FC433EF for ; Fri, 15 Jul 2022 22:35:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231383AbiGOWfi (ORCPT ); Fri, 15 Jul 2022 18:35:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38862 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232421AbiGOWfa (ORCPT ); Fri, 15 Jul 2022 18:35:30 -0400 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9ECA26C108 for ; Fri, 15 Jul 2022 15:35:29 -0700 (PDT) Received: by mail-yb1-xb49.google.com with SMTP id r16-20020a257610000000b0066f5239588eso4783833ybc.12 for ; Fri, 15 Jul 2022 15:35:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=Jr53tgo6pPtSm720C8wiHjlk7XjKJWW+YOa2HOTSwBk=; b=nxCFMMK7okp6PcYQszzFL7Pkq85ar+xehe9K+lNxnEcxIix+Fllvyo8hDDDJIv59m4 0BrmBLRkkCD7gT8uFqKb1AJVaPdKCAgo9pAVHhdR400pdP24pyp08yCQtuQ6qbCOKNH0 ok/DVKokk/sYzVJHYOecs+hV6Mob8ATctQpItggNN4rAoZHRFZ8ebRcd+uPl8blCtogd AJA3IH+2kSDDsHZkwboTb+XHMJhD9C2DHuDAI9bmVwPTkNUFk1N4owxnWN3lDmQlJC17 JGfCOXLgtzenGEPy3jAvoMq3s8LZ2AkVktQ5Nvd/H4+P+14Jm9/l2pxpk/rUnMLP9Bj5 BBIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=Jr53tgo6pPtSm720C8wiHjlk7XjKJWW+YOa2HOTSwBk=; b=SgidoGQVxZvf0u/jMt9+upj5b/OWdMQBYeFta3Ep4x8RMV2l9IKGB3pdrxEBbpXh9o UunchiIzSRSNYeR1UHemrJq5Axpbsr8vdS2fZOxnlD9EG2zfIWisbM7q0aFr+hnONXPa cS+9sftmNWyi+57NtYU5qXlbAUXyuXOFc0aT5se5FwfIpr+B+sZUGy+ferlxyUMX+gGT uEaT+05XJzIx/GRFb/DTPC29H057bRj+/GEpvdNa06USAh3ZVyTOuo3gb9DLcD4h4i2z HzwmjgMDqP9lVGUaOLzRY4s/20w8N7vwJTmUxBv8UU31tcfic/16Z27yidp6aTsL/40K L/ew== X-Gm-Message-State: AJIora82AsL4NG+KAbAcJL1aQtA/HsLrb+pSdr0cZA/wPhf+VXuYp85c RbMq3drp/YSsiKOtCVtMYKhi8tE9gb3g X-Google-Smtp-Source: AGRyM1vgU8ro3WU7pMf71EqDWZhvbhbOjrSPyemVok5CitutWzRVlfFvrSr4djCS+u/ExEJUG7ZSOlBig+Qf X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:72de:b499:63be:efe1]) (user=irogers job=sendgmr) by 2002:a25:bdc6:0:b0:66e:3b23:55f6 with SMTP id g6-20020a25bdc6000000b0066e3b2355f6mr16485350ybk.230.1657924528660; Fri, 15 Jul 2022 15:35:28 -0700 (PDT) Date: Fri, 15 Jul 2022 15:35:20 -0700 In-Reply-To: <20220715223521.3389971-1-irogers@google.com> Message-Id: <20220715223521.3389971-2-irogers@google.com> Mime-Version: 1.0 References: <20220715223521.3389971-1-irogers@google.com> X-Mailer: git-send-email 2.37.0.170.g444d1eabd0-goog Subject: [PATCH v3 1/2] perf metrics: Add literal for system TSC frequency From: Ian Rogers To: perry.taylor@intel.com, caleb.biggers@intel.com, kshipra.bopardikar@intel.com, Kan Liang , Zhengjun Xing , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Maxime Coquelin , Alexandre Torgue , Andi Kleen , James Clark , John Garry , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Cc: Stephane Eranian , Ian Rogers Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Such a literal is useful to calculate things like the average frequency [1]. The TSC frequency isn't exposed by sysfs although some experimental drivers look to add it [2]. This change computes the value using the frequency in /proc/cpuinfo which is accruate at least on Intel processors. [1] https://github.com/intel/perfmon-metrics/blob/5ad9ef7056f31075e8178b9f1= fb732af183b2c8d/SKX/metrics/perf/skx_metric_perf.json#L11 [2] https://github.com/trailofbits/tsc_freq_khz Signed-off-by: Ian Rogers --- tools/perf/tests/expr.c | 15 +++++++++++++ tools/perf/util/expr.c | 49 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 64 insertions(+) diff --git a/tools/perf/tests/expr.c b/tools/perf/tests/expr.c index 5c0032fe93ae..45afe4f24859 100644 --- a/tools/perf/tests/expr.c +++ b/tools/perf/tests/expr.c @@ -1,8 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 #include "util/debug.h" #include "util/expr.h" +#include "util/header.h" #include "util/smt.h" #include "tests.h" +#include #include #include #include @@ -69,6 +71,11 @@ static int test__expr(struct test_suite *t __maybe_unuse= d, int subtest __maybe_u double val, num_cpus, num_cores, num_dies, num_packages; int ret; struct expr_parse_ctx *ctx; + bool is_intel =3D false; + char buf[128]; + + if (!get_cpuid(buf, sizeof(buf))) + is_intel =3D strstr(buf, "Intel") !=3D NULL; =20 TEST_ASSERT_EQUAL("ids_union", test_ids_union(), 0); =20 @@ -175,6 +182,14 @@ static int test__expr(struct test_suite *t __maybe_unu= sed, int subtest __maybe_u if (num_dies) // Some platforms do not have CPU die support, for example = s390 TEST_ASSERT_VAL("#num_dies >=3D #num_packages", num_dies >=3D num_packag= es); =20 + if (is_intel) { + double system_tsc_freq; + + TEST_ASSERT_VAL("#system_tsc_freq", expr__parse(&system_tsc_freq, ctx, + "#system_tsc_freq") =3D=3D 0); + TEST_ASSERT_VAL("!isnan(#system_tsc_freq)", !isnan(system_tsc_freq)); + } + /* * Source count returns the number of events aggregating in a leader * event including the leader. Check parsing yields an id. diff --git a/tools/perf/util/expr.c b/tools/perf/util/expr.c index 675f318ce7c1..4c81533e4b43 100644 --- a/tools/perf/util/expr.c +++ b/tools/perf/util/expr.c @@ -402,6 +402,50 @@ double expr_id_data__source_count(const struct expr_id= _data *data) return data->val.source_count; } =20 +/* + * Derive the TSC frequency in Hz from the /proc/cpuinfo, for example: + * ... + * model name : Intel(R) Xeon(R) Gold 6154 CPU @ 3.00GHz + * ... + * will return 3000000000. + */ +static double system_tsc_freq(void) +{ + static double result; + static bool computed; + FILE *cpuinfo; + char *line =3D NULL; + size_t len =3D 0; + + if (computed) + return result; + + computed =3D true; + result =3D NAN; + cpuinfo =3D fopen("/proc/cpuinfo", "r"); + if (!cpuinfo) { + pr_err("Failed to read /proc/cpuinfo for TSC frequency"); + return NAN; + } + while (getline(&line, &len, cpuinfo) > 0) { + if (!strncmp(line, "model name", 10)) { + char *pos =3D strstr(line + 11, " @ "); + + if (pos && sscanf(pos, " @ %lfGHz", &result) =3D=3D 1) { + result *=3D 1000000000; + goto out; + } + } + } +out: + if (isnan(result)) + pr_err("Failed to find TSC frequency in /proc/cpuinfo"); + + free(line); + fclose(cpuinfo); + return result; +} + double expr__get_literal(const char *literal) { static struct cpu_topology *topology; @@ -417,6 +461,11 @@ double expr__get_literal(const char *literal) goto out; } =20 + if (!strcasecmp("#system_tsc_freq", literal)) { + result =3D system_tsc_freq(); + goto out; + } + /* * Assume that topology strings are consistent, such as CPUs "0-1" * wouldn't be listed as "0,1", and so after deduplication the number of --=20 2.37.0.170.g444d1eabd0-goog From nobody Sat Apr 18 07:35:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51EAEC43334 for ; Fri, 15 Jul 2022 22:35:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232708AbiGOWfn (ORCPT ); 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Fri, 15 Jul 2022 15:35:31 -0700 (PDT) Date: Fri, 15 Jul 2022 15:35:21 -0700 In-Reply-To: <20220715223521.3389971-1-irogers@google.com> Message-Id: <20220715223521.3389971-3-irogers@google.com> Mime-Version: 1.0 References: <20220715223521.3389971-1-irogers@google.com> X-Mailer: git-send-email 2.37.0.170.g444d1eabd0-goog Subject: [PATCH v3 2/2] perf tsc: Add arch TSC frequency information From: Ian Rogers To: perry.taylor@intel.com, caleb.biggers@intel.com, kshipra.bopardikar@intel.com, Kan Liang , Zhengjun Xing , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Maxime Coquelin , Alexandre Torgue , Andi Kleen , James Clark , John Garry , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Cc: Stephane Eranian , Ian Rogers Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Kan Liang The TSC frequency information is required for the event metrics with the literal, system_tsc_freq. For the newer Intel platform, the TSC frequency information can be retrieved from the CPUID leaf 0x15. If the TSC frequency information isn't present the /proc/cpuinfo approach is used. Refactor cpuid for this use. Note, the previous stack pushing/popping approach was broken on x86-64 that has stack red zones that would be clobbered. Signed-off-by: Kan Liang Signed-off-by: Ian Rogers --- tools/perf/arch/x86/util/cpuid.h | 34 +++++++++++++++++++++++++++++++ tools/perf/arch/x86/util/header.c | 27 ++++++++++-------------- tools/perf/arch/x86/util/tsc.c | 33 ++++++++++++++++++++++++++++++ tools/perf/util/expr.c | 15 +++++++++++++- tools/perf/util/tsc.h | 1 + 5 files changed, 93 insertions(+), 17 deletions(-) create mode 100644 tools/perf/arch/x86/util/cpuid.h diff --git a/tools/perf/arch/x86/util/cpuid.h b/tools/perf/arch/x86/util/cp= uid.h new file mode 100644 index 000000000000..0a3ae0ace7e9 --- /dev/null +++ b/tools/perf/arch/x86/util/cpuid.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef PERF_CPUID_H +#define PERF_CPUID_H 1 + + +static inline void +cpuid(unsigned int op, unsigned int op2, unsigned int *a, unsigned int *b, + unsigned int *c, unsigned int *d) +{ + /* + * Preserve %ebx/%rbx register by either placing it in %rdi or saving it + * on the stack - x86-64 needs to avoid the stack red zone. In PIC + * compilations %ebx contains the address of the global offset + * table. %rbx is occasionally used to address stack variables in + * presence of dynamic allocas. + */ + asm( +#if defined(__x86_64__) + "mov %%rbx, %%rdi\n" + "cpuid\n" + "xchg %%rdi, %%rbx\n" +#else + "pushl %%ebx\n" + "cpuid\n" + "movl %%ebx, %%edi\n" + "popl %%ebx\n" +#endif + : "=3Da"(*a), "=3DD"(*b), "=3Dc"(*c), "=3Dd"(*d) + : "a"(op), "2"(op2)); +} + +void get_cpuid_0(char *vendor, unsigned int *lvl); + +#endif diff --git a/tools/perf/arch/x86/util/header.c b/tools/perf/arch/x86/util/h= eader.c index 578c8c568ffd..a51444a77a5f 100644 --- a/tools/perf/arch/x86/util/header.c +++ b/tools/perf/arch/x86/util/header.c @@ -9,18 +9,17 @@ =20 #include "../../../util/debug.h" #include "../../../util/header.h" +#include "cpuid.h" =20 -static inline void -cpuid(unsigned int op, unsigned int *a, unsigned int *b, unsigned int *c, - unsigned int *d) +void get_cpuid_0(char *vendor, unsigned int *lvl) { - __asm__ __volatile__ (".byte 0x53\n\tcpuid\n\t" - "movl %%ebx, %%esi\n\t.byte 0x5b" - : "=3Da" (*a), - "=3DS" (*b), - "=3Dc" (*c), - "=3Dd" (*d) - : "a" (op)); + unsigned int b, c, d; + + cpuid(0, 0, lvl, &b, &c, &d); + strncpy(&vendor[0], (char *)(&b), 4); + strncpy(&vendor[4], (char *)(&d), 4); + strncpy(&vendor[8], (char *)(&c), 4); + vendor[12] =3D '\0'; } =20 static int @@ -31,14 +30,10 @@ __get_cpuid(char *buffer, size_t sz, const char *fmt) int nb; char vendor[16]; =20 - cpuid(0, &lvl, &b, &c, &d); - strncpy(&vendor[0], (char *)(&b), 4); - strncpy(&vendor[4], (char *)(&d), 4); - strncpy(&vendor[8], (char *)(&c), 4); - vendor[12] =3D '\0'; + get_cpuid_0(vendor, &lvl); =20 if (lvl >=3D 1) { - cpuid(1, &a, &b, &c, &d); + cpuid(1, 0, &a, &b, &c, &d); =20 family =3D (a >> 8) & 0xf; /* bits 11 - 8 */ model =3D (a >> 4) & 0xf; /* Bits 7 - 4 */ diff --git a/tools/perf/arch/x86/util/tsc.c b/tools/perf/arch/x86/util/tsc.c index 559365f8fe52..b69144f22489 100644 --- a/tools/perf/arch/x86/util/tsc.c +++ b/tools/perf/arch/x86/util/tsc.c @@ -1,7 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 #include +#include =20 #include "../../../util/tsc.h" +#include "cpuid.h" =20 u64 rdtsc(void) { @@ -11,3 +13,34 @@ u64 rdtsc(void) =20 return low | ((u64)high) << 32; } + +double arch_get_tsc_freq(void) +{ + unsigned int a, b, c, d, lvl; + static bool cached; + static double tsc; + char vendor[16]; + + if (cached) + return tsc; + + cached =3D true; + get_cpuid_0(vendor, &lvl); + if (!strstr(vendor, "Intel")) + return 0; + + /* + * Don't support Time Stamp Counter and + * Nominal Core Crystal Clock Information Leaf. + */ + if (lvl < 0x15) + return 0; + + cpuid(0x15, 0, &a, &b, &c, &d); + /* TSC frequency is not enumerated */ + if (!a || !b || !c) + return 0; + + tsc =3D (double)c * (double)b / (double)a; + return tsc; +} diff --git a/tools/perf/util/expr.c b/tools/perf/util/expr.c index 4c81533e4b43..16f10e6d5ca5 100644 --- a/tools/perf/util/expr.c +++ b/tools/perf/util/expr.c @@ -12,6 +12,7 @@ #include "expr-bison.h" #include "expr-flex.h" #include "smt.h" +#include "tsc.h" #include #include #include @@ -443,9 +444,19 @@ static double system_tsc_freq(void) =20 free(line); fclose(cpuinfo); + if (isnan(result)) + pr_err("Error reading system_tsc_freq"); + return result; } =20 +#if !defined(__i386__) && !defined(__x86_64__) +double arch_get_tsc_freq(void) +{ + return 0.0; +} +#endif + double expr__get_literal(const char *literal) { static struct cpu_topology *topology; @@ -462,7 +473,9 @@ double expr__get_literal(const char *literal) } =20 if (!strcasecmp("#system_tsc_freq", literal)) { - result =3D system_tsc_freq(); + result =3D arch_get_tsc_freq(); + if (fpclassify(result) =3D=3D FP_ZERO) + result =3D system_tsc_freq(); goto out; } =20 diff --git a/tools/perf/util/tsc.h b/tools/perf/util/tsc.h index 7d83a31732a7..88fd1c4c1cb8 100644 --- a/tools/perf/util/tsc.h +++ b/tools/perf/util/tsc.h @@ -25,6 +25,7 @@ int perf_read_tsc_conversion(const struct perf_event_mmap= _page *pc, u64 perf_time_to_tsc(u64 ns, struct perf_tsc_conversion *tc); u64 tsc_to_perf_time(u64 cyc, struct perf_tsc_conversion *tc); u64 rdtsc(void); +double arch_get_tsc_freq(void); =20 size_t perf_event__fprintf_time_conv(union perf_event *event, FILE *fp); =20 --=20 2.37.0.170.g444d1eabd0-goog