From nobody Fri Dec 19 19:00:21 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3EC1C43334 for ; Tue, 12 Jul 2022 23:13:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233850AbiGLXN2 (ORCPT ); Tue, 12 Jul 2022 19:13:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229906AbiGLXN0 (ORCPT ); Tue, 12 Jul 2022 19:13:26 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A07B39B9C7 for ; Tue, 12 Jul 2022 16:13:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1657667605; x=1689203605; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eoYteC6GODz7y0R2zobgy/O4IaLSlJbZw9u65ssKePw=; b=O6MYWYvADvSqz1DVZ2k0XYf1GOD8mr3xKn18W+6iLwyHsjOzk4++6HTI Dv+K0VSiQCdD2nbsXnR4oWu62aMQoa8QU/nXLSDPm5IxohS98t4kTckwQ 0DWhbtX4B1pAZwbPiMTx/ncC7Kx+6wF50K9Nwen6a6eqGUSV6EpEZXCYu GSx3df15Tb/11v+ad0L/qNnvUnaqzL5lO7CdRrmQWQtYxXuH38OQZdoWO 0LSc/vi0SG9zXB1xkxoBViZyV4goApSxKtz+RYyDGdjMFW0fUXQT9Gbwb TLEOosjiF+ssa6Hu7KxPXm0S9JkZrfFbzCEAZKZl94xnaHShr1IIa/7QF w==; X-IronPort-AV: E=McAfee;i="6400,9594,10406"; a="283818833" X-IronPort-AV: E=Sophos;i="5.92,266,1650956400"; d="scan'208";a="283818833" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2022 16:13:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,266,1650956400"; d="scan'208";a="599542507" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga007.fm.intel.com with ESMTP; 12 Jul 2022 16:13:21 -0700 Received: by black.fi.intel.com (Postfix, from userid 1000) id B877BD9; Wed, 13 Jul 2022 02:13:29 +0300 (EEST) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv5 01/13] x86/mm: Fix CR3_ADDR_MASK Date: Wed, 13 Jul 2022 02:13:16 +0300 Message-Id: <20220712231328.5294-2-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220712231328.5294-1-kirill.shutemov@linux.intel.com> References: <20220712231328.5294-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The mask must not include bits above physical address mask. These bits are reserved and can be used for other things. Bits 61 and 62 are used for Linear Address Masking. Signed-off-by: Kirill A. Shutemov Reviewed-by: Rick Edgecombe Reviewed-by: Alexander Potapenko Tested-by: Alexander Potapenko --- arch/x86/include/asm/processor-flags.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/processor-flags.h b/arch/x86/include/asm/= processor-flags.h index 02c2cbda4a74..a7f3d9100adb 100644 --- a/arch/x86/include/asm/processor-flags.h +++ b/arch/x86/include/asm/processor-flags.h @@ -35,7 +35,7 @@ */ #ifdef CONFIG_X86_64 /* Mask off the address space ID and SME encryption bits. */ -#define CR3_ADDR_MASK __sme_clr(0x7FFFFFFFFFFFF000ull) +#define CR3_ADDR_MASK __sme_clr(PHYSICAL_PAGE_MASK) #define CR3_PCID_MASK 0xFFFull #define CR3_NOFLUSH BIT_ULL(63) =20 --=20 2.35.1