From nobody Sat Sep 21 23:10:50 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F4D9C43334 for ; Tue, 12 Jul 2022 11:41:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232719AbiGLLlL (ORCPT ); Tue, 12 Jul 2022 07:41:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232548AbiGLLk6 (ORCPT ); Tue, 12 Jul 2022 07:40:58 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 497F8AE3B5; Tue, 12 Jul 2022 04:40:57 -0700 (PDT) X-UUID: af65d2b188e04f13ab1e8d6c30e29316-20220712 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.8,REQID:0bc8c407-d7db-4082-be49-b95e5be60b50,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACT ION:release,TS:-5 X-CID-META: VersionHash:0f94e32,CLOUDID:ff2d46d7-5d6d-4eaf-a635-828a3ee48b7c,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: af65d2b188e04f13ab1e8d6c30e29316-20220712 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 757573389; Tue, 12 Jul 2022 19:40:53 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 12 Jul 2022 19:40:52 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Tue, 12 Jul 2022 19:40:52 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , Chen-Yu Tsai , Allen-KH Cheng Subject: [PATCH v3 5/5] arm64: dts: mt8192: Add dsi node Date: Tue, 12 Jul 2022 19:40:46 +0800 Message-ID: <20220712114046.15574-6-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220712114046.15574-1-allen-kh.cheng@mediatek.com> References: <20220712114046.15574-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add dsi node for mt8192 SoC. Signed-off-by: Allen-KH Cheng Reviewed-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 92478e57f16f..fcb4f87ad824 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -1345,6 +1345,25 @@ mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0xe000 0x1000>; }; =20 + dsi0: dsi@14010000 { + compatible =3D "mediatek,mt8183-dsi"; + reg =3D <0 0x14010000 0 0x1000>; + interrupts =3D ; + clocks =3D <&mmsys CLK_MM_DSI0>, + <&mmsys CLK_MM_DSI_DSI0>, + <&mipi_tx0>; + clock-names =3D "engine", "digital", "hs"; + phys =3D <&mipi_tx0>; + phy-names =3D "dphy"; + power-domains =3D <&spm MT8192_POWER_DOMAIN_DISP>; + resets =3D <&mmsys MT8192_MMSYS_SW0_RST_B_DISP_DSI0>; + status =3D "disabled"; + + port { + dsi_out: endpoint { }; + }; + }; + ovl_2l2: ovl@14014000 { compatible =3D "mediatek,mt8192-disp-ovl-2l"; reg =3D <0 0x14014000 0 0x1000>; --=20 2.18.0