From nobody Sat Apr 18 19:10:30 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02026C43334 for ; Mon, 11 Jul 2022 17:23:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230496AbiGKRXR (ORCPT ); Mon, 11 Jul 2022 13:23:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229744AbiGKRXH (ORCPT ); Mon, 11 Jul 2022 13:23:07 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A7F3B5508E; Mon, 11 Jul 2022 10:23:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1657560186; x=1689096186; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=2rufqAJIACVuFQz6JSoLzapJ7A7N9b8Dx9NSiS5xTSo=; b=cu7AIPf+ThNK9fzH9jVQ1CgIX36WFquSxoo0waCDNSsIGrhYlneG3DDF St0jEjBCco/BgXIRokgwKiXhYAH8hhzJSCYu1utVwOSCKoheZ9jfmwYR1 ebG8FB9k4hgKzkQXfG2q1E0fYnSie8bBodEl8JMYQrrIb5TXpOuWxflIq mSCv+TDgNKm9pR9RTi414xhVy9JnLxWLFYlpbTzsF0A+9EkX+QiINR5U+ GooAcbm7IGwzzC7ZNv9mLtDke5U0FSnUyUb+vZqKKxzXqtUapFjqVrdZ5 uDMotaQ1H+8gPsxgZ6KBQCXOmVBSZ//7zU8DkFbFAXHLgsjdRPUkfki+r g==; X-IronPort-AV: E=McAfee;i="6400,9594,10405"; a="267760981" X-IronPort-AV: E=Sophos;i="5.92,263,1650956400"; d="scan'208";a="267760981" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jul 2022 10:23:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,263,1650956400"; d="scan'208";a="921869735" Received: from chang-linux-3.sc.intel.com ([172.25.66.173]) by fmsmga005.fm.intel.com with ESMTP; 11 Jul 2022 10:23:06 -0700 From: "Chang S. Bae" To: dave.hansen@intel.com, len.brown@intel.com, tony.luck@intel.com, rafael.j.wysocki@intel.com, reinette.chatre@intel.com, dan.j.williams@intel.com Cc: bagasdotme@gmail.com, corbet@lwn.net, linux-doc@vger.kernel.org, linux-man@vger.kernel.org, linux-kernel@vger.kernel.org, chang.seok.bae@intel.com Subject: [PATCH v3 1/2] x86/arch_prctl: Add AMX feature numbers as ABI constants Date: Mon, 11 Jul 2022 10:13:46 -0700 Message-Id: <20220711171347.27309-2-chang.seok.bae@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220711171347.27309-1-chang.seok.bae@intel.com> References: <20220711171347.27309-1-chang.seok.bae@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" AMX state is dynamically enabled by the architecture-specific prctl(). Expose the XSTATE numbers as ABI constants. It will help applications as no more spec look-up is needed for these numbers. Signed-off-by: Chang S. Bae Cc: Tony Luck Cc: linux-kernel@vger.kernel.org --- Changes from v2: * Add as a new patch (Tony Luck). --- arch/x86/include/uapi/asm/prctl.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/include/uapi/asm/prctl.h b/arch/x86/include/uapi/asm/= prctl.h index 500b96e71f18..f298c778f856 100644 --- a/arch/x86/include/uapi/asm/prctl.h +++ b/arch/x86/include/uapi/asm/prctl.h @@ -16,6 +16,9 @@ #define ARCH_GET_XCOMP_GUEST_PERM 0x1024 #define ARCH_REQ_XCOMP_GUEST_PERM 0x1025 =20 +#define ARCH_XCOMP_TILECFG 17 +#define ARCH_XCOMP_TILEDATA 18 + #define ARCH_MAP_VDSO_X32 0x2001 #define ARCH_MAP_VDSO_32 0x2002 #define ARCH_MAP_VDSO_64 0x2003 --=20 2.17.1 From nobody Sat Apr 18 19:10:30 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54766C43334 for ; Mon, 11 Jul 2022 17:23:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230527AbiGKRXO (ORCPT ); Mon, 11 Jul 2022 13:23:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230206AbiGKRXJ (ORCPT ); Mon, 11 Jul 2022 13:23:09 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 599C25A467; Mon, 11 Jul 2022 10:23:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1657560187; x=1689096187; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=9Y6rHoNB4HgyDF/8RzDJ5psF166vtx/mMEFKg807sIU=; b=Evnzx8ftSgJeK0emhsp8BG0sNmFaFXOhBE747CNkuClxCZQu45PYM0YF EaEwzOBVOujpK6qxnkzibBUkoqd1xkQP6/ReCEVv4xwF4gqTOOvFdVqFj 3k7QgJwPdSaAuC71FmtvtKmCJXGT2LcxQjUcYO4WqFKVH+UAQqZNxohRr q/ty7DGl+E8m8lmSwnyF57D9RbvCo8XiF94LIE/F4d5pxcqivk0gQj+DV c9fxHiLMOkAdHIBYFG0y26bZJ11UeZixRXt+LlVHovMGPpm3sdSUInmXO +Rxn9BWQAPeIb1WZwg2iU8zi9lXjK9ENkkxHve7pXXHoj9bqBZ2jNEOeg g==; X-IronPort-AV: E=McAfee;i="6400,9594,10405"; a="267760986" X-IronPort-AV: E=Sophos;i="5.92,263,1650956400"; d="scan'208";a="267760986" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jul 2022 10:23:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,263,1650956400"; d="scan'208";a="921869742" Received: from chang-linux-3.sc.intel.com ([172.25.66.173]) by fmsmga005.fm.intel.com with ESMTP; 11 Jul 2022 10:23:06 -0700 From: "Chang S. Bae" To: dave.hansen@intel.com, len.brown@intel.com, tony.luck@intel.com, rafael.j.wysocki@intel.com, reinette.chatre@intel.com, dan.j.williams@intel.com Cc: bagasdotme@gmail.com, corbet@lwn.net, linux-doc@vger.kernel.org, linux-man@vger.kernel.org, linux-kernel@vger.kernel.org, chang.seok.bae@intel.com Subject: [PATCH v3 2/2] Documentation/x86: Add the AMX enabling example Date: Mon, 11 Jul 2022 10:13:47 -0700 Message-Id: <20220711171347.27309-3-chang.seok.bae@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220711171347.27309-1-chang.seok.bae@intel.com> References: <20220711171347.27309-1-chang.seok.bae@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Explain steps to enable the dynamic feature with a code example. Signed-off-by: Chang S. Bae Reviewed-by: Thiago Macieira Cc: Dave Hansen Cc: Bagas Sanjaya Cc: linux-doc@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- Changes from v1: * Update the description without mentioning CPUID & XGETBV (Dave Hansen). Changes from v2: * Massage sentences (Bagas Sanjaya). * Adjust the example with the (future) prctl.h. --- Documentation/x86/xstate.rst | 55 ++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/Documentation/x86/xstate.rst b/Documentation/x86/xstate.rst index 5cec7fb558d6..dbe7ca854d2a 100644 --- a/Documentation/x86/xstate.rst +++ b/Documentation/x86/xstate.rst @@ -64,6 +64,61 @@ the handler allocates a larger xstate buffer for the tas= k so the large state can be context switched. In the unlikely cases that the allocation fails, the kernel sends SIGSEGV. =20 +AMX TILE_DATA enabling example +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Below is the example of how userspace applications enable +TILE_DATA dynamically: + + 1. The application first needs to query the kernel for AMX + support:: + + #include + #include + #include + #include + + #ifndef ARCH_GET_XCOMP_SUPP + #define ARCH_GET_XCOMP_SUPP 0x1021 + #endif + + #ifndef ARCH_XCOMP_TILECFG + #define ARCH_XCOMP_TILECFG 17 + #endif + + #ifndef ARCH_XCOMP_TILEDATA + #define ARCH_XCOMP_TILEDATA 18 + #endif + + #define MASK_XCOMP_TILE ((1 << ARCH_XCOMP_TILECFG) | \ + (1 << ARCH_XCOMP_TILEDATA)) + + unsigned long features; + long rc; + + ... + + rc =3D syscall(SYS_arch_prctl, ARCH_GET_XCOMP_SUPP, &features); + + if (!rc && (features & MASK_XCOMP_TILE) =3D=3D MASK_XCOMP_TILE) + printf("AMX is available.\n"); + + 2. After that, determining support for AMX, an application must + explicitly ask permission to use it:: + + #ifndef ARCH_REQ_XCOMP_PERM + #define ARCH_REQ_XCOMP_PERM 0x1023 + #endif + + ... + + rc =3D syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_PERM, ARCH_XCOMP_TIL= EDATA); + + if (!rc) + printf("AMX is ready for use.\n"); + +Note this example does not include the sigaltstack preparation. + Dynamic features in signal frames --------------------------------- =20 --=20 2.17.1