From nobody Sat Sep 21 22:56:05 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD283C433EF for ; Mon, 11 Jul 2022 12:33:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231181AbiGKMdF (ORCPT ); Mon, 11 Jul 2022 08:33:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230433AbiGKMc7 (ORCPT ); Mon, 11 Jul 2022 08:32:59 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 916AD4F694; Mon, 11 Jul 2022 05:32:57 -0700 (PDT) X-UUID: 5b01571261c24113aeafd21f885a98fc-20220711 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.8,REQID:4532ad05-cafc-4bde-a471-d07ac892a508,OB:10,L OB:20,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham,A CTION:release,TS:100 X-CID-INFO: VERSION:1.1.8,REQID:4532ad05-cafc-4bde-a471-d07ac892a508,OB:10,LOB :20,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D,A CTION:quarantine,TS:100 X-CID-META: VersionHash:0f94e32,CLOUDID:12071b87-57f0-47ca-ba27-fe8c57fbf305,C OID:a5aafa6e5b15,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:1,File:nil,QS:nil,BEC:nil,COL:0 X-UUID: 5b01571261c24113aeafd21f885a98fc-20220711 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 719867152; Mon, 11 Jul 2022 20:32:51 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Mon, 11 Jul 2022 20:32:50 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Mon, 11 Jul 2022 20:32:50 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Chun-Kuang Hu , Philipp Zabel CC: , , , , , Allen-KH Cheng , Xiandong Wang Subject: [PATCH v2 1/2] dt-bindings: soc: mediatek: add mdp3 mutex support for mt8186 Date: Mon, 11 Jul 2022 20:32:46 +0800 Message-ID: <20220711123247.15807-2-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220711123247.15807-1-allen-kh.cheng@mediatek.com> References: <20220711123247.15807-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add mdp3 mutex compatible for mt8186 SoC. Signed-off-by: Allen-KH Cheng Signed-off-by: Xiandong Wang Acked-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/soc/mediatek/mediatek,mutex.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.= yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml index 627dcc3e8b32..234fa5dc07c2 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml @@ -30,6 +30,7 @@ properties: - mediatek,mt8173-disp-mutex - mediatek,mt8183-disp-mutex - mediatek,mt8186-disp-mutex + - mediatek,mt8186-mdp3-mutex - mediatek,mt8192-disp-mutex - mediatek,mt8195-disp-mutex =20 --=20 2.18.0 From nobody Sat Sep 21 22:56:05 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B0E94C433EF for ; Mon, 11 Jul 2022 12:33:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231299AbiGKMdI (ORCPT ); Mon, 11 Jul 2022 08:33:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56996 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230318AbiGKMdA (ORCPT ); Mon, 11 Jul 2022 08:33:00 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B909C4F699; Mon, 11 Jul 2022 05:32:58 -0700 (PDT) X-UUID: 9f6258c8d95442e7893ccb50efb7e030-20220711 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.8,REQID:9e038c5b-8739-41f5-8d70-4355348e7493,OB:0,LO B:0,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham,ACT ION:release,TS:100 X-CID-INFO: VERSION:1.1.8,REQID:9e038c5b-8739-41f5-8d70-4355348e7493,OB:0,LOB: 0,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D,ACT ION:quarantine,TS:100 X-CID-META: VersionHash:0f94e32,CLOUDID:838bf863-0b3f-4b2c-b3a6-ed5c044366a0,C OID:2b00e2a1a3ba,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:1,File:nil,QS:nil,BEC:nil,COL:0 X-UUID: 9f6258c8d95442e7893ccb50efb7e030-20220711 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1997603194; Mon, 11 Jul 2022 20:32:51 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Mon, 11 Jul 2022 20:32:50 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Mon, 11 Jul 2022 20:32:50 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Chun-Kuang Hu , Philipp Zabel CC: , , , , , Allen-KH Cheng , Xiandong Wang Subject: [PATCH v2 2/2] soc: mediatek: mutex: add mt8186 mutex mod settings for mdp3 Date: Mon, 11 Jul 2022 20:32:47 +0800 Message-ID: <20220711123247.15807-3-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220711123247.15807-1-allen-kh.cheng@mediatek.com> References: <20220711123247.15807-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch adds mt8186 mutex mod settings for mdp3. Signed-off-by: Allen-KH Cheng Signed-off-by: Xiandong Wang Reviewed-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mtk-mutex.c | 28 ++++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-mutex.h | 2 ++ 2 files changed, 30 insertions(+) diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mu= tex.c index 5ea43de4e410..f95100d4de73 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -91,6 +91,15 @@ #define MT8183_MUTEX_MOD_MDP_AAL0 23 #define MT8183_MUTEX_MOD_MDP_CCORR0 24 =20 +#define MT8186_MUTEX_MOD_MDP_RDMA0 0 +#define MT8186_MUTEX_MOD_MDP_AAL0 2 +#define MT8186_MUTEX_MOD_MDP_HDR0 4 +#define MT8186_MUTEX_MOD_MDP_RSZ0 5 +#define MT8186_MUTEX_MOD_MDP_RSZ1 6 +#define MT8186_MUTEX_MOD_MDP_WROT0 7 +#define MT8186_MUTEX_MOD_MDP_TDSHP0 9 +#define MT8186_MUTEX_MOD_MDP_COLOR0 14 + #define MT8173_MUTEX_MOD_DISP_OVL0 11 #define MT8173_MUTEX_MOD_DISP_OVL1 12 #define MT8173_MUTEX_MOD_DISP_RDMA0 13 @@ -324,6 +333,17 @@ static const unsigned int mt8186_mutex_mod[DDP_COMPONE= NT_ID_MAX] =3D { [DDP_COMPONENT_RDMA1] =3D MT8186_MUTEX_MOD_DISP_RDMA1, }; =20 +static const unsigned int mt8186_mdp_mutex_table_mod[MUTEX_MOD_IDX_MAX] = =3D { + [MUTEX_MOD_IDX_MDP_RDMA0] =3D MT8186_MUTEX_MOD_MDP_RDMA0, + [MUTEX_MOD_IDX_MDP_RSZ0] =3D MT8186_MUTEX_MOD_MDP_RSZ0, + [MUTEX_MOD_IDX_MDP_RSZ1] =3D MT8186_MUTEX_MOD_MDP_RSZ1, + [MUTEX_MOD_IDX_MDP_TDSHP0] =3D MT8186_MUTEX_MOD_MDP_TDSHP0, + [MUTEX_MOD_IDX_MDP_WROT0] =3D MT8186_MUTEX_MOD_MDP_WROT0, + [MUTEX_MOD_IDX_MDP_HDR0] =3D MT8186_MUTEX_MOD_MDP_HDR0, + [MUTEX_MOD_IDX_MDP_AAL0] =3D MT8186_MUTEX_MOD_MDP_AAL0, + [MUTEX_MOD_IDX_MDP_COLOR0] =3D MT8186_MUTEX_MOD_MDP_COLOR0, +}; + static const unsigned int mt8192_mutex_mod[DDP_COMPONENT_ID_MAX] =3D { [DDP_COMPONENT_AAL0] =3D MT8192_MUTEX_MOD_DISP_AAL0, [DDP_COMPONENT_CCORR] =3D MT8192_MUTEX_MOD_DISP_CCORR0, @@ -458,6 +478,12 @@ static const struct mtk_mutex_data mt8183_mutex_driver= _data =3D { .no_clk =3D true, }; =20 +static const struct mtk_mutex_data mt8186_mdp_mutex_driver_data =3D { + .mutex_mod_reg =3D MT8183_MUTEX0_MOD0, + .mutex_sof_reg =3D MT8183_MUTEX0_SOF0, + .mutex_table_mod =3D mt8186_mdp_mutex_table_mod, +}; + static const struct mtk_mutex_data mt8186_mutex_driver_data =3D { .mutex_mod =3D mt8186_mutex_mod, .mutex_sof =3D mt8186_mutex_sof, @@ -810,6 +836,8 @@ static const struct of_device_id mutex_driver_dt_match[= ] =3D { .data =3D &mt8183_mutex_driver_data}, { .compatible =3D "mediatek,mt8186-disp-mutex", .data =3D &mt8186_mutex_driver_data}, + { .compatible =3D "mediatek,mt8186-mdp3-mutex", + .data =3D &mt8186_mdp_mutex_driver_data}, { .compatible =3D "mediatek,mt8192-disp-mutex", .data =3D &mt8192_mutex_driver_data}, { .compatible =3D "mediatek,mt8195-disp-mutex", diff --git a/include/linux/soc/mediatek/mtk-mutex.h b/include/linux/soc/med= iatek/mtk-mutex.h index a0f4f51a3b45..b335c2837cd8 100644 --- a/include/linux/soc/mediatek/mtk-mutex.h +++ b/include/linux/soc/mediatek/mtk-mutex.h @@ -20,6 +20,8 @@ enum mtk_mutex_mod_index { MUTEX_MOD_IDX_MDP_WDMA, MUTEX_MOD_IDX_MDP_AAL0, MUTEX_MOD_IDX_MDP_CCORR0, + MUTEX_MOD_IDX_MDP_HDR0, + MUTEX_MOD_IDX_MDP_COLOR0, =20 MUTEX_MOD_IDX_MAX /* ALWAYS keep at the end */ }; --=20 2.18.0