From nobody Sat Sep 21 23:19:19 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59F5EC43334 for ; Mon, 11 Jul 2022 12:25:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231658AbiGKMZN (ORCPT ); Mon, 11 Jul 2022 08:25:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230074AbiGKMZK (ORCPT ); Mon, 11 Jul 2022 08:25:10 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DFF694505E; Mon, 11 Jul 2022 05:25:09 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id E5AE366019FD; Mon, 11 Jul 2022 13:25:07 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1657542308; bh=ubXAnOjRMe3Pb/tsTo7f8wxsG7B1OS2/1BE23DQJYdk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VYX3Z6lPDzkT6PllDgjFsxECGU8NYPw3L64OVYrYZQaG9AW8r13syjK00gbuL+9dG TZhKggimY+DoNIThs2H7+m5pnWDAtN2q35kJ69TCqzIrlmsAgU1Y0CIqXLZBbFX8Gk NrzHDPwd3a7ic6m8Vq2LZ92G2oj3oqVru+iFn0OqCmLUYOQ4NnBrvFTXf7acTxwJRw EaNBpdqsj9U5lccdQ9rrjSSZox++vhD6FTfc6WvJyIarKb5lSOqA0c7W2UMw0yszOx VBGvJsmXqNAoQrZQAWkEA/Z/HUJ+D0qsfgRsL8/B2ApiYRhstf5Eapu7V2mJFM5EnA M82cFU/4tT8yA== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, chun-jie.chen@mediatek.com, weiyi.lu@mediatek.com, mbrugger@suse.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, nfraprado@collabora.com Subject: [PATCH 1/3] dt-bindings: power: mediatek: Document phandle to SCPSYS syscon node Date: Mon, 11 Jul 2022 14:25:01 +0200 Message-Id: <20220711122503.286743-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220711122503.286743-1-angelogioacchino.delregno@collabora.com> References: <20220711122503.286743-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a phandle to the syscon block providing access to SCPSYS registers: this allows us to avoid using simple-mfd for the SCPSYS node and nesting the System Power Manager node inside. Signed-off-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/power/mediatek,power-controller.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/power/mediatek,power-control= ler.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controlle= r.yaml index 135c6f722091..848fdff7c9d8 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -39,6 +39,11 @@ properties: '#size-cells': const: 0 =20 + syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon block providing access to SCPSYS registers + patternProperties: "^power-domain@[0-9a-f]+$": type: object --=20 2.35.1 From nobody Sat Sep 21 23:19:19 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1FF8C433EF for ; Mon, 11 Jul 2022 12:25:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231540AbiGKMZR (ORCPT ); Mon, 11 Jul 2022 08:25:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49404 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230425AbiGKMZL (ORCPT ); Mon, 11 Jul 2022 08:25:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7777E45F5D; Mon, 11 Jul 2022 05:25:10 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id ADF4366019FE; Mon, 11 Jul 2022 13:25:08 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1657542309; bh=WNj+Fngrs3bQ3s4zywv4THTLiM1Sc7weFg7rQrZYyA4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ceyCqKo7TRKXqpMJLLjVVVxkeX7NFgcmBVwiHVgHiBdWcrBW4wXbasuam2Zv3o1Gq Etiy5WNb/pI0J2BHtC9mAvQo/cSHGBdpmV3t6zR4UELoDyyo5Bn4GKVzCHcAD2u+V0 6w2dBWmD8VEM6WdDolQBqFiGgmxPIgUNiNPoTA6VkkCdI6TZbi5JviazImVZ7JCX7G IeOY9F692AZPeAhqbSGzEuzgeP185qP1hdaDmgaegDAN8MZ5M8j5MiwA/++YH6jDVy UxEj155zUjI9vKvxhe4Hw37V5WBTOUIr/ZzPvNsNkibx5JYwHb3EjpzZnIgW7HOkXU e5Fgt1Cg8qqQg== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, chun-jie.chen@mediatek.com, weiyi.lu@mediatek.com, mbrugger@suse.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, nfraprado@collabora.com Subject: [PATCH 2/3] dt-bindings: power: mediatek: Update example to use phandle to syscon Date: Mon, 11 Jul 2022 14:25:02 +0200 Message-Id: <20220711122503.286743-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220711122503.286743-1-angelogioacchino.delregno@collabora.com> References: <20220711122503.286743-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The preferred way of declaring this node is by using a phandle to syscon: update the example to reflect that. Signed-off-by: AngeloGioacchino Del Regno --- .../power/mediatek,power-controller.yaml | 125 +++++++++--------- 1 file changed, 63 insertions(+), 62 deletions(-) diff --git a/Documentation/devicetree/bindings/power/mediatek,power-control= ler.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controlle= r.yaml index 848fdff7c9d8..bed059e4401d 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -237,76 +237,77 @@ examples: scpsys: syscon@10006000 { compatible =3D "syscon", "simple-mfd"; reg =3D <0 0x10006000 0 0x1000>; + }; + }; =20 - spm: power-controller { - compatible =3D "mediatek,mt8173-power-controller"; + spm: power-controller { + compatible =3D "mediatek,mt8173-power-controller"; + #address-cells =3D <1>; + #size-cells =3D <0>; + #power-domain-cells =3D <1>; + syscon =3D <&scpsys>; + + /* power domains of the SoC */ + power-domain@MT8173_POWER_DOMAIN_VDEC { + reg =3D ; + clocks =3D <&topckgen CLK_TOP_MM_SEL>; + clock-names =3D "mm"; + #power-domain-cells =3D <0>; + }; + power-domain@MT8173_POWER_DOMAIN_VENC { + reg =3D ; + clocks =3D <&topckgen CLK_TOP_MM_SEL>, + <&topckgen CLK_TOP_VENC_SEL>; + clock-names =3D "mm", "venc"; + #power-domain-cells =3D <0>; + }; + power-domain@MT8173_POWER_DOMAIN_ISP { + reg =3D ; + clocks =3D <&topckgen CLK_TOP_MM_SEL>; + clock-names =3D "mm"; + #power-domain-cells =3D <0>; + }; + power-domain@MT8173_POWER_DOMAIN_MM { + reg =3D ; + clocks =3D <&topckgen CLK_TOP_MM_SEL>; + clock-names =3D "mm"; + #power-domain-cells =3D <0>; + mediatek,infracfg =3D <&infracfg>; + }; + power-domain@MT8173_POWER_DOMAIN_VENC_LT { + reg =3D ; + clocks =3D <&topckgen CLK_TOP_MM_SEL>, + <&topckgen CLK_TOP_VENC_LT_SEL>; + clock-names =3D "mm", "venclt"; + #power-domain-cells =3D <0>; + }; + power-domain@MT8173_POWER_DOMAIN_AUDIO { + reg =3D ; + #power-domain-cells =3D <0>; + }; + power-domain@MT8173_POWER_DOMAIN_USB { + reg =3D ; + #power-domain-cells =3D <0>; + }; + power-domain@MT8173_POWER_DOMAIN_MFG_ASYNC { + reg =3D ; + clocks =3D <&clk26m>; + clock-names =3D "mfg"; + #address-cells =3D <1>; + #size-cells =3D <0>; + #power-domain-cells =3D <1>; + + power-domain@MT8173_POWER_DOMAIN_MFG_2D { + reg =3D ; #address-cells =3D <1>; #size-cells =3D <0>; #power-domain-cells =3D <1>; =20 - /* power domains of the SoC */ - power-domain@MT8173_POWER_DOMAIN_VDEC { - reg =3D ; - clocks =3D <&topckgen CLK_TOP_MM_SEL>; - clock-names =3D "mm"; - #power-domain-cells =3D <0>; - }; - power-domain@MT8173_POWER_DOMAIN_VENC { - reg =3D ; - clocks =3D <&topckgen CLK_TOP_MM_SEL>, - <&topckgen CLK_TOP_VENC_SEL>; - clock-names =3D "mm", "venc"; - #power-domain-cells =3D <0>; - }; - power-domain@MT8173_POWER_DOMAIN_ISP { - reg =3D ; - clocks =3D <&topckgen CLK_TOP_MM_SEL>; - clock-names =3D "mm"; - #power-domain-cells =3D <0>; - }; - power-domain@MT8173_POWER_DOMAIN_MM { - reg =3D ; - clocks =3D <&topckgen CLK_TOP_MM_SEL>; - clock-names =3D "mm"; + power-domain@MT8173_POWER_DOMAIN_MFG { + reg =3D ; #power-domain-cells =3D <0>; mediatek,infracfg =3D <&infracfg>; }; - power-domain@MT8173_POWER_DOMAIN_VENC_LT { - reg =3D ; - clocks =3D <&topckgen CLK_TOP_MM_SEL>, - <&topckgen CLK_TOP_VENC_LT_SEL>; - clock-names =3D "mm", "venclt"; - #power-domain-cells =3D <0>; - }; - power-domain@MT8173_POWER_DOMAIN_AUDIO { - reg =3D ; - #power-domain-cells =3D <0>; - }; - power-domain@MT8173_POWER_DOMAIN_USB { - reg =3D ; - #power-domain-cells =3D <0>; - }; - power-domain@MT8173_POWER_DOMAIN_MFG_ASYNC { - reg =3D ; - clocks =3D <&clk26m>; - clock-names =3D "mfg"; - #address-cells =3D <1>; - #size-cells =3D <0>; - #power-domain-cells =3D <1>; - - power-domain@MT8173_POWER_DOMAIN_MFG_2D { - reg =3D ; - #address-cells =3D <1>; - #size-cells =3D <0>; - #power-domain-cells =3D <1>; - - power-domain@MT8173_POWER_DOMAIN_MFG { - reg =3D ; - #power-domain-cells =3D <0>; - mediatek,infracfg =3D <&infracfg>; - }; - }; - }; }; }; }; --=20 2.35.1 From nobody Sat Sep 21 23:19:19 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80299C433EF for ; Mon, 11 Jul 2022 12:25:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231681AbiGKMZT (ORCPT ); Mon, 11 Jul 2022 08:25:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229637AbiGKMZL (ORCPT ); Mon, 11 Jul 2022 08:25:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 416694505E; Mon, 11 Jul 2022 05:25:11 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 7589D6601A00; Mon, 11 Jul 2022 13:25:09 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1657542310; bh=exs3pbqQsoOqcfyKmAZDPS7dHDfSgn805ug/IQkbTTw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=J7Blw7mb+6iWeJXSpyTg5gsPCpZ/oX4nhA4AdPgZAyw+awSwz0ET4Ll4cPtJZpDIo Lv7oKYFzUH9IE4ju3x8FOMqVXoObiVHatljFjJZSRxl0NZjq7iQ1kU/TIyUXL90cNG HbzlewoWSCRBGTtqLlCAs+ysD0f8333Le6a97nMuvgIAaCL2zIW47oy9pqY+qH5e4L G8gg4OhCdmOvX1pcHsNcio6NEAvfX825BxFN2oGVuPnpJfcpzvbPUVU0NlzrE2UQtE Hk5elY06tC9y5w1tHfhrmLTcgojqTvqjre6uMuKKkmFPNgmrV+O06LApMeR+48V9nT 50JUVuRTaPIIw== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, chun-jie.chen@mediatek.com, weiyi.lu@mediatek.com, mbrugger@suse.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, nfraprado@collabora.com Subject: [PATCH 3/3] soc: mediatek: pm-domains: Grab SCPSYS registers from phandle to syscon Date: Mon, 11 Jul 2022 14:25:03 +0200 Message-Id: <20220711122503.286743-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220711122503.286743-1-angelogioacchino.delregno@collabora.com> References: <20220711122503.286743-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Instead of requiring nesting of the power-controller inside of a "syscon", "simple-mfd" node, look for a phandle to SCPSYS in the "syscon" property of the power controller node. Compatibility with older devicetrees is retained by falling back to looking for a parent node if no syscon phandle is found. Signed-off-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mtk-pm-domains.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/m= tk-pm-domains.c index a3dae391a38a..c5a1c766cd50 100644 --- a/drivers/soc/mediatek/mtk-pm-domains.c +++ b/drivers/soc/mediatek/mtk-pm-domains.c @@ -590,8 +590,7 @@ static int scpsys_probe(struct platform_device *pdev) struct device *dev =3D &pdev->dev; struct device_node *np =3D dev->of_node; const struct scpsys_soc_data *soc; - struct device_node *node; - struct device *parent; + struct device_node *node, *syscon; struct scpsys *scpsys; int ret; =20 @@ -611,13 +610,16 @@ static int scpsys_probe(struct platform_device *pdev) scpsys->pd_data.domains =3D scpsys->domains; scpsys->pd_data.num_domains =3D soc->num_domains; =20 - parent =3D dev->parent; - if (!parent) { - dev_err(dev, "no parent for syscon devices\n"); - return -ENODEV; + syscon =3D of_parse_phandle(dev->of_node, "syscon", 0); + if (!syscon) { + if (!dev->parent) + return -ENODEV; + scpsys->base =3D syscon_node_to_regmap(dev->parent->of_node); + } else { + scpsys->base =3D syscon_node_to_regmap(syscon); + of_node_put(syscon); } =20 - scpsys->base =3D syscon_node_to_regmap(parent->of_node); if (IS_ERR(scpsys->base)) { dev_err(dev, "no regmap available\n"); return PTR_ERR(scpsys->base); --=20 2.35.1