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From: MollySophia <mollysophia379@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
        Sam Ravnborg <sam@ravnborg.org>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>, linux-kernel@vger.kernel.org,
        dri-devel@lists.freedesktop.org
Cc: MollySophia <mollysophia379@gmail.com>
Subject: [PATCH] drm: panel: Add novatek nt35596s panel driver
Date: Thu,  7 Jul 2022 11:16:23 +0800
Message-Id: <20220707031623.220073-1-mollysophia379@gmail.com>
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Content-Type: text/plain; charset="utf-8"

Novatek NT35596s is a generic DSI IC that drives command and video mode
panels. Add the driver for it. Currently add support for the LCD panel
from JDI connected with this IC, as found on Xiaomi Mi Mix2s phones.

Signed-off-by: MollySophia <mollysophia379@gmail.com>
---
 drivers/gpu/drm/panel/Kconfig                 |   9 +
 drivers/gpu/drm/panel/Makefile                |   1 +
 .../gpu/drm/panel/panel-jdi-fhd-nt35596s.c    | 464 ++++++++++++++++++
 3 files changed, 474 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-jdi-fhd-nt35596s.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index d5176f75248f..a54389c107bc 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -231,6 +231,15 @@ config DRM_PANEL_JDI_R63452
 	  Say Y here if you want to enable support for the JDI R63452
 	  DSI command mode panel as found in Xiaomi Mi 5 Devices.
=20
+config DRM_PANEL_JDI_NT35596S
+	tristate "JDI NT35596S Full HD DSI panel"
+	depends on OF
+	depends on DRM_MIPI_DSI
+	depends on BACKLIGHT_CLASS_DEVICE
+	help
+	  Say Y here if you want to enable support for the JDI NT35596S
+	  DSI video mode panel as found in Xiaomi Mi Mix2s Devices.
+
 config DRM_PANEL_KHADAS_TS050
 	tristate "Khadas TS050 panel"
 	depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index ef89dada021d..40db5e6dcbf5 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) +=3D panel-innolu=
x-p079zca.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_TD4328) +=3D panel-innolux-td4328.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) +=3D panel-jdi-lt070me05000.o
 obj-$(CONFIG_DRM_PANEL_JDI_R63452) +=3D panel-jdi-fhd-r63452.o
+obj-$(CONFIG_DRM_PANEL_JDI_NT35596S) +=3D panel-jdi-fhd-nt35596s.o
 obj-$(CONFIG_DRM_PANEL_KHADAS_TS050) +=3D panel-khadas-ts050.o
 obj-$(CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04) +=3D panel-kingdisplay-kd097d=
04.o
 obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W) +=3D panel-leadtek-ltk050h314=
6w.o
diff --git a/drivers/gpu/drm/panel/panel-jdi-fhd-nt35596s.c b/drivers/gpu/d=
rm/panel/panel-jdi-fhd-nt35596s.c
new file mode 100644
index 000000000000..0793bcd872e2
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-jdi-fhd-nt35596s.c
@@ -0,0 +1,464 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2022 Molly Sophia <mollysophia379@gmail.com>
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/swab.h>
+#include <linux/backlight.h>
+
+#include <video/mipi_display.h>
+
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+
+struct nt35596s_panel_cmd {
+	const char data[2];
+};
+
+static const char *const nt35596s_regulator_names[] =3D {
+	"vddio",
+	"vddpos",
+	"vddneg",
+};
+
+static const unsigned long nt35596s_regulator_enable_loads[] =3D { 62000, =
100000,
+								 100000 };
+
+struct nt35596s_panel_desc {
+	const struct drm_display_mode *display_mode;
+	const char *panel_name;
+
+	unsigned int width_mm;
+	unsigned int height_mm;
+
+	unsigned long mode_flags;
+	enum mipi_dsi_pixel_format format;
+	unsigned int lanes;
+
+	unsigned int num_on_cmds;
+	const struct nt35596s_panel_cmd *on_cmds;
+};
+
+struct nt35596s_panel {
+	struct drm_panel panel;
+	struct mipi_dsi_device *dsi;
+	const struct nt35596s_panel_desc *desc;
+
+	struct regulator_bulk_data
+		supplies[ARRAY_SIZE(nt35596s_regulator_names)];
+
+	struct gpio_desc *reset_gpio;
+	bool prepared;
+};
+
+static inline struct nt35596s_panel *to_nt35596s_panel(struct drm_panel *p=
anel)
+{
+	return container_of(panel, struct nt35596s_panel, panel);
+}
+
+static int nt35596s_send_cmds(struct drm_panel *panel,
+			      const struct nt35596s_panel_cmd *cmds, int num)
+{
+	struct nt35596s_panel *pinfo =3D to_nt35596s_panel(panel);
+	unsigned int i;
+	int err;
+
+	for (i =3D 0; i < num; i++) {
+		const struct nt35596s_panel_cmd *cmd =3D &cmds[i];
+
+		err =3D mipi_dsi_dcs_write(pinfo->dsi, cmd->data[0],
+					 cmd->data + 1, 1);
+
+		if (err < 0)
+			return err;
+	}
+
+	return 0;
+}
+
+static int nt35596s_panel_power_off(struct drm_panel *panel)
+{
+	struct nt35596s_panel *pinfo =3D to_nt35596s_panel(panel);
+	int ret =3D 0;
+
+	gpiod_set_value(pinfo->reset_gpio, 1);
+
+	ret =3D regulator_bulk_disable(ARRAY_SIZE(pinfo->supplies),
+				     pinfo->supplies);
+	if (ret)
+		dev_err(panel->dev, "regulator_bulk_disable failed %d\n", ret);
+
+	return ret;
+}
+
+static int nt35596s_panel_unprepare(struct drm_panel *panel)
+{
+	struct nt35596s_panel *pinfo =3D to_nt35596s_panel(panel);
+	int ret;
+
+	if (!pinfo->prepared)
+		return 0;
+
+	ret =3D mipi_dsi_dcs_set_display_off(pinfo->dsi);
+	if (ret < 0)
+		dev_err(panel->dev, "set_display_off cmd failed ret =3D %d\n",
+			ret);
+
+	/* 120ms delay required here as per DCS spec */
+	msleep(120);
+
+	ret =3D mipi_dsi_dcs_enter_sleep_mode(pinfo->dsi);
+	if (ret < 0)
+		dev_err(panel->dev, "enter_sleep cmd failed ret =3D %d\n", ret);
+
+	/* 0x46 =3D 70ms delay */
+	msleep(70);
+
+	ret =3D nt35596s_panel_power_off(panel);
+	if (ret < 0)
+		dev_err(panel->dev, "power_off failed ret =3D %d\n", ret);
+
+	pinfo->prepared =3D false;
+
+	return ret;
+}
+
+static int nt35596s_panel_power_on(struct nt35596s_panel *pinfo)
+{
+	int ret;
+
+	ret =3D regulator_bulk_enable(ARRAY_SIZE(pinfo->supplies),
+				    pinfo->supplies);
+	if (ret < 0)
+		return ret;
+
+	gpiod_set_value(pinfo->reset_gpio, 1);
+	msleep(200);
+	gpiod_set_value(pinfo->reset_gpio, 0);
+	msleep(200);
+
+	return 0;
+}
+
+static int nt35596s_panel_prepare(struct drm_panel *panel)
+{
+	struct nt35596s_panel *pinfo =3D to_nt35596s_panel(panel);
+	int err;
+
+	if (pinfo->prepared)
+		return 0;
+
+	err =3D nt35596s_panel_power_on(pinfo);
+	if (err < 0)
+		goto poweroff;
+
+	err =3D nt35596s_send_cmds(panel, pinfo->desc->on_cmds,
+				 pinfo->desc->num_on_cmds);
+
+	if (err < 0) {
+		dev_err(panel->dev, "failed to send DCS Init Code: %d\n", err);
+		goto poweroff;
+	}
+
+	err =3D mipi_dsi_dcs_exit_sleep_mode(pinfo->dsi);
+	if (err < 0) {
+		dev_err(panel->dev, "failed to exit sleep mode: %d\n", err);
+		goto poweroff;
+	}
+
+	/* 0x46 =3D 70 ms delay */
+	msleep(70);
+
+	err =3D mipi_dsi_dcs_set_display_on(pinfo->dsi);
+	if (err < 0) {
+		dev_err(panel->dev, "failed to Set Display ON: %d\n", err);
+		goto poweroff;
+	}
+
+	msleep(120);
+
+	pinfo->prepared =3D true;
+
+	return 0;
+
+poweroff:
+	gpiod_set_value(pinfo->reset_gpio, 0);
+	return err;
+}
+
+static int nt35596s_panel_get_modes(struct drm_panel *panel,
+				    struct drm_connector *connector)
+{
+	struct nt35596s_panel *pinfo =3D to_nt35596s_panel(panel);
+	const struct drm_display_mode *m =3D pinfo->desc->display_mode;
+	struct drm_display_mode *mode;
+
+	mode =3D drm_mode_duplicate(connector->dev, m);
+	if (!mode) {
+		dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
+			m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
+		return -ENOMEM;
+	}
+
+	connector->display_info.width_mm =3D pinfo->desc->width_mm;
+	connector->display_info.height_mm =3D pinfo->desc->height_mm;
+
+	drm_mode_set_name(mode);
+	drm_mode_probed_add(connector, mode);
+
+	return 1;
+}
+
+static const struct drm_panel_funcs panel_funcs =3D {
+	.prepare =3D nt35596s_panel_prepare,
+	.unprepare =3D nt35596s_panel_unprepare,
+	.get_modes =3D nt35596s_panel_get_modes,
+};
+
+static const struct nt35596s_panel_cmd jdi_fhd_video_on_cmds[] =3D {
+	{ .data =3D { 0xff, 0x24 } }, { .data =3D { 0x9d, 0x34 } },
+	{ .data =3D { 0xfb, 0x01 } }, { .data =3D { 0xc4, 0x25 } },
+	{ .data =3D { 0xd1, 0x08 } }, { .data =3D { 0xd2, 0x84 } },
+	{ .data =3D { 0xff, 0x26 } }, { .data =3D { 0xfb, 0x01 } },
+	{ .data =3D { 0x03, 0x1c } }, { .data =3D { 0x3b, 0x08 } },
+	{ .data =3D { 0x6b, 0x08 } }, { .data =3D { 0x97, 0x08 } },
+	{ .data =3D { 0xc5, 0x08 } }, { .data =3D { 0xfb, 0x01 } },
+	{ .data =3D { 0xff, 0x23 } }, { .data =3D { 0xfb, 0x01 } },
+	{ .data =3D { 0x01, 0x84 } }, { .data =3D { 0x05, 0x2d } },
+	{ .data =3D { 0x06, 0x00 } }, { .data =3D { 0x33, 0x07 } },
+	{ .data =3D { 0x21, 0xee } }, { .data =3D { 0x22, 0xed } },
+	{ .data =3D { 0x23, 0xea } }, { .data =3D { 0x24, 0xe8 } },
+	{ .data =3D { 0x25, 0xe5 } }, { .data =3D { 0x26, 0xe2 } },
+	{ .data =3D { 0x27, 0xde } }, { .data =3D { 0x28, 0xbb } },
+	{ .data =3D { 0x29, 0x87 } }, { .data =3D { 0x2a, 0x77 } },
+	{ .data =3D { 0x32, 0x0c } }, { .data =3D { 0x13, 0x3f } },
+	{ .data =3D { 0x14, 0x34 } }, { .data =3D { 0x15, 0x2a } },
+	{ .data =3D { 0x16, 0x25 } }, { .data =3D { 0x17, 0x9d } },
+	{ .data =3D { 0x18, 0x9a } }, { .data =3D { 0x19, 0x97 } },
+	{ .data =3D { 0x1a, 0x94 } }, { .data =3D { 0x1b, 0x91 } },
+	{ .data =3D { 0x1c, 0x8e } }, { .data =3D { 0x1d, 0x8b } },
+	{ .data =3D { 0x1e, 0x89 } }, { .data =3D { 0x1f, 0x86 } },
+	{ .data =3D { 0x20, 0x83 } }, { .data =3D { 0xff, 0x22 } },
+	{ .data =3D { 0x00, 0x0a } }, { .data =3D { 0x01, 0x43 } },
+	{ .data =3D { 0x02, 0x5b } }, { .data =3D { 0x03, 0x6a } },
+	{ .data =3D { 0x04, 0x7a } }, { .data =3D { 0x05, 0x82 } },
+	{ .data =3D { 0x06, 0x85 } }, { .data =3D { 0x07, 0x80 } },
+	{ .data =3D { 0x08, 0x7c } }, { .data =3D { 0x09, 0x7c } },
+	{ .data =3D { 0x0a, 0x74 } }, { .data =3D { 0x0b, 0x71 } },
+	{ .data =3D { 0x0c, 0x6e } }, { .data =3D { 0x0d, 0x68 } },
+	{ .data =3D { 0x0e, 0x65 } }, { .data =3D { 0x0f, 0x5c } },
+	{ .data =3D { 0x10, 0x32 } }, { .data =3D { 0x11, 0x18 } },
+	{ .data =3D { 0x12, 0x00 } }, { .data =3D { 0x13, 0x00 } },
+	{ .data =3D { 0x1a, 0x00 } }, { .data =3D { 0x1b, 0x00 } },
+	{ .data =3D { 0x1c, 0x00 } }, { .data =3D { 0x1d, 0x00 } },
+	{ .data =3D { 0x1e, 0x00 } }, { .data =3D { 0x1f, 0x00 } },
+	{ .data =3D { 0x20, 0x00 } }, { .data =3D { 0x21, 0x00 } },
+	{ .data =3D { 0x22, 0x00 } }, { .data =3D { 0x23, 0x00 } },
+	{ .data =3D { 0x24, 0x00 } }, { .data =3D { 0x25, 0x00 } },
+	{ .data =3D { 0x26, 0x00 } }, { .data =3D { 0x27, 0x00 } },
+	{ .data =3D { 0x28, 0x00 } }, { .data =3D { 0x29, 0x00 } },
+	{ .data =3D { 0x2a, 0x00 } }, { .data =3D { 0x2b, 0x00 } },
+	{ .data =3D { 0x2f, 0x00 } }, { .data =3D { 0x30, 0x00 } },
+	{ .data =3D { 0x31, 0x00 } }, { .data =3D { 0x32, 0x0c } },
+	{ .data =3D { 0x33, 0x0c } }, { .data =3D { 0x34, 0x0c } },
+	{ .data =3D { 0x35, 0x0b } }, { .data =3D { 0x36, 0x09 } },
+	{ .data =3D { 0x37, 0x09 } }, { .data =3D { 0x38, 0x08 } },
+	{ .data =3D { 0x39, 0x05 } }, { .data =3D { 0x3a, 0x03 } },
+	{ .data =3D { 0x3b, 0x00 } }, { .data =3D { 0x3f, 0x00 } },
+	{ .data =3D { 0x40, 0x00 } }, { .data =3D { 0x41, 0x00 } },
+	{ .data =3D { 0x42, 0x00 } }, { .data =3D { 0x43, 0x00 } },
+	{ .data =3D { 0x44, 0x00 } }, { .data =3D { 0x45, 0x00 } },
+	{ .data =3D { 0x46, 0x00 } }, { .data =3D { 0x47, 0x00 } },
+	{ .data =3D { 0x48, 0x00 } }, { .data =3D { 0x49, 0x03 } },
+	{ .data =3D { 0x4a, 0x06 } }, { .data =3D { 0x4b, 0x07 } },
+	{ .data =3D { 0x4c, 0x07 } }, { .data =3D { 0x53, 0x01 } },
+	{ .data =3D { 0x54, 0x01 } }, { .data =3D { 0x55, 0x89 } },
+	{ .data =3D { 0x56, 0x00 } }, { .data =3D { 0x58, 0x00 } },
+	{ .data =3D { 0x68, 0x00 } }, { .data =3D { 0x84, 0xff } },
+	{ .data =3D { 0x85, 0xff } }, { .data =3D { 0x86, 0x03 } },
+	{ .data =3D { 0x87, 0x00 } }, { .data =3D { 0x88, 0x00 } },
+	{ .data =3D { 0xa2, 0x20 } }, { .data =3D { 0xa9, 0x01 } },
+	{ .data =3D { 0xaa, 0x12 } }, { .data =3D { 0xab, 0x13 } },
+	{ .data =3D { 0xac, 0x0a } }, { .data =3D { 0xad, 0x74 } },
+	{ .data =3D { 0xaf, 0x33 } }, { .data =3D { 0xb0, 0x03 } },
+	{ .data =3D { 0xb1, 0x14 } }, { .data =3D { 0xb2, 0x42 } },
+	{ .data =3D { 0xb3, 0x40 } }, { .data =3D { 0xb4, 0xa5 } },
+	{ .data =3D { 0xb6, 0x44 } }, { .data =3D { 0xb7, 0x04 } },
+	{ .data =3D { 0xb8, 0x14 } }, { .data =3D { 0xb9, 0x42 } },
+	{ .data =3D { 0xba, 0x40 } }, { .data =3D { 0xbb, 0xa5 } },
+	{ .data =3D { 0xbd, 0x44 } }, { .data =3D { 0xbe, 0x04 } },
+	{ .data =3D { 0xbf, 0x00 } }, { .data =3D { 0xc0, 0x75 } },
+	{ .data =3D { 0xc1, 0x6a } }, { .data =3D { 0xc2, 0xa5 } },
+	{ .data =3D { 0xc4, 0x22 } }, { .data =3D { 0xc5, 0x02 } },
+	{ .data =3D { 0xc6, 0x00 } }, { .data =3D { 0xc7, 0x95 } },
+	{ .data =3D { 0xc8, 0x8a } }, { .data =3D { 0xc9, 0xa5 } },
+	{ .data =3D { 0xcb, 0x22 } }, { .data =3D { 0xcc, 0x02 } },
+	{ .data =3D { 0xcd, 0x00 } }, { .data =3D { 0xce, 0xb5 } },
+	{ .data =3D { 0xcf, 0xaa } }, { .data =3D { 0xd0, 0xa5 } },
+	{ .data =3D { 0xd2, 0x22 } }, { .data =3D { 0xd3, 0x02 } },
+	{ .data =3D { 0xfb, 0x01 } }, { .data =3D { 0xff, 0x10 } },
+	{ .data =3D { 0x26, 0x02 } }, { .data =3D { 0x35, 0x00 } },
+	{ .data =3D { 0x51, 0xff } }, { .data =3D { 0x53, 0x24 } },
+	{ .data =3D { 0x55, 0x00 } }, { .data =3D { 0xb0, 0x00 } },
+};
+
+static const struct drm_display_mode jdi_fhd_video_panel_mode =3D {
+	.clock =3D (1080 + 16 + 28 + 40) * (2160 + 7 + 4 + 24) * 60 / 1000,
+
+	.hdisplay =3D 1080,
+	.hsync_start =3D 1080 + 16,
+	.hsync_end =3D 1080 + 16 + 28,
+	.htotal =3D 1080 + 16 + 28 + 40,
+
+	.vdisplay =3D 2160,
+	.vsync_start =3D 2160 + 7,
+	.vsync_end =3D 2160 + 7 + 4,
+	.vtotal =3D 2160 + 7 + 4 + 24,
+
+	.type =3D DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct nt35596s_panel_desc jdi_fhd_video_panel_desc =3D {
+	.display_mode =3D &jdi_fhd_video_panel_mode,
+
+	.width_mm =3D 68,
+	.height_mm =3D 136,
+
+	.mode_flags =3D MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO |
+		      MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_CLOCK_NON_CONTINUOUS |
+		      MIPI_DSI_MODE_VIDEO_BURST,
+	.format =3D MIPI_DSI_FMT_RGB888,
+	.lanes =3D 4,
+	.on_cmds =3D jdi_fhd_video_on_cmds,
+	.num_on_cmds =3D ARRAY_SIZE(jdi_fhd_video_on_cmds),
+};
+
+static int nt35596s_panel_add(struct nt35596s_panel *pinfo)
+{
+	struct device *dev =3D &pinfo->dsi->dev;
+	int i, ret;
+
+	for (i =3D 0; i < ARRAY_SIZE(pinfo->supplies); i++)
+		pinfo->supplies[i].supply =3D nt35596s_regulator_names[i];
+
+	ret =3D devm_regulator_bulk_get(dev, ARRAY_SIZE(pinfo->supplies),
+				      pinfo->supplies);
+	if (ret < 0)
+		return dev_err_probe(dev, ret, "failed to get regulators\n");
+
+	for (i =3D 0; i < ARRAY_SIZE(pinfo->supplies); i++) {
+		ret =3D regulator_set_load(pinfo->supplies[i].consumer,
+					 nt35596s_regulator_enable_loads[i]);
+		if (ret)
+			return dev_err_probe(
+				dev, ret,
+				"failed to set regulator enable loads\n");
+	}
+
+	pinfo->reset_gpio =3D devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
+	if (IS_ERR(pinfo->reset_gpio))
+		return dev_err_probe(dev, PTR_ERR(pinfo->reset_gpio),
+				     "failed to get reset gpio from DT\n");
+
+	drm_panel_init(&pinfo->panel, dev, &panel_funcs,
+		       DRM_MODE_CONNECTOR_DSI);
+
+	ret =3D drm_panel_of_backlight(&pinfo->panel);
+	if (ret)
+		return dev_err_probe(dev, ret, "Failed to get backlight\n");
+
+	drm_panel_add(&pinfo->panel);
+
+	return 0;
+}
+
+static int nt35596s_panel_probe(struct mipi_dsi_device *dsi)
+{
+	struct nt35596s_panel *pinfo;
+	const struct nt35596s_panel_desc *desc;
+	int err;
+
+	pinfo =3D devm_kzalloc(&dsi->dev, sizeof(*pinfo), GFP_KERNEL);
+	if (!pinfo)
+		return -ENOMEM;
+
+	desc =3D of_device_get_match_data(&dsi->dev);
+	dsi->mode_flags =3D desc->mode_flags;
+	dsi->format =3D desc->format;
+	dsi->lanes =3D desc->lanes;
+	pinfo->desc =3D desc;
+	pinfo->dsi =3D dsi;
+
+	mipi_dsi_set_drvdata(dsi, pinfo);
+
+	err =3D nt35596s_panel_add(pinfo);
+	if (err < 0)
+		return err;
+
+	err =3D mipi_dsi_attach(dsi);
+	if (err < 0) {
+		drm_panel_remove(&pinfo->panel);
+		return err;
+	}
+
+	return 0;
+}
+
+static int nt35596s_panel_remove(struct mipi_dsi_device *dsi)
+{
+	struct nt35596s_panel *pinfo =3D mipi_dsi_get_drvdata(dsi);
+	int err;
+
+	err =3D drm_panel_unprepare(&pinfo->panel);
+	if (err < 0)
+		dev_err(&dsi->dev, "failed to unprepare panel: %d\n", err);
+
+	err =3D drm_panel_disable(&pinfo->panel);
+	if (err < 0)
+		dev_err(&dsi->dev, "failed to disable panel: %d\n", err);
+
+	err =3D mipi_dsi_detach(dsi);
+	if (err < 0)
+		dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
+
+	drm_panel_remove(&pinfo->panel);
+
+	return 0;
+}
+
+static void nt35596s_panel_shutdown(struct mipi_dsi_device *dsi)
+{
+	struct nt35596s_panel *pinfo =3D mipi_dsi_get_drvdata(dsi);
+
+	drm_panel_disable(&pinfo->panel);
+	drm_panel_unprepare(&pinfo->panel);
+}
+
+static const struct of_device_id nt35596s_panel_of_match[] =3D {
+	{ .compatible =3D "jdi,fhd-nt35596s", .data =3D &jdi_fhd_video_panel_desc=
 },
+	{}
+};
+MODULE_DEVICE_TABLE(of, nt35596s_panel_of_match);
+
+static struct mipi_dsi_driver nt35596s_panel_driver =3D {
+	.driver =3D {
+		.name =3D "panel-jdi-fhd-nt35596s",
+		.of_match_table =3D nt35596s_panel_of_match,
+	},
+	.probe =3D nt35596s_panel_probe,
+	.remove =3D nt35596s_panel_remove,
+	.shutdown =3D nt35596s_panel_shutdown,
+};
+module_mipi_dsi_driver(nt35596s_panel_driver);
+
+MODULE_AUTHOR("Molly Sophia <mollysophia379@gmail.com>");
+MODULE_DESCRIPTION("DRM driver for JDI FHD nt35596s DSI panel, video mode"=
);
+MODULE_LICENSE("GPL");
--=20
2.37.0