From nobody Sun Apr 19 04:22:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DED58C433EF for ; Wed, 6 Jul 2022 18:35:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233383AbiGFSfA (ORCPT ); Wed, 6 Jul 2022 14:35:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48046 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233823AbiGFSex (ORCPT ); Wed, 6 Jul 2022 14:34:53 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2987A205FB; Wed, 6 Jul 2022 11:34:52 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id D0479B81E83; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Pali Roh=C3=A1r --- arch/arm/boot/dts/kirkwood-6192.dtsi | 14 ++++++++++-- arch/arm/boot/dts/kirkwood-6281.dtsi | 14 ++++++++++-- arch/arm/boot/dts/kirkwood-6282.dtsi | 28 ++++++++++++++++++++---- arch/arm/boot/dts/kirkwood-98dx4122.dtsi | 14 ++++++++++-- 4 files changed, 60 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/kirkwood-6192.dtsi b/arch/arm/boot/dts/kirkw= ood-6192.dtsi index 396bcba08adb..07f4f7f98c0c 100644 --- a/arch/arm/boot/dts/kirkwood-6192.dtsi +++ b/arch/arm/boot/dts/kirkwood-6192.dtsi @@ -26,12 +26,22 @@ ranges =3D <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &intc 9>; + interrupt-names =3D "intx"; + interrupts =3D <9>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gate_clk 2>; status =3D "disabled"; + + pcie_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; }; diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkw= ood-6281.dtsi index faa05849a40d..d08a9a5ecc26 100644 --- a/arch/arm/boot/dts/kirkwood-6281.dtsi +++ b/arch/arm/boot/dts/kirkwood-6281.dtsi @@ -26,12 +26,22 @@ ranges =3D <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &intc 9>; + interrupt-names =3D "intx"; + interrupts =3D <9>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gate_clk 2>; status =3D "disabled"; + + pcie_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; }; diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkw= ood-6282.dtsi index e84c54b77dea..2eea5b304f47 100644 --- a/arch/arm/boot/dts/kirkwood-6282.dtsi +++ b/arch/arm/boot/dts/kirkwood-6282.dtsi @@ -30,12 +30,22 @@ ranges =3D <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &intc 9>; + interrupt-names =3D "intx"; + interrupts =3D <9>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie0_intc 0>, + <0 0 0 2 &pcie0_intc 1>, + <0 0 0 3 &pcie0_intc 2>, + <0 0 0 4 &pcie0_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gate_clk 2>; status =3D "disabled"; + + pcie0_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie1: pcie@2,0 { @@ -48,12 +58,22 @@ ranges =3D <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &intc 10>; + interrupt-names =3D "intx"; + interrupts =3D <10>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <0>; clocks =3D <&gate_clk 18>; status =3D "disabled"; + + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; }; diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/k= irkwood-98dx4122.dtsi index 299c147298c3..070bc13242b8 100644 --- a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi +++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi @@ -26,12 +26,22 @@ ranges =3D <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &intc 9>; + interrupt-names =3D "intx"; + interrupts =3D <9>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gate_clk 2>; status =3D "disabled"; + + pcie_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; }; --=20 2.20.1 From nobody Sun Apr 19 04:22:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE725C433EF for ; Wed, 6 Jul 2022 18:35:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234574AbiGFSfD (ORCPT ); Wed, 6 Jul 2022 14:35:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48048 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234190AbiGFSex (ORCPT ); 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Wed, 6 Jul 2022 20:34:47 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , =?UTF-8?q?Marek=20Beh=C3=BAn?= Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 02/11] ARM: dts: dove: Add definitions for PCIe legacy INTx interrupts Date: Wed, 6 Jul 2022 20:31:05 +0200 Message-Id: <20220706183114.30783-3-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220706183114.30783-1-pali@kernel.org> References: <20220706183114.30783-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Pali Roh=C3=A1r --- arch/arm/boot/dts/dove.dtsi | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 89e0bdaf3a85..96ba47c061a7 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -122,8 +122,18 @@ bus-range =3D <0x00 0xff>; =20 #interrupt-cells =3D <1>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &intc 16>; + interrupt-names =3D "intx"; + interrupts =3D <16>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie0_intc 0>, + <0 0 0 2 &pcie0_intc 1>, + <0 0 0 3 &pcie0_intc 2>, + <0 0 0 4 &pcie0_intc 3>; + + pcie0_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie1: pcie@2 { @@ -141,8 +151,18 @@ bus-range =3D <0x00 0xff>; =20 #interrupt-cells =3D <1>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &intc 18>; + interrupt-names =3D "intx"; + interrupts =3D <18>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; + + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; =20 --=20 2.20.1 From nobody Sun Apr 19 04:22:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29BB3CCA47F for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Pali Roh=C3=A1r --- arch/arm/boot/dts/armada-370.dtsi | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-3= 70.dtsi index 46e6d3ed8f35..9dc928859ad3 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -60,16 +60,26 @@ reg =3D <0x0800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 58>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x1 = 0 1 0 0x81000000 0 0 0x81000000 0x1 0 = 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 58>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie0_intc 0>, + <0 0 0 2 &pcie0_intc 1>, + <0 0 0 3 &pcie0_intc 2>, + <0 0 0 4 &pcie0_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 5>; status =3D "disabled"; + + pcie0_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie2: pcie@2,0 { @@ -78,16 +88,26 @@ reg =3D <0x1000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 62>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x2 = 0 1 0 0x81000000 0 0 0x81000000 0x2 0 = 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 62>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie2_intc 0>, + <0 0 0 2 &pcie2_intc 1>, + <0 0 0 3 &pcie2_intc 2>, + <0 0 0 4 &pcie2_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 9>; status =3D "disabled"; + + pcie2_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; =20 --=20 2.20.1 From nobody Sun Apr 19 04:22:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26E7AC43334 for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Pali Roh=C3=A1r --- arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/= armada-xp-98dx3236.dtsi index 38a052a0312d..b21ffb819b1d 100644 --- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi +++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi @@ -76,16 +76,26 @@ reg =3D <0x0800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 58>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 58>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 5>; status =3D "disabled"; + + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; =20 --=20 2.20.1 From nobody Sun Apr 19 04:22:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B0ABC43334 for ; Wed, 6 Jul 2022 18:35:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234582AbiGFSfM (ORCPT ); Wed, 6 Jul 2022 14:35:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48168 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233678AbiGFSe5 (ORCPT ); Wed, 6 Jul 2022 14:34:57 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C45D32314A; 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Wed, 6 Jul 2022 20:34:50 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , =?UTF-8?q?Marek=20Beh=C3=BAn?= Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/11] ARM: dts: armada-xp-mv78230.dtsi: Add definitions for PCIe legacy INTx interrupts Date: Wed, 6 Jul 2022 20:31:08 +0200 Message-Id: <20220706183114.30783-6-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220706183114.30783-1-pali@kernel.org> References: <20220706183114.30783-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Pali Roh=C3=A1r --- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 70 ++++++++++++++++++++---- 1 file changed, 60 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/a= rmada-xp-mv78230.dtsi index 8558bf6bb54c..bf9360f41e0a 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -83,16 +83,26 @@ reg =3D <0x0800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 58>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 58>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 5>; status =3D "disabled"; + + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie2: pcie@2,0 { @@ -101,16 +111,26 @@ reg =3D <0x1000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 59>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 59>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie2_intc 0>, + <0 0 0 2 &pcie2_intc 1>, + <0 0 0 3 &pcie2_intc 2>, + <0 0 0 4 &pcie2_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <1>; clocks =3D <&gateclk 6>; status =3D "disabled"; + + pcie2_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie3: pcie@3,0 { @@ -119,16 +139,26 @@ reg =3D <0x1800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 60>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 60>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie3_intc 0>, + <0 0 0 2 &pcie3_intc 1>, + <0 0 0 3 &pcie3_intc 2>, + <0 0 0 4 &pcie3_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <2>; clocks =3D <&gateclk 7>; status =3D "disabled"; + + pcie3_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie4: pcie@4,0 { @@ -137,16 +167,26 @@ reg =3D <0x2000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 61>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 61>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie4_intc 0>, + <0 0 0 2 &pcie4_intc 1>, + <0 0 0 3 &pcie4_intc 2>, + <0 0 0 4 &pcie4_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <3>; clocks =3D <&gateclk 8>; status =3D "disabled"; + + pcie4_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie5: pcie@5,0 { @@ -155,16 +195,26 @@ reg =3D <0x2800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 62>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x5 0 1 0 0x81000000 0 0 0x81000000 0x5 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 62>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie5_intc 0>, + <0 0 0 2 &pcie5_intc 1>, + <0 0 0 3 &pcie5_intc 2>, + <0 0 0 4 &pcie5_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 9>; status =3D "disabled"; + + pcie5_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; =20 --=20 2.20.1 From nobody Sun Apr 19 04:22:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3438CC43334 for ; Wed, 6 Jul 2022 18:35:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234680AbiGFSfZ (ORCPT ); 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Wed, 6 Jul 2022 20:34:51 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , =?UTF-8?q?Marek=20Beh=C3=BAn?= Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/11] ARM: dts: armada-xp-mv78260.dtsi: Add definitions for PCIe legacy INTx interrupts Date: Wed, 6 Jul 2022 20:31:09 +0200 Message-Id: <20220706183114.30783-7-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220706183114.30783-1-pali@kernel.org> References: <20220706183114.30783-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Pali Roh=C3=A1r --- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 126 +++++++++++++++++++---- 1 file changed, 108 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/a= rmada-xp-mv78260.dtsi index 2d85fe8ac327..0714af52e607 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -98,16 +98,26 @@ reg =3D <0x0800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 58>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 58>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 5>; status =3D "disabled"; + + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie2: pcie@2,0 { @@ -116,16 +126,26 @@ reg =3D <0x1000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 59>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 59>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie2_intc 0>, + <0 0 0 2 &pcie2_intc 1>, + <0 0 0 3 &pcie2_intc 2>, + <0 0 0 4 &pcie2_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <1>; clocks =3D <&gateclk 6>; status =3D "disabled"; + + pcie2_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie3: pcie@3,0 { @@ -134,16 +154,26 @@ reg =3D <0x1800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 60>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 60>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie3_intc 0>, + <0 0 0 2 &pcie3_intc 1>, + <0 0 0 3 &pcie3_intc 2>, + <0 0 0 4 &pcie3_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <2>; clocks =3D <&gateclk 7>; status =3D "disabled"; + + pcie3_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie4: pcie@4,0 { @@ -152,16 +182,26 @@ reg =3D <0x2000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 61>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 61>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie4_intc 0>, + <0 0 0 2 &pcie4_intc 1>, + <0 0 0 3 &pcie4_intc 2>, + <0 0 0 4 &pcie4_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <3>; clocks =3D <&gateclk 8>; status =3D "disabled"; + + pcie4_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie5: pcie@5,0 { @@ -170,16 +210,26 @@ reg =3D <0x2800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 62>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x5 0 1 0 0x81000000 0 0 0x81000000 0x5 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 62>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie5_intc 0>, + <0 0 0 2 &pcie5_intc 1>, + <0 0 0 3 &pcie5_intc 2>, + <0 0 0 4 &pcie5_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 9>; status =3D "disabled"; + + pcie5_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie6: pcie@6,0 { @@ -188,16 +238,26 @@ reg =3D <0x3000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 63>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x6 0 1 0 0x81000000 0 0 0x81000000 0x6 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 63>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie6_intc 0>, + <0 0 0 2 &pcie6_intc 1>, + <0 0 0 3 &pcie6_intc 2>, + <0 0 0 4 &pcie6_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <1>; clocks =3D <&gateclk 10>; status =3D "disabled"; + + pcie6_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie7: pcie@7,0 { @@ -206,16 +266,26 @@ reg =3D <0x3800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 64>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x7 0 1 0 0x81000000 0 0 0x81000000 0x7 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 64>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie7_intc 0>, + <0 0 0 2 &pcie7_intc 1>, + <0 0 0 3 &pcie7_intc 2>, + <0 0 0 4 &pcie7_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <2>; clocks =3D <&gateclk 11>; status =3D "disabled"; + + pcie7_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie8: pcie@8,0 { @@ -224,16 +294,26 @@ reg =3D <0x4000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 65>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x8 0 1 0 0x81000000 0 0 0x81000000 0x8 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 65>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie8_intc 0>, + <0 0 0 2 &pcie8_intc 1>, + <0 0 0 3 &pcie8_intc 2>, + <0 0 0 4 &pcie8_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <3>; clocks =3D <&gateclk 12>; status =3D "disabled"; + + pcie8_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie9: pcie@9,0 { @@ -242,16 +322,26 @@ reg =3D <0x4800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 99>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x9 0 1 0 0x81000000 0 0 0x81000000 0x9 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 99>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie9_intc 0>, + <0 0 0 2 &pcie9_intc 1>, + <0 0 0 3 &pcie9_intc 2>, + <0 0 0 4 &pcie9_intc 3>; marvell,pcie-port =3D <2>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 26>; status =3D "disabled"; + + pcie9_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; =20 --=20 2.20.1 From nobody Sun Apr 19 04:22:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4E24C43334 for ; Wed, 6 Jul 2022 18:35:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234662AbiGFSfV (ORCPT ); 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b=dtbExBuYHPWTIX69iI2gtHzUvpErU692AwIwCUHtBMeq+8uitugPayxl+9UhD78CW f9dDcHxEYxjVeA6Ta0F2uWamFZXrDxZsiIPTAUMWzJdz1FMRpzKJLS3Z+Z5aRd4Zej gKMy5J0i3/9zV3SiNlDTIvc+znxxC4iDTxfht4W7/ngLT3pzcCnnuVaghQ7Mqx9ouX 4cNFJSH+FfRCx12dUqy93HAwNqicK5X+cghBxKdpdqTPKaWy0T1VkeRXDhNim9EQka RawB56L3ZCx56FJwvlhaR0UlBiGo0N5oMtUrcA9tzzM601nTp+8QuIdCV2SnUygwI5 wXIlaJvWuZfhg== Received: by pali.im (Postfix) id 3522F7BA; Wed, 6 Jul 2022 20:34:52 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , =?UTF-8?q?Marek=20Beh=C3=BAn?= Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 07/11] ARM: dts: armada-xp-mv78460.dtsi: Add definitions for PCIe legacy INTx interrupts Date: Wed, 6 Jul 2022 20:31:10 +0200 Message-Id: <20220706183114.30783-8-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220706183114.30783-1-pali@kernel.org> References: <20220706183114.30783-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Pali Roh=C3=A1r --- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 140 +++++++++++++++++++---- 1 file changed, 120 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/a= rmada-xp-mv78460.dtsi index 230a3fd36b30..16185edf9aa5 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -119,16 +119,26 @@ reg =3D <0x0800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 58>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 58>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 5>; status =3D "disabled"; + + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie2: pcie@2,0 { @@ -137,16 +147,26 @@ reg =3D <0x1000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 59>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 59>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie2_intc 0>, + <0 0 0 2 &pcie2_intc 1>, + <0 0 0 3 &pcie2_intc 2>, + <0 0 0 4 &pcie2_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <1>; clocks =3D <&gateclk 6>; status =3D "disabled"; + + pcie2_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie3: pcie@3,0 { @@ -155,16 +175,26 @@ reg =3D <0x1800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 60>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 60>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie3_intc 0>, + <0 0 0 2 &pcie3_intc 1>, + <0 0 0 3 &pcie3_intc 2>, + <0 0 0 4 &pcie3_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <2>; clocks =3D <&gateclk 7>; status =3D "disabled"; + + pcie3_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie4: pcie@4,0 { @@ -173,16 +203,26 @@ reg =3D <0x2000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 61>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 61>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie4_intc 0>, + <0 0 0 2 &pcie4_intc 1>, + <0 0 0 3 &pcie4_intc 2>, + <0 0 0 4 &pcie4_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <3>; clocks =3D <&gateclk 8>; status =3D "disabled"; + + pcie4_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie5: pcie@5,0 { @@ -191,16 +231,26 @@ reg =3D <0x2800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 62>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x5 0 1 0 0x81000000 0 0 0x81000000 0x5 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 62>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie5_intc 0>, + <0 0 0 2 &pcie5_intc 1>, + <0 0 0 3 &pcie5_intc 2>, + <0 0 0 4 &pcie5_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 9>; status =3D "disabled"; + + pcie5_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie6: pcie@6,0 { @@ -209,16 +259,26 @@ reg =3D <0x3000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 63>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x6 0 1 0 0x81000000 0 0 0x81000000 0x6 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 63>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie6_intc 0>, + <0 0 0 2 &pcie6_intc 1>, + <0 0 0 3 &pcie6_intc 2>, + <0 0 0 4 &pcie6_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <1>; clocks =3D <&gateclk 10>; status =3D "disabled"; + + pcie6_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie7: pcie@7,0 { @@ -227,16 +287,26 @@ reg =3D <0x3800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 64>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x7 0 1 0 0x81000000 0 0 0x81000000 0x7 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 64>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie7_intc 0>, + <0 0 0 2 &pcie7_intc 1>, + <0 0 0 3 &pcie7_intc 2>, + <0 0 0 4 &pcie7_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <2>; clocks =3D <&gateclk 11>; status =3D "disabled"; + + pcie7_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie8: pcie@8,0 { @@ -245,16 +315,26 @@ reg =3D <0x4000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 65>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x8 0 1 0 0x81000000 0 0 0x81000000 0x8 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 65>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie8_intc 0>, + <0 0 0 2 &pcie8_intc 1>, + <0 0 0 3 &pcie8_intc 2>, + <0 0 0 4 &pcie8_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <3>; clocks =3D <&gateclk 12>; status =3D "disabled"; + + pcie8_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie9: pcie@9,0 { @@ -263,16 +343,26 @@ reg =3D <0x4800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 99>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x9 0 1 0 0x81000000 0 0 0x81000000 0x9 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 99>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie9_intc 0>, + <0 0 0 2 &pcie9_intc 1>, + <0 0 0 3 &pcie9_intc 2>, + <0 0 0 4 &pcie9_intc 3>; marvell,pcie-port =3D <2>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 26>; status =3D "disabled"; + + pcie9_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie10: pcie@a,0 { @@ -281,16 +371,26 @@ reg =3D <0x5000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&mpic 103>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0xa 0 1 0 0x81000000 0 0 0x81000000 0xa 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &mpic 103>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie10_intc 0>, + <0 0 0 2 &pcie10_intc 1>, + <0 0 0 3 &pcie10_intc 2>, + <0 0 0 4 &pcie10_intc 3>; marvell,pcie-port =3D <3>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 27>; status =3D "disabled"; + + pcie10_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; =20 --=20 2.20.1 From nobody Sun Apr 19 04:22:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE454C433EF for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Pali Roh=C3=A1r --- arch/arm/boot/dts/armada-375.dtsi | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-3= 75.dtsi index 7f2f24a29e6c..929deaf312a5 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -568,16 +568,26 @@ reg =3D <0x0800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie0_intc 0>, + <0 0 0 2 &pcie0_intc 1>, + <0 0 0 3 &pcie0_intc 2>, + <0 0 0 4 &pcie0_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 5>; status =3D "disabled"; + + pcie0_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 pcie1: pcie@2,0 { @@ -586,16 +596,26 @@ reg =3D <0x1000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <1>; clocks =3D <&gateclk 6>; status =3D "disabled"; + + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 }; --=20 2.20.1 From nobody Sun Apr 19 04:22:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC546C43334 for ; Wed, 6 Jul 2022 18:35:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234709AbiGFSf2 (ORCPT ); Wed, 6 Jul 2022 14:35:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48182 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234544AbiGFSe6 (ORCPT ); Wed, 6 Jul 2022 14:34:58 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 326BC26ADF; Wed, 6 Jul 2022 11:34:56 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id CCE8AB81BE5; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Pali Roh=C3=A1r --- arch/arm/boot/dts/armada-380.dtsi | 42 ++++++++++++++++++++++++++----- 1 file changed, 36 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-3= 80.dtsi index cff1269f3fbf..ce1dddb2269b 100644 --- a/arch/arm/boot/dts/armada-380.dtsi +++ b/arch/arm/boot/dts/armada-380.dtsi @@ -64,16 +64,26 @@ reg =3D <0x0800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 8>; status =3D "disabled"; + + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 /* x1 port */ @@ -83,16 +93,26 @@ reg =3D <0x1000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie2_intc 0>, + <0 0 0 2 &pcie2_intc 1>, + <0 0 0 3 &pcie2_intc 2>, + <0 0 0 4 &pcie2_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 5>; status =3D "disabled"; + + pcie2_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 /* x1 port */ @@ -102,16 +122,26 @@ reg =3D <0x1800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie3_intc 0>, + <0 0 0 2 &pcie3_intc 1>, + <0 0 0 3 &pcie3_intc 2>, + <0 0 0 4 &pcie3_intc 3>; marvell,pcie-port =3D <2>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 6>; status =3D "disabled"; + + pcie3_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; }; --=20 2.20.1 From nobody Sun Apr 19 04:22:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4D24C43334 for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org With this change legacy INTA, INTB, INTC and INTD interrupts are reported separately and not mixed into one Linux virq source anymore. Signed-off-by: Pali Roh=C3=A1r Acked-by: Gregory CLEMENT Tested-by: Luis Mendes --- arch/arm/boot/dts/armada-385.dtsi | 52 ++++++++++++++++++++++++++----- 1 file changed, 44 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-3= 85.dtsi index f0022d10c715..83392b92dae2 100644 --- a/arch/arm/boot/dts/armada-385.dtsi +++ b/arch/arm/boot/dts/armada-385.dtsi @@ -69,16 +69,25 @@ reg =3D <0x0800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 8>; status =3D "disabled"; + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 /* x1 port */ @@ -88,16 +97,25 @@ reg =3D <0x1000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie2_intc 0>, + <0 0 0 2 &pcie2_intc 1>, + <0 0 0 3 &pcie2_intc 2>, + <0 0 0 4 &pcie2_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 5>; status =3D "disabled"; + pcie2_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 /* x1 port */ @@ -107,16 +125,25 @@ reg =3D <0x1800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie3_intc 0>, + <0 0 0 2 &pcie3_intc 1>, + <0 0 0 3 &pcie3_intc 2>, + <0 0 0 4 &pcie3_intc 3>; marvell,pcie-port =3D <2>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 6>; status =3D "disabled"; + pcie3_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 /* @@ -129,16 +156,25 @@ reg =3D <0x2000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie4_intc 0>, + <0 0 0 2 &pcie4_intc 1>, + <0 0 0 3 &pcie4_intc 2>, + <0 0 0 4 &pcie4_intc 3>; marvell,pcie-port =3D <3>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 7>; status =3D "disabled"; + pcie4_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; }; --=20 2.20.1 From nobody Sun Apr 19 04:22:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 248E2C43334 for ; Wed, 6 Jul 2022 18:35:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233475AbiGFSfh (ORCPT ); Wed, 6 Jul 2022 14:35:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234599AbiGFSfF (ORCPT ); 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Wed, 6 Jul 2022 20:34:56 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , =?UTF-8?q?Marek=20Beh=C3=BAn?= Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 11/11] ARM: dts: armada-39x.dtsi: Add definitions for PCIe legacy INTx interrupts Date: Wed, 6 Jul 2022 20:31:14 +0200 Message-Id: <20220706183114.30783-12-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220706183114.30783-1-pali@kernel.org> References: <20220706183114.30783-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Pali Roh=C3=A1r --- arch/arm/boot/dts/armada-39x.dtsi | 56 ++++++++++++++++++++++++++----- 1 file changed, 48 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-3= 9x.dtsi index e0b7c2099831..923b035a3ab3 100644 --- a/arch/arm/boot/dts/armada-39x.dtsi +++ b/arch/arm/boot/dts/armada-39x.dtsi @@ -438,16 +438,26 @@ reg =3D <0x0800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; marvell,pcie-port =3D <0>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 8>; status =3D "disabled"; + + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 /* x1 port */ @@ -457,16 +467,26 @@ reg =3D <0x1000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie2_intc 0>, + <0 0 0 2 &pcie2_intc 1>, + <0 0 0 3 &pcie2_intc 2>, + <0 0 0 4 &pcie2_intc 3>; marvell,pcie-port =3D <1>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 5>; status =3D "disabled"; + + pcie2_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 /* x1 port */ @@ -476,16 +496,26 @@ reg =3D <0x1800 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie3_intc 0>, + <0 0 0 2 &pcie3_intc 1>, + <0 0 0 3 &pcie3_intc 2>, + <0 0 0 4 &pcie3_intc 3>; marvell,pcie-port =3D <2>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 6>; status =3D "disabled"; + + pcie3_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; =20 /* @@ -498,16 +528,26 @@ reg =3D <0x2000 0 0 0 0>; #address-cells =3D <3>; #size-cells =3D <2>; + interrupt-names =3D "intx"; + interrupts-extended =3D <&gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells =3D <1>; ranges =3D <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; bus-range =3D <0x00 0xff>; - interrupt-map-mask =3D <0 0 0 0>; - interrupt-map =3D <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie4_intc 0>, + <0 0 0 2 &pcie4_intc 1>, + <0 0 0 3 &pcie4_intc 2>, + <0 0 0 4 &pcie4_intc 3>; marvell,pcie-port =3D <3>; marvell,pcie-lane =3D <0>; clocks =3D <&gateclk 7>; status =3D "disabled"; + + pcie4_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells =3D <1>; + }; }; }; =20 --=20 2.20.1