From nobody Sun Apr 19 05:33:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA792C433EF for ; Tue, 5 Jul 2022 16:32:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232674AbiGEQcl (ORCPT ); Tue, 5 Jul 2022 12:32:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57888 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230398AbiGEQcZ (ORCPT ); Tue, 5 Jul 2022 12:32:25 -0400 Received: from msg-2.mailo.com (msg-2.mailo.com [213.182.54.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C95319292; Tue, 5 Jul 2022 09:32:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=mailoo.org; s=mailo; t=1657038717; bh=Dp2mRQO8dxIh3vCWhuPurEDJ8gsjkJ7IKTB/TsgnvYs=; h=X-EA-Auth:From:To:Cc:Subject:Date:Message-Id:X-Mailer:In-Reply-To: References:MIME-Version:Content-Transfer-Encoding; b=e+fyIMaBnOy+uG96sRq0FcmFIaR/pK+vnueqrKJcMtCEX7MQoOrJ+KFy+RociyNAM edrPsboXG6LnKYkVM8qVgWlkVP8TEuhO7V4l+GEr0itBmToyiG7fp2pNb25vBrd8Eg NksTv3gGsXoFO625J9cFpTapnDkh2v/mfVhLDpJA= Received: by b-5.in.mailobj.net [192.168.90.15] with ESMTP via [213.182.55.207] Tue, 5 Jul 2022 18:31:57 +0200 (CEST) X-EA-Auth: w7tFLiNqg8mHGx+5J4Alt4BihUzZ9IzDrqt5DBNv4mBZ0BBs6IYS8H4NGuA0CGvLrQ6bRSez823YJlh0VPAf8UvqPWvpqtCRuYc+Jwbobqo= From: Vincent Knecht To: Pavel Machek , Rob Herring , Krzysztof Kozlowski , Vincent Knecht , linux-leds@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, hns@goldelico.com, Rob Herring Subject: [PATCH v3 1/6] dt-bindings: leds: Convert is31fl319x to dtschema Date: Tue, 5 Jul 2022 18:31:29 +0200 Message-Id: <20220705163136.2278662-2-vincent.knecht@mailoo.org> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220705163136.2278662-1-vincent.knecht@mailoo.org> References: <20220705163136.2278662-1-vincent.knecht@mailoo.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert leds-is31fl319x.txt to dtschema. Set license to the one recommended by DT project and set myself as maintainer. Reviewed-by: Rob Herring Signed-off-by: Vincent Knecht --- v3: - changed license back to (GPL-2.0-only OR BSD-2-Clause) and maintainer to myself, with Nikolaus agreement --- .../bindings/leds/issi,is31fl319x.yaml | 113 ++++++++++++++++++ .../bindings/leds/leds-is31fl319x.txt | 61 ---------- 2 files changed, 113 insertions(+), 61 deletions(-) create mode 100644 Documentation/devicetree/bindings/leds/issi,is31fl319x.= yaml delete mode 100644 Documentation/devicetree/bindings/leds/leds-is31fl319x.= txt diff --git a/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml b/= Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml new file mode 100644 index 000000000000..0d684aeeb8cd --- /dev/null +++ b/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/issi,is31fl319x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ISSI LED controllers bindings for IS31FL319{0,1,3,6,9} + +maintainers: + - Vincent Knecht + +description: | + The IS31FL319X are LED controllers with I2C interface. + Previously known as Si-En SN319{0,1,3,6,9}. + + For more product information please see the links below: + https://lumissil.com/assets/pdf/core/IS31FL3190_DS.pdf + https://lumissil.com/assets/pdf/core/IS31FL3191_DS.pdf + https://lumissil.com/assets/pdf/core/IS31FL3193_DS.pdf + https://lumissil.com/assets/pdf/core/IS31FL3196_DS.pdf + https://lumissil.com/assets/pdf/core/IS31FL3199_DS.pdf + +properties: + compatible: + enum: + - issi,is31fl3190 + - issi,is31fl3191 + - issi,is31fl3193 + - issi,is31fl3196 + - issi,is31fl3199 + - si-en,sn3199 + + reg: + maxItems: 1 + + shutdown-gpios: + maxItems: 1 + description: GPIO attached to the SDB pin. + + audio-gain-db: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + description: Audio gain selection for external analog modulation input. + enum: [0, 3, 6, 9, 12, 15, 18, 21] + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^led@[1-9]$": + type: object + $ref: common.yaml# + + properties: + reg: + description: Index of the LED. + minimum: 1 + maximum: 9 + + led-max-microamp: + default: 20000 + enum: [5000, 10000, 15000, 20000, 25000, 30000, 35000, 40000] + description: + Note that a driver will take the lowest of all LED limits + since the chip has a single global setting. The lowest value + will be chosen due to the PWM specificity, where lower + brightness is achieved by reducing the duty-cycle of pulses + and not the current, which will always have its peak value + equal to led-max-microamp. + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + #include + #include + + i2c0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + + led-controller@65 { + compatible =3D "issi,is31fl3196"; + reg =3D <0x65>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + shutdown-gpios =3D <&gpio0 11 GPIO_ACTIVE_HIGH>; + + led@1 { + reg =3D <1>; + label =3D "red:aux"; + led-max-microamp =3D <10000>; + }; + + led@5 { + reg =3D <5>; + label =3D "green:power"; + linux,default-trigger =3D "default-on"; + }; + }; + }; +... + diff --git a/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt b/D= ocumentation/devicetree/bindings/leds/leds-is31fl319x.txt deleted file mode 100644 index 676d43ec8169..000000000000 --- a/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt +++ /dev/null @@ -1,61 +0,0 @@ -LEDs connected to is31fl319x LED controller chip - -Required properties: -- compatible : Should be any of - "issi,is31fl3190" - "issi,is31fl3191" - "issi,is31fl3193" - "issi,is31fl3196" - "issi,is31fl3199" - "si-en,sn3199". -- #address-cells: Must be 1. -- #size-cells: Must be 0. -- reg: 0x64, 0x65, 0x66, or 0x67. - -Optional properties: -- audio-gain-db : audio gain selection for external analog modulation inpu= t. - Valid values: 0 - 21, step by 3 (rounded down) - Default: 0 -- shutdown-gpios : Specifier of the GPIO connected to SDB pin of the chip. - -Each led is represented as a sub-node of the issi,is31fl319x device. -There can be less leds subnodes than the chip can support but not more. - -Required led sub-node properties: -- reg : number of LED line - Valid values: 1 - number of leds supported by the chip variant. - -Optional led sub-node properties: -- label : see Documentation/devicetree/bindings/leds/common.txt. -- linux,default-trigger : - see Documentation/devicetree/bindings/leds/common.txt. -- led-max-microamp : (optional) - Valid values: 5000 - 40000, step by 5000 (rounded down) - Default: 20000 (20 mA) - Note: a driver will take the lowest of all led limits since the - chip has a single global setting. The lowest value will be chosen - due to the PWM specificity, where lower brightness is achieved - by reducing the dury-cycle of pulses and not the current, which - will always have its peak value equal to led-max-microamp. - -Examples: - -fancy_leds: leds@65 { - compatible =3D "issi,is31fl3196"; - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x65>; - shutdown-gpios =3D <&gpio0 11 GPIO_ACTIVE_HIGH>; - - red_aux: led@1 { - label =3D "red:aux"; - reg =3D <1>; - led-max-microamp =3D <10000>; - }; - - green_power: led@5 { - label =3D "green:power"; - reg =3D <5>; - linux,default-trigger =3D "default-on"; - }; -}; --=20 2.35.3 From nobody Sun Apr 19 05:33:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6A20C433EF for ; Tue, 5 Jul 2022 16:32:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232910AbiGEQcr (ORCPT ); Tue, 5 Jul 2022 12:32:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231423AbiGEQcZ (ORCPT ); Tue, 5 Jul 2022 12:32:25 -0400 Received: from msg-1.mailo.com (msg-1.mailo.com [213.182.54.11]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B2F3318382; Tue, 5 Jul 2022 09:32:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=mailoo.org; s=mailo; t=1657038719; bh=Obre5IIa+wQZbNnEgE6NenQzK6E616sCX+q9jkhLXDk=; h=X-EA-Auth:From:To:Cc:Subject:Date:Message-Id:X-Mailer:In-Reply-To: References:MIME-Version:Content-Transfer-Encoding; b=UsyX2LqfslhudDZbUkOJzTExVwJOxyQS4IPVqSSYPC/p69bK0mCtsbIswSuuwGx85 j2Z3XLNBrcckPeidJb7RCsKF9cvfMZdCpK29pDDT619G7lrntTQa2LhLP4JAO55xEp mP4HI7k2mQiR1Z+TiIjOk1rdq4Ood1sf8eng+v00= Received: by b-5.in.mailobj.net [192.168.90.15] with ESMTP via [213.182.55.207] Tue, 5 Jul 2022 18:31:59 +0200 (CEST) X-EA-Auth: uy+XIWsVz7YnrvCMGI2igZ4GD6wt6zDY8wIs7sajjsm2njh0kMZYz054c3LV5CBIq+wy0C4UbXizPP/bqETCeSu7CeClHJC7Sms51yaLemA= From: Vincent Knecht To: Pavel Machek , Rob Herring , Krzysztof Kozlowski , Vincent Knecht , linux-leds@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, hns@goldelico.com, Rob Herring Subject: [PATCH v3 2/6] dt-bindings: leds: is31fl319x: Document variants specificities Date: Tue, 5 Jul 2022 18:31:30 +0200 Message-Id: <20220705163136.2278662-3-vincent.knecht@mailoo.org> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220705163136.2278662-1-vincent.knecht@mailoo.org> References: <20220705163136.2278662-1-vincent.knecht@mailoo.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add si-en compatibles for all chip variants and add conditionals depending on compatibles to document variants specs: - possible reg addresses - whether audio-gain-db is supported or not - maximum number of leds - led-max-microamp values Reviewed-by: Rob Herring Signed-off-by: Vincent Knecht --- .../bindings/leds/issi,is31fl319x.yaml | 84 ++++++++++++++++++- 1 file changed, 82 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml b/= Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml index 0d684aeeb8cd..940333f2d69c 100644 --- a/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml +++ b/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml @@ -28,6 +28,10 @@ properties: - issi,is31fl3193 - issi,is31fl3196 - issi,is31fl3199 + - si-en,sn3190 + - si-en,sn3191 + - si-en,sn3193 + - si-en,sn3196 - si-en,sn3199 =20 reg: @@ -61,8 +65,6 @@ patternProperties: maximum: 9 =20 led-max-microamp: - default: 20000 - enum: [5000, 10000, 15000, 20000, 25000, 30000, 35000, 40000] description: Note that a driver will take the lowest of all LED limits since the chip has a single global setting. The lowest value @@ -71,6 +73,84 @@ patternProperties: and not the current, which will always have its peak value equal to led-max-microamp. =20 +allOf: + - if: + properties: + compatible: + contains: + enum: + - issi,is31fl3190 + - issi,is31fl3191 + - issi,is31fl3193 + - si-en,sn3190 + - si-en,sn3191 + - si-en,sn3193 + then: + properties: + reg: + enum: [0x68, 0x69, 0x6a, 0x6b] + + audio-gain-db: false + + patternProperties: + "^led@[1-9]$": + properties: + led-max-microamp: + default: 42000 + enum: [5000, 10000, 17500, 30000, 42000] + else: + properties: + reg: + enum: [0x64, 0x65, 0x66, 0x67] + + patternProperties: + "^led@[1-9]$": + properties: + led-max-microamp: + default: 20000 + enum: [5000, 10000, 15000, 20000, 25000, 30000, 35000, 40000] + - if: + properties: + compatible: + contains: + enum: + - issi,is31fl3190 + - issi,is31fl3191 + - si-en,sn3190 + - si-en,sn3191 + then: + patternProperties: + "^led@[1-9]$": + properties: + reg: + maximum: 1 + - if: + properties: + compatible: + contains: + enum: + - issi,is31fl3193 + - si-en,sn3193 + then: + patternProperties: + "^led@[1-9]$": + properties: + reg: + maximum: 3 + - if: + properties: + compatible: + contains: + enum: + - issi,is31fl3196 + - si-en,sn3196 + then: + patternProperties: + "^led@[1-9]$": + properties: + reg: + maximum: 6 + required: - compatible - reg --=20 2.35.3 From nobody Sun Apr 19 05:33:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3437EC433EF for ; Tue, 5 Jul 2022 16:32:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232372AbiGEQci (ORCPT ); Tue, 5 Jul 2022 12:32:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230444AbiGEQcZ (ORCPT ); Tue, 5 Jul 2022 12:32:25 -0400 Received: from msg-2.mailo.com (msg-2.mailo.com [213.182.54.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 185D918B0C; Tue, 5 Jul 2022 09:32:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=mailoo.org; s=mailo; t=1657038722; bh=OnG6BofeKIcOc3qBoOMQcWAYSD8krtB0UZjVBxSp6Og=; h=X-EA-Auth:From:To:Cc:Subject:Date:Message-Id:X-Mailer:In-Reply-To: References:MIME-Version:Content-Transfer-Encoding; b=fngowcq/5iOWW1Cu2j8bo2XVtEYen9rBTce65+U2IapjbmfSAq6KPO6VO4PX1FNk0 mFkaYY+sz82w1eAhIoYeNEt1t8dFPHQT+avmvQON4ICoQ40FWnDqo+URe6xmoNIa4C qXf8AWmp2e3Hil7I473h1wNCzuWT7T7AXZDKHARE= Received: by b-5.in.mailobj.net [192.168.90.15] with ESMTP via [213.182.55.207] Tue, 5 Jul 2022 18:32:02 +0200 (CEST) X-EA-Auth: Rf3UC8P3b0uO0vVHSNKlEBwTY2sxRU6PD4yBP7WEbEAU5k0DKNp7B/zypO9Nc27d+E3EfImYQLq0L2P7N2isnpJOQE+x0sWh9L8ulAJsfV0= From: Vincent Knecht To: Pavel Machek , Rob Herring , Krzysztof Kozlowski , Vincent Knecht , linux-leds@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, hns@goldelico.com Subject: [PATCH v3 3/6] leds: is31fl319x: Add missing si-en compatibles Date: Tue, 5 Jul 2022 18:31:31 +0200 Message-Id: <20220705163136.2278662-4-vincent.knecht@mailoo.org> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220705163136.2278662-1-vincent.knecht@mailoo.org> References: <20220705163136.2278662-1-vincent.knecht@mailoo.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add si-en compatibles for all chip variants. Signed-off-by: Vincent Knecht --- drivers/leds/leds-is31fl319x.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/leds/leds-is31fl319x.c b/drivers/leds/leds-is31fl319x.c index 4161b9dd7e48..0db5d4988131 100644 --- a/drivers/leds/leds-is31fl319x.c +++ b/drivers/leds/leds-is31fl319x.c @@ -102,6 +102,10 @@ static const struct of_device_id of_is31fl319x_match[]= =3D { { .compatible =3D "issi,is31fl3193", .data =3D &is31fl3193_cdef, }, { .compatible =3D "issi,is31fl3196", .data =3D &is31fl3196_cdef, }, { .compatible =3D "issi,is31fl3199", .data =3D &is31fl3199_cdef, }, + { .compatible =3D "si-en,sn3190", .data =3D &is31fl3190_cdef, }, + { .compatible =3D "si-en,sn3191", .data =3D &is31fl3190_cdef, }, + { .compatible =3D "si-en,sn3193", .data =3D &is31fl3193_cdef, }, + { .compatible =3D "si-en,sn3196", .data =3D &is31fl3196_cdef, }, { .compatible =3D "si-en,sn3199", .data =3D &is31fl3199_cdef, }, { } }; @@ -432,6 +436,10 @@ static const struct i2c_device_id is31fl319x_id[] =3D { { "is31fl3193" }, { "is31fl3196" }, { "is31fl3199" }, + { "sn3190" }, + { "sn3191" }, + { "sn3193" }, + { "sn3196" }, { "sn3199" }, {}, }; --=20 2.35.3 From nobody Sun Apr 19 05:33:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31DD7C43334 for ; Tue, 5 Jul 2022 16:32:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232799AbiGEQcd (ORCPT ); Tue, 5 Jul 2022 12:32:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57872 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230042AbiGEQcX (ORCPT ); Tue, 5 Jul 2022 12:32:23 -0400 Received: from msg-4.mailo.com (ip-15.mailobj.net [213.182.54.15]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 457F718B17; Tue, 5 Jul 2022 09:32:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=mailoo.org; s=mailo; t=1657038724; bh=skBMLgo4K7u5ITg9aIMHLL548MHmyODjRmtKzoSMboA=; h=X-EA-Auth:From:To:Cc:Subject:Date:Message-Id:X-Mailer:In-Reply-To: References:MIME-Version:Content-Transfer-Encoding; b=O0tW352dCLVSxiBNOUB7Hndq/F4N3kOH7HnVnNYoaYY6ws+FDo3lSGeOb6DyDPEPp qn/SlZXozhFMEaybkedCCjV7fwQBmuDWH7GA+/sobIHzAnRbptQFcN2iaTdFKCQ2DF QuKSjyqMb/mK57FuY4n3tO5ODP8VMYSBbFzzCWxc= Received: by b-5.in.mailobj.net [192.168.90.15] with ESMTP via [213.182.55.207] Tue, 5 Jul 2022 18:32:04 +0200 (CEST) X-EA-Auth: LNAgnHOQzli/a9QFZPLlqSn4lLcRADuNEBMiorHxborDgE9AvcuCd7Nm/pIMfKvaY033IYJyXZyi9Ny8kO/oyrVVRVjMEYYt3Pqwz3rNWMs= From: Vincent Knecht To: Pavel Machek , Rob Herring , Krzysztof Kozlowski , Vincent Knecht , linux-leds@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, hns@goldelico.com Subject: [PATCH v3 4/6] leds: is31fl319x: Use non-wildcard names for vars, structs and defines Date: Tue, 5 Jul 2022 18:31:32 +0200 Message-Id: <20220705163136.2278662-5-vincent.knecht@mailoo.org> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220705163136.2278662-1-vincent.knecht@mailoo.org> References: <20220705163136.2278662-1-vincent.knecht@mailoo.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In order to add real support for is31fl3190, is31fl3191 and is31fl3193, rename variant-dependent elements to not use 319X where needed. 3190 suffix is used for is31fl3190, is31fl3191 and is31fl3193 circuits. 3196 suffix is used for is31fl3196 and is31fl3199. Those two groups have different register maps, current settings and even a different interpretation of the software shutdown bit: https://lumissil.com/assets/pdf/core/IS31FL3190_DS.pdf https://lumissil.com/assets/pdf/core/IS31FL3191_DS.pdf https://lumissil.com/assets/pdf/core/IS31FL3193_DS.pdf https://lumissil.com/assets/pdf/core/IS31FL3196_DS.pdf https://lumissil.com/assets/pdf/core/IS31FL3199_DS.pdf Rename variables, structures and defines in preparation of the splitting. No functional nor behaviour change. Signed-off-by: Vincent Knecht --- v3: - rename IS31FL3196_BREATH_MASK to IS31FL3196_BREATH_MARK since it refers to "breathing mark" function, not to a bitmask - use GENMASK for IS31FL3196_CONFIG2_CS_MASK (Andy) - get rid of u32 castings in defines (Andy) - add _uA_ in IS31FL3196_CURRENT defines to denote the unit (Andy) - fix stuctures typo in commit message (Andy) --- drivers/leds/leds-is31fl319x.c | 142 ++++++++++++++++----------------- 1 file changed, 71 insertions(+), 71 deletions(-) diff --git a/drivers/leds/leds-is31fl319x.c b/drivers/leds/leds-is31fl319x.c index 0db5d4988131..e6fe0a8bc8d5 100644 --- a/drivers/leds/leds-is31fl319x.c +++ b/drivers/leds/leds-is31fl319x.c @@ -21,39 +21,39 @@ =20 /* register numbers */ #define IS31FL319X_SHUTDOWN 0x00 -#define IS31FL319X_CTRL1 0x01 -#define IS31FL319X_CTRL2 0x02 -#define IS31FL319X_CONFIG1 0x03 -#define IS31FL319X_CONFIG2 0x04 -#define IS31FL319X_RAMP_MODE 0x05 -#define IS31FL319X_BREATH_MASK 0x06 -#define IS31FL319X_PWM(channel) (0x07 + channel) -#define IS31FL319X_DATA_UPDATE 0x10 -#define IS31FL319X_T0(channel) (0x11 + channel) -#define IS31FL319X_T123_1 0x1a -#define IS31FL319X_T123_2 0x1b -#define IS31FL319X_T123_3 0x1c -#define IS31FL319X_T4(channel) (0x1d + channel) -#define IS31FL319X_TIME_UPDATE 0x26 -#define IS31FL319X_RESET 0xff - -#define IS31FL319X_REG_CNT (IS31FL319X_RESET + 1) +#define IS31FL3196_CTRL1 0x01 +#define IS31FL3196_CTRL2 0x02 +#define IS31FL3196_CONFIG1 0x03 +#define IS31FL3196_CONFIG2 0x04 +#define IS31FL3196_RAMP_MODE 0x05 +#define IS31FL3196_BREATH_MARK 0x06 +#define IS31FL3196_PWM(channel) (0x07 + channel) +#define IS31FL3196_DATA_UPDATE 0x10 +#define IS31FL3196_T0(channel) (0x11 + channel) +#define IS31FL3196_T123_1 0x1a +#define IS31FL3196_T123_2 0x1b +#define IS31FL3196_T123_3 0x1c +#define IS31FL3196_T4(channel) (0x1d + channel) +#define IS31FL3196_TIME_UPDATE 0x26 +#define IS31FL3196_RESET 0xff + +#define IS31FL3196_REG_CNT (IS31FL3196_RESET + 1) =20 #define IS31FL319X_MAX_LEDS 9 =20 /* CS (Current Setting) in CONFIG2 register */ -#define IS31FL319X_CONFIG2_CS_SHIFT 4 -#define IS31FL319X_CONFIG2_CS_MASK 0x7 -#define IS31FL319X_CONFIG2_CS_STEP_REF 12 +#define IS31FL3196_CONFIG2_CS_SHIFT 4 +#define IS31FL3196_CONFIG2_CS_MASK GENMASK(2, 0) +#define IS31FL3196_CONFIG2_CS_STEP_REF 12 =20 -#define IS31FL319X_CURRENT_MIN ((u32)5000) -#define IS31FL319X_CURRENT_MAX ((u32)40000) -#define IS31FL319X_CURRENT_STEP ((u32)5000) -#define IS31FL319X_CURRENT_DEFAULT ((u32)20000) +#define IS31FL3196_CURRENT_uA_MIN 5000 +#define IS31FL3196_CURRENT_uA_MAX 40000 +#define IS31FL3196_CURRENT_uA_STEP 5000 +#define IS31FL3196_CURRENT_uA_DEFAULT 20000 =20 /* Audio gain in CONFIG2 register */ -#define IS31FL319X_AUDIO_GAIN_DB_MAX ((u32)21) -#define IS31FL319X_AUDIO_GAIN_DB_STEP ((u32)3) +#define IS31FL3196_AUDIO_GAIN_DB_MAX 21 +#define IS31FL3196_AUDIO_GAIN_DB_STEP 3 =20 /* * regmap is used as a cache of chip's register space, @@ -111,7 +111,7 @@ static const struct of_device_id of_is31fl319x_match[] = =3D { }; MODULE_DEVICE_TABLE(of, of_is31fl319x_match); =20 -static int is31fl319x_brightness_set(struct led_classdev *cdev, +static int is31fl3196_brightness_set(struct led_classdev *cdev, enum led_brightness brightness) { struct is31fl319x_led *led =3D container_of(cdev, struct is31fl319x_led, @@ -127,7 +127,7 @@ static int is31fl319x_brightness_set(struct led_classde= v *cdev, mutex_lock(&is31->lock); =20 /* update PWM register */ - ret =3D regmap_write(is31->regmap, IS31FL319X_PWM(chan), brightness); + ret =3D regmap_write(is31->regmap, IS31FL3196_PWM(chan), brightness); if (ret < 0) goto out; =20 @@ -141,7 +141,7 @@ static int is31fl319x_brightness_set(struct led_classde= v *cdev, * the current setting, we read from the regmap cache */ =20 - ret =3D regmap_read(is31->regmap, IS31FL319X_PWM(i), &pwm_value); + ret =3D regmap_read(is31->regmap, IS31FL3196_PWM(i), &pwm_value); dev_dbg(&is31->client->dev, "%s read %d: ret=3D%d: %d\n", __func__, i, ret, pwm_value); on =3D ret >=3D 0 && pwm_value > LED_OFF; @@ -157,10 +157,10 @@ static int is31fl319x_brightness_set(struct led_class= dev *cdev, if (ctrl1 > 0 || ctrl2 > 0) { dev_dbg(&is31->client->dev, "power up %02x %02x\n", ctrl1, ctrl2); - regmap_write(is31->regmap, IS31FL319X_CTRL1, ctrl1); - regmap_write(is31->regmap, IS31FL319X_CTRL2, ctrl2); + regmap_write(is31->regmap, IS31FL3196_CTRL1, ctrl1); + regmap_write(is31->regmap, IS31FL3196_CTRL2, ctrl2); /* update PWMs */ - regmap_write(is31->regmap, IS31FL319X_DATA_UPDATE, 0x00); + regmap_write(is31->regmap, IS31FL3196_DATA_UPDATE, 0x00); /* enable chip from shut down */ ret =3D regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01); } else { @@ -190,14 +190,14 @@ static int is31fl319x_parse_child_dt(const struct dev= ice *dev, if (ret < 0 && ret !=3D -EINVAL) /* is optional */ return ret; =20 - led->max_microamp =3D IS31FL319X_CURRENT_DEFAULT; + led->max_microamp =3D IS31FL3196_CURRENT_uA_DEFAULT; ret =3D of_property_read_u32(child, "led-max-microamp", &led->max_microamp); if (!ret) { - if (led->max_microamp < IS31FL319X_CURRENT_MIN) + if (led->max_microamp < IS31FL3196_CURRENT_uA_MIN) return -EINVAL; /* not supported */ led->max_microamp =3D min(led->max_microamp, - IS31FL319X_CURRENT_MAX); + IS31FL3196_CURRENT_uA_MAX); } =20 return 0; @@ -271,7 +271,7 @@ static int is31fl319x_parse_dt(struct device *dev, ret =3D of_property_read_u32(np, "audio-gain-db", &is31->audio_gain_db); if (!ret) is31->audio_gain_db =3D min(is31->audio_gain_db, - IS31FL319X_AUDIO_GAIN_DB_MAX); + IS31FL3196_AUDIO_GAIN_DB_MAX); =20 return 0; =20 @@ -285,55 +285,55 @@ static bool is31fl319x_readable_reg(struct device *de= v, unsigned int reg) return false; } =20 -static bool is31fl319x_volatile_reg(struct device *dev, unsigned int reg) +static bool is31fl3196_volatile_reg(struct device *dev, unsigned int reg) { /* volatile registers are not cached */ switch (reg) { - case IS31FL319X_DATA_UPDATE: - case IS31FL319X_TIME_UPDATE: - case IS31FL319X_RESET: + case IS31FL3196_DATA_UPDATE: + case IS31FL3196_TIME_UPDATE: + case IS31FL3196_RESET: return true; /* always write-through */ default: return false; } } =20 -static const struct reg_default is31fl319x_reg_defaults[] =3D { - { IS31FL319X_CONFIG1, 0x00}, - { IS31FL319X_CONFIG2, 0x00}, - { IS31FL319X_PWM(0), 0x00}, - { IS31FL319X_PWM(1), 0x00}, - { IS31FL319X_PWM(2), 0x00}, - { IS31FL319X_PWM(3), 0x00}, - { IS31FL319X_PWM(4), 0x00}, - { IS31FL319X_PWM(5), 0x00}, - { IS31FL319X_PWM(6), 0x00}, - { IS31FL319X_PWM(7), 0x00}, - { IS31FL319X_PWM(8), 0x00}, +static const struct reg_default is31fl3196_reg_defaults[] =3D { + { IS31FL3196_CONFIG1, 0x00}, + { IS31FL3196_CONFIG2, 0x00}, + { IS31FL3196_PWM(0), 0x00}, + { IS31FL3196_PWM(1), 0x00}, + { IS31FL3196_PWM(2), 0x00}, + { IS31FL3196_PWM(3), 0x00}, + { IS31FL3196_PWM(4), 0x00}, + { IS31FL3196_PWM(5), 0x00}, + { IS31FL3196_PWM(6), 0x00}, + { IS31FL3196_PWM(7), 0x00}, + { IS31FL3196_PWM(8), 0x00}, }; =20 -static struct regmap_config regmap_config =3D { +static struct regmap_config is31fl3196_regmap_config =3D { .reg_bits =3D 8, .val_bits =3D 8, - .max_register =3D IS31FL319X_REG_CNT, + .max_register =3D IS31FL3196_REG_CNT, .cache_type =3D REGCACHE_FLAT, .readable_reg =3D is31fl319x_readable_reg, - .volatile_reg =3D is31fl319x_volatile_reg, - .reg_defaults =3D is31fl319x_reg_defaults, - .num_reg_defaults =3D ARRAY_SIZE(is31fl319x_reg_defaults), + .volatile_reg =3D is31fl3196_volatile_reg, + .reg_defaults =3D is31fl3196_reg_defaults, + .num_reg_defaults =3D ARRAY_SIZE(is31fl3196_reg_defaults), }; =20 -static inline int is31fl319x_microamp_to_cs(struct device *dev, u32 microa= mp) +static inline int is31fl3196_microamp_to_cs(struct device *dev, u32 microa= mp) { /* round down to nearest supported value (range check done by caller) */ - u32 step =3D microamp / IS31FL319X_CURRENT_STEP; + u32 step =3D microamp / IS31FL3196_CURRENT_uA_STEP; =20 - return ((IS31FL319X_CONFIG2_CS_STEP_REF - step) & - IS31FL319X_CONFIG2_CS_MASK) << - IS31FL319X_CONFIG2_CS_SHIFT; /* CS encoding */ + return ((IS31FL3196_CONFIG2_CS_STEP_REF - step) & + IS31FL3196_CONFIG2_CS_MASK) << + IS31FL3196_CONFIG2_CS_SHIFT; /* CS encoding */ } =20 -static inline int is31fl319x_db_to_gain(u32 dezibel) +static inline int is31fl3196_db_to_gain(u32 dezibel) { /* round down to nearest supported value (range check done by caller) */ - return dezibel / IS31FL319X_AUDIO_GAIN_DB_STEP; + return dezibel / IS31FL3196_AUDIO_GAIN_DB_STEP; } =20 static int is31fl319x_probe(struct i2c_client *client, @@ -343,7 +343,7 @@ static int is31fl319x_probe(struct i2c_client *client, struct device *dev =3D &client->dev; int err; int i =3D 0; - u32 aggregated_led_microamp =3D IS31FL319X_CURRENT_MAX; + u32 aggregated_led_microamp =3D IS31FL3196_CURRENT_uA_MAX; =20 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) return -EIO; @@ -365,7 +365,7 @@ static int is31fl319x_probe(struct i2c_client *client, } =20 is31->client =3D client; - is31->regmap =3D devm_regmap_init_i2c(client, ®map_config); + is31->regmap =3D devm_regmap_init_i2c(client, &is31fl3196_regmap_config); if (IS_ERR(is31->regmap)) { dev_err(&client->dev, "failed to allocate register map\n"); err =3D PTR_ERR(is31->regmap); @@ -375,7 +375,7 @@ static int is31fl319x_probe(struct i2c_client *client, i2c_set_clientdata(client, is31); =20 /* check for write-reply from chip (we can't read any registers) */ - err =3D regmap_write(is31->regmap, IS31FL319X_RESET, 0x00); + err =3D regmap_write(is31->regmap, IS31FL3196_RESET, 0x00); if (err < 0) { dev_err(&client->dev, "no response from chip write: err =3D %d\n", err); @@ -393,9 +393,9 @@ static int is31fl319x_probe(struct i2c_client *client, is31->leds[i].max_microamp < aggregated_led_microamp) aggregated_led_microamp =3D is31->leds[i].max_microamp; =20 - regmap_write(is31->regmap, IS31FL319X_CONFIG2, - is31fl319x_microamp_to_cs(dev, aggregated_led_microamp) | - is31fl319x_db_to_gain(is31->audio_gain_db)); + regmap_write(is31->regmap, IS31FL3196_CONFIG2, + is31fl3196_microamp_to_cs(dev, aggregated_led_microamp) | + is31fl3196_db_to_gain(is31->audio_gain_db)); =20 for (i =3D 0; i < is31->cdef->num_leds; i++) { struct is31fl319x_led *led =3D &is31->leds[i]; @@ -404,7 +404,7 @@ static int is31fl319x_probe(struct i2c_client *client, continue; =20 led->chip =3D is31; - led->cdev.brightness_set_blocking =3D is31fl319x_brightness_set; + led->cdev.brightness_set_blocking =3D is31fl3196_brightness_set; =20 err =3D devm_led_classdev_register(&client->dev, &led->cdev); if (err < 0) --=20 2.35.3 From nobody Sun Apr 19 05:33:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F0F1C43334 for ; Tue, 5 Jul 2022 16:32:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232958AbiGEQco (ORCPT ); Tue, 5 Jul 2022 12:32:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57894 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231402AbiGEQcZ (ORCPT ); Tue, 5 Jul 2022 12:32:25 -0400 Received: from msg-1.mailo.com (msg-1.mailo.com [213.182.54.11]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D627F19C2D; Tue, 5 Jul 2022 09:32:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=mailoo.org; s=mailo; t=1657038729; bh=ztaaBaWuitkk7GyVZectXvgJzvGHDlO1hPVyLRy98jY=; h=X-EA-Auth:From:To:Cc:Subject:Date:Message-Id:X-Mailer:In-Reply-To: References:MIME-Version:Content-Transfer-Encoding; b=hIefyUMjIxeiIRhw1q1QV8536VfpYYDD/tj0ZB8X0XuHxxrQAWytlwhzYvTkHXx6u dgIY2kQ0ql/VjZsltRs1AxL+5QYAhCcS8LsBfOflFa7jJrNSRPMPq1SQeXl4PRRsqh wCvr4l7Cf7/FukKH6wY0ARkPY0nKMXjKCvWukWlw= Received: by b-2.in.mailobj.net [192.168.90.12] with ESMTP via [213.182.55.207] Tue, 5 Jul 2022 18:32:09 +0200 (CEST) X-EA-Auth: XUqWf1/L6Det3MD6UI1MqrR1WW4UBTSj46myxy5657n2LQNzdcf+6SHtnVclxI26ubshCKWLTdCRtl4pbY6p76HxDKn+k5iMnPGLumzpxL4= From: Vincent Knecht To: Pavel Machek , Rob Herring , Krzysztof Kozlowski , Vincent Knecht , linux-leds@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, hns@goldelico.com Subject: [PATCH v3 5/6] leds: is31fl319x: Move chipset-specific values in chipdef struct Date: Tue, 5 Jul 2022 18:31:33 +0200 Message-Id: <20220705163136.2278662-6-vincent.knecht@mailoo.org> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220705163136.2278662-1-vincent.knecht@mailoo.org> References: <20220705163136.2278662-1-vincent.knecht@mailoo.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Allow setting chips' specifics in chipdef struct by adding fields for: - the reset register address - a pointer to a regmap_config struct - a pointer to a brightness_set function - current default, min and max values - a boolean to distinguish 319{0,1,3} and 319{6,9} chips and use those fields in places where distinction has to be made. The fields for 319{0,1,3} still point to 319{6,9} values. No functional change. Signed-off-by: Vincent Knecht --- drivers/leds/leds-is31fl319x.c | 206 ++++++++++++++++++++------------- 1 file changed, 123 insertions(+), 83 deletions(-) diff --git a/drivers/leds/leds-is31fl319x.c b/drivers/leds/leds-is31fl319x.c index e6fe0a8bc8d5..0bccee6da5bf 100644 --- a/drivers/leds/leds-is31fl319x.c +++ b/drivers/leds/leds-is31fl319x.c @@ -78,38 +78,56 @@ struct is31fl319x_chip { =20 struct is31fl319x_chipdef { int num_leds; + u8 reset_reg; + const struct regmap_config *is31fl319x_regmap_config; + int (*brightness_set)(struct led_classdev *cdev, enum led_brightness brig= htness); + u32 current_default; + u32 current_min; + u32 current_max; + bool is_3196or3199; }; =20 -static const struct is31fl319x_chipdef is31fl3190_cdef =3D { - .num_leds =3D 1, -}; - -static const struct is31fl319x_chipdef is31fl3193_cdef =3D { - .num_leds =3D 3, -}; +static bool is31fl319x_readable_reg(struct device *dev, unsigned int reg) +{ /* we have no readable registers */ + return false; +} =20 -static const struct is31fl319x_chipdef is31fl3196_cdef =3D { - .num_leds =3D 6, -}; +static bool is31fl3196_volatile_reg(struct device *dev, unsigned int reg) +{ /* volatile registers are not cached */ + switch (reg) { + case IS31FL3196_DATA_UPDATE: + case IS31FL3196_TIME_UPDATE: + case IS31FL3196_RESET: + return true; /* always write-through */ + default: + return false; + } +} =20 -static const struct is31fl319x_chipdef is31fl3199_cdef =3D { - .num_leds =3D 9, +static const struct reg_default is31fl3196_reg_defaults[] =3D { + { IS31FL3196_CONFIG1, 0x00}, + { IS31FL3196_CONFIG2, 0x00}, + { IS31FL3196_PWM(0), 0x00}, + { IS31FL3196_PWM(1), 0x00}, + { IS31FL3196_PWM(2), 0x00}, + { IS31FL3196_PWM(3), 0x00}, + { IS31FL3196_PWM(4), 0x00}, + { IS31FL3196_PWM(5), 0x00}, + { IS31FL3196_PWM(6), 0x00}, + { IS31FL3196_PWM(7), 0x00}, + { IS31FL3196_PWM(8), 0x00}, }; =20 -static const struct of_device_id of_is31fl319x_match[] =3D { - { .compatible =3D "issi,is31fl3190", .data =3D &is31fl3190_cdef, }, - { .compatible =3D "issi,is31fl3191", .data =3D &is31fl3190_cdef, }, - { .compatible =3D "issi,is31fl3193", .data =3D &is31fl3193_cdef, }, - { .compatible =3D "issi,is31fl3196", .data =3D &is31fl3196_cdef, }, - { .compatible =3D "issi,is31fl3199", .data =3D &is31fl3199_cdef, }, - { .compatible =3D "si-en,sn3190", .data =3D &is31fl3190_cdef, }, - { .compatible =3D "si-en,sn3191", .data =3D &is31fl3190_cdef, }, - { .compatible =3D "si-en,sn3193", .data =3D &is31fl3193_cdef, }, - { .compatible =3D "si-en,sn3196", .data =3D &is31fl3196_cdef, }, - { .compatible =3D "si-en,sn3199", .data =3D &is31fl3199_cdef, }, - { } +static struct regmap_config is31fl3196_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + .max_register =3D IS31FL3196_REG_CNT, + .cache_type =3D REGCACHE_FLAT, + .readable_reg =3D is31fl319x_readable_reg, + .volatile_reg =3D is31fl3196_volatile_reg, + .reg_defaults =3D is31fl3196_reg_defaults, + .num_reg_defaults =3D ARRAY_SIZE(is31fl3196_reg_defaults), }; -MODULE_DEVICE_TABLE(of, of_is31fl319x_match); =20 static int is31fl3196_brightness_set(struct led_classdev *cdev, enum led_brightness brightness) @@ -175,9 +193,69 @@ static int is31fl3196_brightness_set(struct led_classd= ev *cdev, return ret; } =20 +static const struct is31fl319x_chipdef is31fl3190_cdef =3D { + .num_leds =3D 1, + .reset_reg =3D IS31FL3196_RESET, + .is31fl319x_regmap_config =3D &is31fl3196_regmap_config, + .brightness_set =3D is31fl3196_brightness_set, + .current_default =3D IS31FL3196_CURRENT_uA_DEFAULT, + .current_min =3D IS31FL3196_CURRENT_uA_MIN, + .current_max =3D IS31FL3196_CURRENT_uA_MAX, + .is_3196or3199 =3D true, +}; + +static const struct is31fl319x_chipdef is31fl3193_cdef =3D { + .num_leds =3D 3, + .reset_reg =3D IS31FL3196_RESET, + .is31fl319x_regmap_config =3D &is31fl3196_regmap_config, + .brightness_set =3D is31fl3196_brightness_set, + .current_default =3D IS31FL3196_CURRENT_uA_DEFAULT, + .current_min =3D IS31FL3196_CURRENT_uA_MIN, + .current_max =3D IS31FL3196_CURRENT_uA_MAX, + .is_3196or3199 =3D true, +}; + +static const struct is31fl319x_chipdef is31fl3196_cdef =3D { + .num_leds =3D 6, + .reset_reg =3D IS31FL3196_RESET, + .is31fl319x_regmap_config =3D &is31fl3196_regmap_config, + .brightness_set =3D is31fl3196_brightness_set, + .current_default =3D IS31FL3196_CURRENT_uA_DEFAULT, + .current_min =3D IS31FL3196_CURRENT_uA_MIN, + .current_max =3D IS31FL3196_CURRENT_uA_MAX, + .is_3196or3199 =3D true, +}; + +static const struct is31fl319x_chipdef is31fl3199_cdef =3D { + .num_leds =3D 9, + .reset_reg =3D IS31FL3196_RESET, + .is31fl319x_regmap_config =3D &is31fl3196_regmap_config, + .brightness_set =3D is31fl3196_brightness_set, + .current_default =3D IS31FL3196_CURRENT_uA_DEFAULT, + .current_min =3D IS31FL3196_CURRENT_uA_MIN, + .current_max =3D IS31FL3196_CURRENT_uA_MAX, + .is_3196or3199 =3D true, +}; + +static const struct of_device_id of_is31fl319x_match[] =3D { + { .compatible =3D "issi,is31fl3190", .data =3D &is31fl3190_cdef, }, + { .compatible =3D "issi,is31fl3191", .data =3D &is31fl3190_cdef, }, + { .compatible =3D "issi,is31fl3193", .data =3D &is31fl3193_cdef, }, + { .compatible =3D "issi,is31fl3196", .data =3D &is31fl3196_cdef, }, + { .compatible =3D "issi,is31fl3199", .data =3D &is31fl3199_cdef, }, + { .compatible =3D "si-en,sn3190", .data =3D &is31fl3190_cdef, }, + { .compatible =3D "si-en,sn3191", .data =3D &is31fl3190_cdef, }, + { .compatible =3D "si-en,sn3193", .data =3D &is31fl3193_cdef, }, + { .compatible =3D "si-en,sn3196", .data =3D &is31fl3196_cdef, }, + { .compatible =3D "si-en,sn3199", .data =3D &is31fl3199_cdef, }, + { } +}; +MODULE_DEVICE_TABLE(of, of_is31fl319x_match); + static int is31fl319x_parse_child_dt(const struct device *dev, const struct device_node *child, - struct is31fl319x_led *led) + struct is31fl319x_led *led, + struct is31fl319x_chip *is31) { struct led_classdev *cdev =3D &led->cdev; int ret; @@ -190,14 +268,14 @@ static int is31fl319x_parse_child_dt(const struct dev= ice *dev, if (ret < 0 && ret !=3D -EINVAL) /* is optional */ return ret; =20 - led->max_microamp =3D IS31FL3196_CURRENT_uA_DEFAULT; + led->max_microamp =3D is31->cdef->current_default; ret =3D of_property_read_u32(child, "led-max-microamp", &led->max_microamp); if (!ret) { - if (led->max_microamp < IS31FL3196_CURRENT_uA_MIN) + if (led->max_microamp < is31->cdef->current_min) return -EINVAL; /* not supported */ led->max_microamp =3D min(led->max_microamp, - IS31FL3196_CURRENT_uA_MAX); + is31->cdef->current_max); } =20 return 0; @@ -258,7 +336,7 @@ static int is31fl319x_parse_dt(struct device *dev, goto put_child_node; } =20 - ret =3D is31fl319x_parse_child_dt(dev, child, led); + ret =3D is31fl319x_parse_child_dt(dev, child, led, is31); if (ret) { dev_err(dev, "led %u DT parsing failed\n", reg); goto put_child_node; @@ -268,10 +346,12 @@ static int is31fl319x_parse_dt(struct device *dev, } =20 is31->audio_gain_db =3D 0; - ret =3D of_property_read_u32(np, "audio-gain-db", &is31->audio_gain_db); - if (!ret) - is31->audio_gain_db =3D min(is31->audio_gain_db, - IS31FL3196_AUDIO_GAIN_DB_MAX); + if (is31->cdef->is_3196or3199) { + ret =3D of_property_read_u32(np, "audio-gain-db", &is31->audio_gain_db); + if (!ret) + is31->audio_gain_db =3D min(is31->audio_gain_db, + IS31FL3196_AUDIO_GAIN_DB_MAX); + } =20 return 0; =20 @@ -280,48 +360,6 @@ static int is31fl319x_parse_dt(struct device *dev, return ret; } =20 -static bool is31fl319x_readable_reg(struct device *dev, unsigned int reg) -{ /* we have no readable registers */ - return false; -} - -static bool is31fl3196_volatile_reg(struct device *dev, unsigned int reg) -{ /* volatile registers are not cached */ - switch (reg) { - case IS31FL3196_DATA_UPDATE: - case IS31FL3196_TIME_UPDATE: - case IS31FL3196_RESET: - return true; /* always write-through */ - default: - return false; - } -} - -static const struct reg_default is31fl3196_reg_defaults[] =3D { - { IS31FL3196_CONFIG1, 0x00}, - { IS31FL3196_CONFIG2, 0x00}, - { IS31FL3196_PWM(0), 0x00}, - { IS31FL3196_PWM(1), 0x00}, - { IS31FL3196_PWM(2), 0x00}, - { IS31FL3196_PWM(3), 0x00}, - { IS31FL3196_PWM(4), 0x00}, - { IS31FL3196_PWM(5), 0x00}, - { IS31FL3196_PWM(6), 0x00}, - { IS31FL3196_PWM(7), 0x00}, - { IS31FL3196_PWM(8), 0x00}, -}; - -static struct regmap_config is31fl3196_regmap_config =3D { - .reg_bits =3D 8, - .val_bits =3D 8, - .max_register =3D IS31FL3196_REG_CNT, - .cache_type =3D REGCACHE_FLAT, - .readable_reg =3D is31fl319x_readable_reg, - .volatile_reg =3D is31fl3196_volatile_reg, - .reg_defaults =3D is31fl3196_reg_defaults, - .num_reg_defaults =3D ARRAY_SIZE(is31fl3196_reg_defaults), -}; - static inline int is31fl3196_microamp_to_cs(struct device *dev, u32 microa= mp) { /* round down to nearest supported value (range check done by caller) */ u32 step =3D microamp / IS31FL3196_CURRENT_uA_STEP; @@ -343,7 +381,7 @@ static int is31fl319x_probe(struct i2c_client *client, struct device *dev =3D &client->dev; int err; int i =3D 0; - u32 aggregated_led_microamp =3D IS31FL3196_CURRENT_uA_MAX; + u32 aggregated_led_microamp; =20 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) return -EIO; @@ -365,7 +403,7 @@ static int is31fl319x_probe(struct i2c_client *client, } =20 is31->client =3D client; - is31->regmap =3D devm_regmap_init_i2c(client, &is31fl3196_regmap_config); + is31->regmap =3D devm_regmap_init_i2c(client, is31->cdef->is31fl319x_regm= ap_config); if (IS_ERR(is31->regmap)) { dev_err(&client->dev, "failed to allocate register map\n"); err =3D PTR_ERR(is31->regmap); @@ -375,7 +413,7 @@ static int is31fl319x_probe(struct i2c_client *client, i2c_set_clientdata(client, is31); =20 /* check for write-reply from chip (we can't read any registers) */ - err =3D regmap_write(is31->regmap, IS31FL3196_RESET, 0x00); + err =3D regmap_write(is31->regmap, is31->cdef->reset_reg, 0x00); if (err < 0) { dev_err(&client->dev, "no response from chip write: err =3D %d\n", err); @@ -388,14 +426,16 @@ static int is31fl319x_probe(struct i2c_client *client, * But the chip does not allow to limit individual LEDs. * So we take minimum from all subnodes for safety of hardware. */ + aggregated_led_microamp =3D is31->cdef->current_max; for (i =3D 0; i < is31->cdef->num_leds; i++) if (is31->leds[i].configured && is31->leds[i].max_microamp < aggregated_led_microamp) aggregated_led_microamp =3D is31->leds[i].max_microamp; =20 - regmap_write(is31->regmap, IS31FL3196_CONFIG2, - is31fl3196_microamp_to_cs(dev, aggregated_led_microamp) | - is31fl3196_db_to_gain(is31->audio_gain_db)); + if (is31->cdef->is_3196or3199) + regmap_write(is31->regmap, IS31FL3196_CONFIG2, + is31fl3196_microamp_to_cs(dev, aggregated_led_microamp) | + is31fl3196_db_to_gain(is31->audio_gain_db)); =20 for (i =3D 0; i < is31->cdef->num_leds; i++) { struct is31fl319x_led *led =3D &is31->leds[i]; @@ -404,7 +444,7 @@ static int is31fl319x_probe(struct i2c_client *client, continue; =20 led->chip =3D is31; - led->cdev.brightness_set_blocking =3D is31fl3196_brightness_set; + led->cdev.brightness_set_blocking =3D is31->cdef->brightness_set; =20 err =3D devm_led_classdev_register(&client->dev, &led->cdev); if (err < 0) --=20 2.35.3 From nobody Sun Apr 19 05:33:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A73ACCA47B for ; Tue, 5 Jul 2022 16:32:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232802AbiGEQce (ORCPT ); Tue, 5 Jul 2022 12:32:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229898AbiGEQcX (ORCPT ); Tue, 5 Jul 2022 12:32:23 -0400 Received: from msg-4.mailo.com (ip-15.mailobj.net [213.182.54.15]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4CF4718E2E; Tue, 5 Jul 2022 09:32:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=mailoo.org; s=mailo; t=1657038732; bh=RKhdztkVWyT4atc5MTvAv90wpnq6bY7cIg/axjaqrfg=; h=X-EA-Auth:From:To:Cc:Subject:Date:Message-Id:X-Mailer:In-Reply-To: References:MIME-Version:Content-Type:Content-Transfer-Encoding; b=kPgJwgUFJSL4zV/uRY9CRxfZBSzN0xDUxpG/3n+yOS/aewo0WPE9Tx3rzM+rz0mn8 fvaDbZDIP8iJvb6/qs/I54qUpxSkEjDA7z3rD5QmeWJ/SiOR2EwEGfakyjf0sdpENd K3auboWckba5m6dAgPosOMKHfHIgjAgAcMFBPFVk= Received: by b-2.in.mailobj.net [192.168.90.12] with ESMTP via [213.182.55.207] Tue, 5 Jul 2022 18:32:12 +0200 (CEST) X-EA-Auth: UDlQf6ihyuOZ2QkyQ9EkTay9nh9P7MHXkcGxKC7xnF/1ALohT8S5zWPQ/xlOwKkIrjqde15DMJzBlxlUUoJFFm+6LSXtTcUX4cNCTXaX4+A= From: Vincent Knecht To: Pavel Machek , Rob Herring , Krzysztof Kozlowski , Vincent Knecht , linux-leds@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, hns@goldelico.com Subject: [PATCH v3 6/6] leds: is31fl319x: Add support for is31fl319{0,1,3} chips Date: Tue, 5 Jul 2022 18:31:34 +0200 Message-Id: <20220705163136.2278662-7-vincent.knecht@mailoo.org> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220705163136.2278662-1-vincent.knecht@mailoo.org> References: <20220705163136.2278662-1-vincent.knecht@mailoo.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Set specific chipset structs values for is31fl319{0,1,3} so that those chips can actually work. Datasheets: https://lumissil.com/assets/pdf/core/IS31FL3190_DS.pdf https://lumissil.com/assets/pdf/core/IS31FL3191_DS.pdf https://lumissil.com/assets/pdf/core/IS31FL3193_DS.pdf https://lumissil.com/assets/pdf/core/IS31FL3196_DS.pdf https://lumissil.com/assets/pdf/core/IS31FL3199_DS.pdf Signed-off-by: Vincent Knecht --- drivers/leds/leds-is31fl319x.c | 164 ++++++++++++++++++++++++++++++--- 1 file changed, 150 insertions(+), 14 deletions(-) diff --git a/drivers/leds/leds-is31fl319x.c b/drivers/leds/leds-is31fl319x.c index 0bccee6da5bf..911edcf973c1 100644 --- a/drivers/leds/leds-is31fl319x.c +++ b/drivers/leds/leds-is31fl319x.c @@ -21,6 +21,31 @@ =20 /* register numbers */ #define IS31FL319X_SHUTDOWN 0x00 + +/* registers for 3190, 3191 and 3193 */ +#define IS31FL3190_BREATHING 0x01 +#define IS31FL3190_LEDMODE 0x02 +#define IS31FL3190_CURRENT 0x03 +#define IS31FL3190_PWM(channel) (0x04 + channel) +#define IS31FL3190_DATA_UPDATE 0x07 +#define IS31FL3190_T0(channel) (0x0a + channel) +#define IS31FL3190_T1T2(channel) (0x10 + channel) +#define IS31FL3190_T3T4(channel) (0x16 + channel) +#define IS31FL3190_TIME_UPDATE 0x1c +#define IS31FL3190_LEDCONTROL 0x1d +#define IS31FL3190_RESET 0x2f + +#define IS31FL3190_CURRENT_uA_MIN 5000 +#define IS31FL3190_CURRENT_uA_DEFAULT 42000 +#define IS31FL3190_CURRENT_uA_MAX 42000 +#define IS31FL3190_CURRENT_MASK GENMASK(4, 2) +#define IS31FL3190_CURRENT_5_mA 0x02 +#define IS31FL3190_CURRENT_10_mA 0x01 +#define IS31FL3190_CURRENT_17dot5_mA 0x04 +#define IS31FL3190_CURRENT_30_mA 0x03 +#define IS31FL3190_CURRENT_42_mA 0x00 + +/* registers for 3196 and 3199 */ #define IS31FL3196_CTRL1 0x01 #define IS31FL3196_CTRL2 0x02 #define IS31FL3196_CONFIG1 0x03 @@ -92,6 +117,37 @@ static bool is31fl319x_readable_reg(struct device *dev,= unsigned int reg) return false; } =20 +static bool is31fl3190_volatile_reg(struct device *dev, unsigned int reg) +{ /* volatile registers are not cached */ + switch (reg) { + case IS31FL3190_DATA_UPDATE: + case IS31FL3190_TIME_UPDATE: + case IS31FL3190_RESET: + return true; /* always write-through */ + default: + return false; + } +} + +static const struct reg_default is31fl3190_reg_defaults[] =3D { + { IS31FL3190_LEDMODE, 0x00}, + { IS31FL3190_CURRENT, 0x00}, + { IS31FL3190_PWM(0), 0x00}, + { IS31FL3190_PWM(1), 0x00}, + { IS31FL3190_PWM(2), 0x00}, +}; + +static struct regmap_config is31fl3190_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + .max_register =3D IS31FL3190_RESET, + .cache_type =3D REGCACHE_FLAT, + .readable_reg =3D is31fl319x_readable_reg, + .volatile_reg =3D is31fl3190_volatile_reg, + .reg_defaults =3D is31fl3190_reg_defaults, + .num_reg_defaults =3D ARRAY_SIZE(is31fl3190_reg_defaults), +}; + static bool is31fl3196_volatile_reg(struct device *dev, unsigned int reg) { /* volatile registers are not cached */ switch (reg) { @@ -129,6 +185,63 @@ static struct regmap_config is31fl3196_regmap_config = =3D { .num_reg_defaults =3D ARRAY_SIZE(is31fl3196_reg_defaults), }; =20 +static int is31fl3190_brightness_set(struct led_classdev *cdev, + enum led_brightness brightness) +{ + struct is31fl319x_led *led =3D container_of(cdev, struct is31fl319x_led, + cdev); + struct is31fl319x_chip *is31 =3D led->chip; + int chan =3D led - is31->leds; + int ret; + int i; + u8 ctrl =3D 0; + + dev_dbg(&is31->client->dev, "%s %d: %d\n", __func__, chan, brightness); + + mutex_lock(&is31->lock); + + /* update PWM register */ + ret =3D regmap_write(is31->regmap, IS31FL3190_PWM(chan), brightness); + if (ret < 0) + goto out; + + /* read current brightness of all PWM channels */ + for (i =3D 0; i < is31->cdef->num_leds; i++) { + unsigned int pwm_value; + bool on; + + /* + * since neither cdev nor the chip can provide + * the current setting, we read from the regmap cache + */ + + ret =3D regmap_read(is31->regmap, IS31FL3190_PWM(i), &pwm_value); + dev_dbg(&is31->client->dev, "%s read %d: ret=3D%d: %d\n", + __func__, i, ret, pwm_value); + on =3D ret >=3D 0 && pwm_value > LED_OFF; + + ctrl |=3D on << i; + } + + if (ctrl > 0) { + dev_dbg(&is31->client->dev, "power up %02x\n", ctrl); + regmap_write(is31->regmap, IS31FL3190_LEDCONTROL, ctrl); + /* update PWMs */ + regmap_write(is31->regmap, IS31FL3190_DATA_UPDATE, 0x00); + /* enable chip from shut down and enable all channels */ + ret =3D regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x20); + } else { + dev_dbg(&is31->client->dev, "power down\n"); + /* shut down (no need to clear LEDCONTROL) */ + ret =3D regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01); + } + +out: + mutex_unlock(&is31->lock); + + return ret; +} + static int is31fl3196_brightness_set(struct led_classdev *cdev, enum led_brightness brightness) { @@ -195,24 +308,24 @@ static int is31fl3196_brightness_set(struct led_class= dev *cdev, =20 static const struct is31fl319x_chipdef is31fl3190_cdef =3D { .num_leds =3D 1, - .reset_reg =3D IS31FL3196_RESET, - .is31fl319x_regmap_config =3D &is31fl3196_regmap_config, - .brightness_set =3D is31fl3196_brightness_set, - .current_default =3D IS31FL3196_CURRENT_uA_DEFAULT, - .current_min =3D IS31FL3196_CURRENT_uA_MIN, - .current_max =3D IS31FL3196_CURRENT_uA_MAX, - .is_3196or3199 =3D true, + .reset_reg =3D IS31FL3190_RESET, + .is31fl319x_regmap_config =3D &is31fl3190_regmap_config, + .brightness_set =3D is31fl3190_brightness_set, + .current_default =3D IS31FL3190_CURRENT_uA_DEFAULT, + .current_min =3D IS31FL3190_CURRENT_uA_MIN, + .current_max =3D IS31FL3190_CURRENT_uA_MAX, + .is_3196or3199 =3D false, }; =20 static const struct is31fl319x_chipdef is31fl3193_cdef =3D { .num_leds =3D 3, - .reset_reg =3D IS31FL3196_RESET, - .is31fl319x_regmap_config =3D &is31fl3196_regmap_config, - .brightness_set =3D is31fl3196_brightness_set, - .current_default =3D IS31FL3196_CURRENT_uA_DEFAULT, - .current_min =3D IS31FL3196_CURRENT_uA_MIN, - .current_max =3D IS31FL3196_CURRENT_uA_MAX, - .is_3196or3199 =3D true, + .reset_reg =3D IS31FL3190_RESET, + .is31fl319x_regmap_config =3D &is31fl3190_regmap_config, + .brightness_set =3D is31fl3190_brightness_set, + .current_default =3D IS31FL3190_CURRENT_uA_DEFAULT, + .current_min =3D IS31FL3190_CURRENT_uA_MIN, + .current_max =3D IS31FL3190_CURRENT_uA_MAX, + .is_3196or3199 =3D false, }; =20 static const struct is31fl319x_chipdef is31fl3196_cdef =3D { @@ -360,6 +473,26 @@ static int is31fl319x_parse_dt(struct device *dev, return ret; } =20 +static inline int is31fl3190_microamp_to_cs(struct device *dev, u32 microa= mp) +{ + switch (microamp) { + case 5000: + return IS31FL3190_CURRENT_5_mA; + case 10000: + return IS31FL3190_CURRENT_10_mA; + case 17500: + return IS31FL3190_CURRENT_17dot5_mA; + case 30000: + return IS31FL3190_CURRENT_30_mA; + case 42000: + return IS31FL3190_CURRENT_42_mA; + default: + dev_warn(dev, "Unsupported current value: %d, using 5000 =C2=B5A!\n", mi= croamp); + } + + return IS31FL3190_CURRENT_5_mA; +} + static inline int is31fl3196_microamp_to_cs(struct device *dev, u32 microa= mp) { /* round down to nearest supported value (range check done by caller) */ u32 step =3D microamp / IS31FL3196_CURRENT_uA_STEP; @@ -436,6 +569,9 @@ static int is31fl319x_probe(struct i2c_client *client, regmap_write(is31->regmap, IS31FL3196_CONFIG2, is31fl3196_microamp_to_cs(dev, aggregated_led_microamp) | is31fl3196_db_to_gain(is31->audio_gain_db)); + else + regmap_update_bits(is31->regmap, IS31FL3190_CURRENT, IS31FL3190_CURRENT_= MASK, + is31fl3190_microamp_to_cs(dev, aggregated_led_microamp)); =20 for (i =3D 0; i < is31->cdef->num_leds; i++) { struct is31fl319x_led *led =3D &is31->leds[i]; --=20 2.35.3