From nobody Sun Sep 22 01:28:11 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E46AFC433EF for ; Mon, 4 Jul 2022 10:14:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232208AbiGDKN7 (ORCPT ); Mon, 4 Jul 2022 06:13:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234139AbiGDKNh (ORCPT ); Mon, 4 Jul 2022 06:13:37 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 945B65F45; Mon, 4 Jul 2022 03:13:35 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 7284B660198B; Mon, 4 Jul 2022 11:13:32 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929613; bh=aIRVjxgh50yrvKyt4e7eJcHDqjbTTHFlBzjr1qnTw6A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=O/gHay+lqe6oazOi3MCt9gz3UgNMh4CML/Cpv8M0eFmbT5WXQqsEQI1Un8mjNXEeD 8sXkJ3dNZHUftu3Gin4BjTZH5HRJ4gCj9gQmTDmCucAmPwa6g07a3qKEW3Gi7i0j22 tAqrbrCv+Cf8UDENtumeYdDkLlTptZMu6D3uzHfOk4l//W7jzLYEK5dUEI3xb2yuUu HdCV8t5XAv7rUu7AqpcUuDVz/56FEJvSo8aj8wIz/Y8wMFEsBMo/PUzkvjKK1GCVej KXvJqSVIsca3A3ncvO7mqIjDMMKYfzKET37arcqVo1qZaIbMi03AKjF8ls/TpTJ8T1 NT4sNwXC7zzSw== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 05/11] arm64: dts: mediatek: cherry: Add support for internal eMMC storage Date: Mon, 4 Jul 2022 12:13:15 +0200 Message-Id: <20220704101321.44835-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add mtk-sd controller and pin configuration to enable the internal eMMC storage: now it is possible to mount a rootfs located at the internal storage. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: N=C3=ADcolas F. R. A. Prado --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index c9b2c7246ce1..3cbdc918f547 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -9,6 +9,7 @@ =20 / { aliases { + mmc0 =3D &mmc0; serial0 =3D &uart0; }; =20 @@ -89,6 +90,26 @@ ppvar_sys: regulator-ppvar-sys { }; }; =20 +&mmc0 { + status =3D "okay"; + + bus-width =3D <8>; + cap-mmc-highspeed; + cap-mmc-hw-reset; + hs400-ds-delay =3D <0x14c11>; + max-frequency =3D <200000000>; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + no-sdio; + no-sd; + non-removable; + pinctrl-names =3D "default", "state_uhs"; + pinctrl-0 =3D <&mmc0_pins_default>; + pinctrl-1 =3D <&mmc0_pins_uhs>; + vmmc-supply =3D <&mt6359_vemc_1_ldo_reg>; + vqmmc-supply =3D <&mt6359_vufs_ldo_reg>; +}; + /* for CPU-L */ &mt6359_vcore_buck_reg { regulator-always-on; @@ -125,6 +146,72 @@ &mt6359_vufs_ldo_reg { regulator-always-on; }; =20 +&pio { + mmc0_pins_default: mmc0-default-pins { + pins-cmd-dat { + pinmux =3D , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength =3D <6>; + bias-pull-up =3D ; + }; + + pins-clk { + pinmux =3D ; + drive-strength =3D <6>; + bias-pull-down =3D ; + }; + + pins-rst { + pinmux =3D ; + drive-strength =3D <6>; + bias-pull-up =3D ; + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + pins-cmd-dat { + pinmux =3D , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength =3D <8>; + bias-pull-up =3D ; + }; + + pins-clk { + pinmux =3D ; + drive-strength =3D <8>; + bias-pull-down =3D ; + }; + + pins-ds { + pinmux =3D ; + drive-strength =3D <8>; + bias-pull-down =3D ; + }; + + pins-rst { + pinmux =3D ; + drive-strength =3D <8>; + bias-pull-up =3D ; + }; + }; +}; + &pmic { interrupts-extended =3D <&pio 222 IRQ_TYPE_LEVEL_HIGH>; }; --=20 2.35.1