From nobody Sun Sep 22 01:56:28 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60DAAC433EF for ; Mon, 4 Jul 2022 10:13:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234237AbiGDKNq (ORCPT ); Mon, 4 Jul 2022 06:13:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234130AbiGDKNg (ORCPT ); Mon, 4 Jul 2022 06:13:36 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 77064D10F; Mon, 4 Jul 2022 03:13:32 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6FBA1660198A; Mon, 4 Jul 2022 11:13:30 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929611; bh=bu6B2YcCIYZ6plXvXeLwW+wNbSXcWtCS4ehbelYtopY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OlURyK2nUwWnjHb+c0TDCo2Tfh/NkIrknxQVESdZEZRZygtrTNuim9574RnoXze9j P+8Yhaz04DubblJ0OyS6xMm4CbT4TdDx0FG4HH3Yf8UAVSU64uWnVprqq+qRPil/EF WxpMJThx59EwQr5PWZqyknUi2EnL+rkbGwhFonE7Vyx+9TmN+V9NRH2/9oXTPM0FlF frbWAEPFKVm12lGDuYhfO1bMNZ7bcZSiwXH4Uv/JyP+7n4IGpRAFCHCMZ4obh8mvk+ kSO6E9qVh4BsVmR/Mqn3WXNKAEnsSSTX0iaempFszgrXo27xo2lNzPnvxDv2rCcmt6 Er0+PtHviP8+w== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 03/11] arm64: dts: mediatek: cherry: Add platform regulators layout and config Date: Mon, 4 Jul 2022 12:13:13 +0200 Message-Id: <20220704101321.44835-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the regulators layout for this platform, including the basic power rails controlled by the EC (and/or always on). Moreover, include the MT6359 PMIC devicetree and add some configuration for its regulators, essential to keep the machine alive after booting. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: N=C3=ADcolas F. R. A. Prado --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 7406d7bbf725..f4c3d33843a7 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -5,6 +5,7 @@ =20 #include #include "mt8195.dtsi" +#include "mt6359.dtsi" =20 / { aliases { @@ -19,6 +20,109 @@ memory@40000000 { device_type =3D "memory"; reg =3D <0 0x40000000 0 0x80000000>; }; + + /* system wide LDO 3.3V power rail */ + pp3300_z5: regulator-pp3300-ldo-z5 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_ldo_z5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* separately switched 3.3V power rail */ + pp3300_s3: regulator-pp3300-s3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_s3"; + /* automatically sequenced by PMIC EXT_PMIC_EN2 */ + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&pp3300_z2>; + }; + + /* system wide 3.3V power rail */ + pp3300_z2: regulator-pp3300-z2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_z2"; + /* EN pin tied to pp4200_z2, which is controlled by EC */ + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* system wide 4.2V power rail */ + pp4200_z2: regulator-pp4200-z2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp4200_z2"; + /* controlled by EC */ + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <4200000>; + regulator-max-microvolt =3D <4200000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* system wide switching 5.0V power rail */ + pp5000_s5: regulator-pp5000-s5 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp5000_s5"; + /* controlled by EC */ + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* system wide semi-regulated power rail from battery or USB */ + ppvar_sys: regulator-ppvar-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "ppvar_sys"; + regulator-always-on; + regulator-boot-on; + }; +}; + +/* for CPU-L */ +&mt6359_vcore_buck_reg { + regulator-always-on; +}; + +/* for CORE */ +&mt6359_vgpu11_buck_reg { + regulator-always-on; +}; + +&mt6359_vgpu11_sshub_buck_reg { + regulator-always-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <550000>; +}; + +/* for CORE SRAM */ +&mt6359_vpu_buck_reg { + regulator-always-on; +}; + +&mt6359_vrf12_ldo_reg { + regulator-always-on; +}; + +/* for GPU SRAM */ +&mt6359_vsram_others_ldo_reg { + regulator-always-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; +}; + +&mt6359_vufs_ldo_reg { + regulator-always-on; }; =20 &uart0 { --=20 2.35.1