From nobody Thu Nov 14 09:16:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86888C43334 for ; Mon, 4 Jul 2022 10:13:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234229AbiGDKNn (ORCPT ); Mon, 4 Jul 2022 06:13:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234026AbiGDKNe (ORCPT ); Mon, 4 Jul 2022 06:13:34 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C0D2CE2B; Mon, 4 Jul 2022 03:13:30 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6D2886601985; Mon, 4 Jul 2022 11:13:28 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929609; bh=COlKO70QWsoa/nV38XX44C/HzQIHC3dMfXYf/7vorrg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Fqc9C9BJFA04iAdl7pBqkmyCxtr4ULPvQnE/DfGCilzYzVtInFMcHnN4iJQwhVueh zeuIQD4VRmA+hWPtR3TWuo5QNwOCixPbaECw4LIdu9YjRVxKWmRcd8sZGrcP4rIGkJ DlvQtQg3+Kuj3J62dXW1KHfkiruecy/hSWWd8O7M/4pj5XilgvGCLXngBoWl7uGHSl 58B1Rd0y0qa21+jkp/k+D9sjXu2ydkZq834H96gM2EdZS34OWAmU7KD16mkLtiSEse Xujd2wGDToz6iCPArnrAGdJbQGOovXKJcgW1yM8Hpfliwmid0mTclP9gGCJkq5f/Ki mkud4a+iAd1Lg== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 01/11] dt-bindings: arm: mediatek: Add MT8195 Cherry Tomato Chromebooks Date: Mon, 4 Jul 2022 12:13:11 +0200 Message-Id: <20220704101321.44835-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Document board compatibles for the MT8195 Cherry platform's Tomato Chromebooks, at the time of writing composed of four revisions (r1, r2, r3-r4). Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski --- Note for Krzysztof: I had to add the model number to the description in here, but I wasn't sure whether I should've kept your Reviewed-by tag or not. Since I was in doubt, I decided to not keep it just to be on the safe side. Documentation/devicetree/bindings/arm/mediatek.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Document= ation/devicetree/bindings/arm/mediatek.yaml index dd6c6e8011f9..07c0ea94e850 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -144,6 +144,19 @@ properties: - const: google,spherion-rev0 - const: google,spherion - const: mediatek,mt8192 + - description: Acer Tomato (Acer Chromebook Spin 513 CP513-2H) + items: + - enum: + - google,tomato-rev2 + - google,tomato-rev1 + - const: google,tomato + - const: mediatek,mt8195 + - description: Acer Tomato rev3 - 4 (Acer Chromebook Spin 513 CP513-= 2H) + items: + - const: google,tomato-rev4 + - const: google,tomato-rev3 + - const: google,tomato + - const: mediatek,mt8195 - items: - enum: - mediatek,mt8186-evb --=20 2.35.1 From nobody Thu Nov 14 09:16:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27D45C43334 for ; Mon, 4 Jul 2022 10:13:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233955AbiGDKNs (ORCPT ); Mon, 4 Jul 2022 06:13:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234129AbiGDKNg (ORCPT ); Mon, 4 Jul 2022 06:13:36 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CAA2B6273; Mon, 4 Jul 2022 03:13:31 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6E3996601986; Mon, 4 Jul 2022 11:13:29 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929610; bh=MZXqAw3inkd2Bf7UjSU992h3+DyFZZUUFlEaEabCqU8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hmANSMatG2H0ioFo3PQRwGwn8mfwgia6TsA46ZeprjEJd85P0X2lIeGVYoRO5IRaK AzmGAPi+f6U3VrAgxc21C0EjyXx1olG93oWzEGioNQy9lH35VWQk7zvC5H9hLzGvqf bwM/d1B1nyf6EN9Y6X8r+lJrhcytkjRK9t6LhE505PPVTDLOQA4DKxq2EBoBT8PKq+ W1V/E5Kac1qArLV6GrmAux0if1MN7s5nZI6dU7kGm9tcGGkOHyT+/FcyzrwAIS+oK9 4YQVlG/Vap9ecFeXRXbcQujGCGqGaODdH7sxdDviLPRqWCHQkAvWeL4UFaURObiuIK NZibRMwziq6nQ== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 02/11] arm64: dts: mediatek: Introduce MT8195 Cherry platform's Tomato Date: Mon, 4 Jul 2022 12:13:12 +0200 Message-Id: <20220704101321.44835-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Introduce the MT8195 Cherry Chromebook platform, including three revisions of Cherry Tomato boards. This basic configuration allows to boot Linux on all board revisions and get a serial console from a ramdisk. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/Makefile | 3 +++ .../dts/mediatek/mt8195-cherry-tomato-r1.dts | 11 ++++++++ .../dts/mediatek/mt8195-cherry-tomato-r2.dts | 11 ++++++++ .../dts/mediatek/mt8195-cherry-tomato-r3.dts | 12 +++++++++ .../boot/dts/mediatek/mt8195-cherry.dtsi | 26 +++++++++++++++++++ 5 files changed, 63 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/me= diatek/Makefile index 50a2c58c5f56..0b12035a4f08 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -39,6 +39,9 @@ dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-krane-sku17= 6.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-pumpkin.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8186-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8192-evb.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-cherry-tomato-r1.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-cherry-tomato-r2.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-cherry-tomato-r3.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-demo.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8516-pumpkin.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts b/arc= h/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts new file mode 100644 index 000000000000..7ca344ccc225 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + */ +/dts-v1/; +#include "mt8195-cherry.dtsi" + +/ { + model =3D "Acer Tomato (rev1) board"; + compatible =3D "google,tomato-rev1", "google,tomato", "mediatek,mt8195"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts b/arc= h/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts new file mode 100644 index 000000000000..38c27d704ccc --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + */ +/dts-v1/; +#include "mt8195-cherry.dtsi" + +/ { + model =3D "Acer Tomato (rev2) board"; + compatible =3D "google,tomato-rev2", "google,tomato", "mediatek,mt8195"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts b/arc= h/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts new file mode 100644 index 000000000000..6ecde88c30ef --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + */ +/dts-v1/; +#include "mt8195-cherry.dtsi" + +/ { + model =3D "Acer Tomato (rev3 - 4) board"; + compatible =3D "google,tomato-rev4", "google,tomato-rev3", + "google,tomato", "mediatek,mt8195"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi new file mode 100644 index 000000000000..7406d7bbf725 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + */ + +#include +#include "mt8195.dtsi" + +/ { + aliases { + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + memory@40000000 { + device_type =3D "memory"; + reg =3D <0 0x40000000 0 0x80000000>; + }; +}; + +&uart0 { + status =3D "okay"; +}; --=20 2.35.1 From nobody Thu Nov 14 09:16:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60DAAC433EF for ; Mon, 4 Jul 2022 10:13:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234237AbiGDKNq (ORCPT ); Mon, 4 Jul 2022 06:13:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234130AbiGDKNg (ORCPT ); Mon, 4 Jul 2022 06:13:36 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 77064D10F; Mon, 4 Jul 2022 03:13:32 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6FBA1660198A; Mon, 4 Jul 2022 11:13:30 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929611; bh=bu6B2YcCIYZ6plXvXeLwW+wNbSXcWtCS4ehbelYtopY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OlURyK2nUwWnjHb+c0TDCo2Tfh/NkIrknxQVESdZEZRZygtrTNuim9574RnoXze9j P+8Yhaz04DubblJ0OyS6xMm4CbT4TdDx0FG4HH3Yf8UAVSU64uWnVprqq+qRPil/EF WxpMJThx59EwQr5PWZqyknUi2EnL+rkbGwhFonE7Vyx+9TmN+V9NRH2/9oXTPM0FlF frbWAEPFKVm12lGDuYhfO1bMNZ7bcZSiwXH4Uv/JyP+7n4IGpRAFCHCMZ4obh8mvk+ kSO6E9qVh4BsVmR/Mqn3WXNKAEnsSSTX0iaempFszgrXo27xo2lNzPnvxDv2rCcmt6 Er0+PtHviP8+w== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 03/11] arm64: dts: mediatek: cherry: Add platform regulators layout and config Date: Mon, 4 Jul 2022 12:13:13 +0200 Message-Id: <20220704101321.44835-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the regulators layout for this platform, including the basic power rails controlled by the EC (and/or always on). Moreover, include the MT6359 PMIC devicetree and add some configuration for its regulators, essential to keep the machine alive after booting. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: N=C3=ADcolas F. R. A. Prado --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 7406d7bbf725..f4c3d33843a7 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -5,6 +5,7 @@ =20 #include #include "mt8195.dtsi" +#include "mt6359.dtsi" =20 / { aliases { @@ -19,6 +20,109 @@ memory@40000000 { device_type =3D "memory"; reg =3D <0 0x40000000 0 0x80000000>; }; + + /* system wide LDO 3.3V power rail */ + pp3300_z5: regulator-pp3300-ldo-z5 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_ldo_z5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* separately switched 3.3V power rail */ + pp3300_s3: regulator-pp3300-s3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_s3"; + /* automatically sequenced by PMIC EXT_PMIC_EN2 */ + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&pp3300_z2>; + }; + + /* system wide 3.3V power rail */ + pp3300_z2: regulator-pp3300-z2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_z2"; + /* EN pin tied to pp4200_z2, which is controlled by EC */ + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* system wide 4.2V power rail */ + pp4200_z2: regulator-pp4200-z2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp4200_z2"; + /* controlled by EC */ + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <4200000>; + regulator-max-microvolt =3D <4200000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* system wide switching 5.0V power rail */ + pp5000_s5: regulator-pp5000-s5 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp5000_s5"; + /* controlled by EC */ + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* system wide semi-regulated power rail from battery or USB */ + ppvar_sys: regulator-ppvar-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "ppvar_sys"; + regulator-always-on; + regulator-boot-on; + }; +}; + +/* for CPU-L */ +&mt6359_vcore_buck_reg { + regulator-always-on; +}; + +/* for CORE */ +&mt6359_vgpu11_buck_reg { + regulator-always-on; +}; + +&mt6359_vgpu11_sshub_buck_reg { + regulator-always-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <550000>; +}; + +/* for CORE SRAM */ +&mt6359_vpu_buck_reg { + regulator-always-on; +}; + +&mt6359_vrf12_ldo_reg { + regulator-always-on; +}; + +/* for GPU SRAM */ +&mt6359_vsram_others_ldo_reg { + regulator-always-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; +}; + +&mt6359_vufs_ldo_reg { + regulator-always-on; }; =20 &uart0 { --=20 2.35.1 From nobody Thu Nov 14 09:16:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5D0FC433EF for ; Mon, 4 Jul 2022 10:13:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234269AbiGDKNv (ORCPT ); Mon, 4 Jul 2022 06:13:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234133AbiGDKNg (ORCPT ); Mon, 4 Jul 2022 06:13:36 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64204D118; Mon, 4 Jul 2022 03:13:33 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 7385E6601987; Mon, 4 Jul 2022 11:13:31 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929612; bh=azfRUajLehhOzGnLULDEtSHP3GPvrxv+785YAlxnK7I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n6A0C0D2vXP+5IAI507YPfLlJVbGEyy4r082aiCTeyut90b95oezKbxkDZdjAt0O2 PV/oh7rAus0+v454hyvkT5VkGVi36SSNhYCEkTmLOqDX0GLeXD1rP9M8p/ORw5ePW1 6iseI16FjRNAdPTXSj00TQIH2rezVsPj73xK+ec503KxRfh3sOaN9SZCpvdPvh4/BX eOz5pWsicDJxwh1iON1Bs8Fckz2ccYikEOnq/40N5NdW14W0vZ9vKSSy7xlsX7V385 /upX+s2uoLhg8QIantBkPEx7G4BPIBhCuq2V6v7EH5wu9x1RmPv8rt6VyVVhHp227q 8g6JRD4WiyOEg== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 04/11] arm64: dts: mediatek: cherry: Assign interrupt line to MT6359 PMIC Date: Mon, 4 Jul 2022 12:13:14 +0200 Message-Id: <20220704101321.44835-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To allow MT6359 peripherals to trigger interrupts and the driver to safely handle them, assign the right interrupt line for the Cherry platform to the MT6359 PMIC node. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: N=C3=ADcolas F. R. A. Prado --- arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index f4c3d33843a7..c9b2c7246ce1 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -125,6 +125,10 @@ &mt6359_vufs_ldo_reg { regulator-always-on; }; =20 +&pmic { + interrupts-extended =3D <&pio 222 IRQ_TYPE_LEVEL_HIGH>; +}; + &uart0 { status =3D "okay"; }; --=20 2.35.1 From nobody Thu Nov 14 09:16:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E46AFC433EF for ; Mon, 4 Jul 2022 10:14:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232208AbiGDKN7 (ORCPT ); Mon, 4 Jul 2022 06:13:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234139AbiGDKNh (ORCPT ); Mon, 4 Jul 2022 06:13:37 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 945B65F45; Mon, 4 Jul 2022 03:13:35 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 7284B660198B; Mon, 4 Jul 2022 11:13:32 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929613; bh=aIRVjxgh50yrvKyt4e7eJcHDqjbTTHFlBzjr1qnTw6A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=O/gHay+lqe6oazOi3MCt9gz3UgNMh4CML/Cpv8M0eFmbT5WXQqsEQI1Un8mjNXEeD 8sXkJ3dNZHUftu3Gin4BjTZH5HRJ4gCj9gQmTDmCucAmPwa6g07a3qKEW3Gi7i0j22 tAqrbrCv+Cf8UDENtumeYdDkLlTptZMu6D3uzHfOk4l//W7jzLYEK5dUEI3xb2yuUu HdCV8t5XAv7rUu7AqpcUuDVz/56FEJvSo8aj8wIz/Y8wMFEsBMo/PUzkvjKK1GCVej KXvJqSVIsca3A3ncvO7mqIjDMMKYfzKET37arcqVo1qZaIbMi03AKjF8ls/TpTJ8T1 NT4sNwXC7zzSw== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 05/11] arm64: dts: mediatek: cherry: Add support for internal eMMC storage Date: Mon, 4 Jul 2022 12:13:15 +0200 Message-Id: <20220704101321.44835-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add mtk-sd controller and pin configuration to enable the internal eMMC storage: now it is possible to mount a rootfs located at the internal storage. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: N=C3=ADcolas F. R. A. Prado --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index c9b2c7246ce1..3cbdc918f547 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -9,6 +9,7 @@ =20 / { aliases { + mmc0 =3D &mmc0; serial0 =3D &uart0; }; =20 @@ -89,6 +90,26 @@ ppvar_sys: regulator-ppvar-sys { }; }; =20 +&mmc0 { + status =3D "okay"; + + bus-width =3D <8>; + cap-mmc-highspeed; + cap-mmc-hw-reset; + hs400-ds-delay =3D <0x14c11>; + max-frequency =3D <200000000>; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + no-sdio; + no-sd; + non-removable; + pinctrl-names =3D "default", "state_uhs"; + pinctrl-0 =3D <&mmc0_pins_default>; + pinctrl-1 =3D <&mmc0_pins_uhs>; + vmmc-supply =3D <&mt6359_vemc_1_ldo_reg>; + vqmmc-supply =3D <&mt6359_vufs_ldo_reg>; +}; + /* for CPU-L */ &mt6359_vcore_buck_reg { regulator-always-on; @@ -125,6 +146,72 @@ &mt6359_vufs_ldo_reg { regulator-always-on; }; =20 +&pio { + mmc0_pins_default: mmc0-default-pins { + pins-cmd-dat { + pinmux =3D , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength =3D <6>; + bias-pull-up =3D ; + }; + + pins-clk { + pinmux =3D ; + drive-strength =3D <6>; + bias-pull-down =3D ; + }; + + pins-rst { + pinmux =3D ; + drive-strength =3D <6>; + bias-pull-up =3D ; + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + pins-cmd-dat { + pinmux =3D , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength =3D <8>; + bias-pull-up =3D ; + }; + + pins-clk { + pinmux =3D ; + drive-strength =3D <8>; + bias-pull-down =3D ; + }; + + pins-ds { + pinmux =3D ; + drive-strength =3D <8>; + bias-pull-down =3D ; + }; + + pins-rst { + pinmux =3D ; + drive-strength =3D <8>; + bias-pull-up =3D ; + }; + }; +}; + &pmic { interrupts-extended =3D <&pio 222 IRQ_TYPE_LEVEL_HIGH>; }; --=20 2.35.1 From nobody Thu Nov 14 09:16:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9E81CCA47F for ; Mon, 4 Jul 2022 10:14:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230424AbiGDKOC (ORCPT ); Mon, 4 Jul 2022 06:14:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234144AbiGDKNh (ORCPT ); Mon, 4 Jul 2022 06:13:37 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 975725F6C; Mon, 4 Jul 2022 03:13:35 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 74E8C660198C; Mon, 4 Jul 2022 11:13:33 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929614; bh=+wgg9fECSidyt7EvVYtqUuVYu+1qkCxpiZ5rUy1KYKA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QyuyNGJWkM8GRlMLFsbv0nzoZgrqQ5784x8yG6mYhtKVIE2/D3ADp5nUT3vNbNCN+ 546cM7ZAhjTZWeP1Fu6nw3HW0YGxtbTLLPNbAUcRRzEFYtEO/y873dH3RYcQ4dWumN 8DGg9BkZt/Ihs07qGseHoHSQNaZ26SBDPxtqYnwqO7s5GfifW3GOJO21C7HaKgcFwI qyv2EXQ5IwG6aRpp7JV/tcrnVg4tL1MPOX/ofVW59irVBUJsJ8LYpQELRd115MRnp5 FYc7Oiwi7TTYxERFg5YPWU1CMCONZ25MpB3U6yvPjNtfEd0yoo6bjqH32BC4TCV26e RvE0QUYDDe43A== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 06/11] arm64: dts: mediatek: cherry: Document gpios and add default pin config Date: Mon, 4 Jul 2022 12:13:16 +0200 Message-Id: <20220704101321.44835-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add gpio-line-names to document GPIO names and add the default basic pin configuration to allow lower power operation by setting appropriate state on the unused pins. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: N=C3=ADcolas F. R. A. Prado --- .../dts/mediatek/mt8195-cherry-tomato-r2.dts | 20 ++ .../dts/mediatek/mt8195-cherry-tomato-r3.dts | 20 ++ .../boot/dts/mediatek/mt8195-cherry.dtsi | 199 ++++++++++++++++++ 3 files changed, 239 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts b/arc= h/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts index 38c27d704ccc..eb80f23273aa 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts @@ -9,3 +9,23 @@ / { model =3D "Acer Tomato (rev2) board"; compatible =3D "google,tomato-rev2", "google,tomato", "mediatek,mt8195"; }; + +&pio_default { + pins-low-power-hdmi-disable { + pinmux =3D , + , + , + , + ; + input-enable; + bias-pull-down; + }; + + pins-low-power-pcie0-disable { + pinmux =3D , + , + ; + input-enable; + bias-pull-down; + }; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts b/arc= h/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts index 6ecde88c30ef..f9cdda07da88 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts @@ -10,3 +10,23 @@ / { compatible =3D "google,tomato-rev4", "google,tomato-rev3", "google,tomato", "mediatek,mt8195"; }; + +&pio_default { + pins-low-power-hdmi-disable { + pinmux =3D , + , + , + , + ; + input-enable; + bias-pull-down; + }; + + pins-low-power-pcie0-disable { + pinmux =3D , + , + ; + input-enable; + bias-pull-down; + }; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 3cbdc918f547..f00565466328 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -147,6 +147,161 @@ &mt6359_vufs_ldo_reg { }; =20 &pio { + mediatek,rsel-resistance-in-si-unit; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pio_default>; + + /* 144 lines */ + gpio-line-names =3D + "I2S_SPKR_MCLK", + "I2S_SPKR_DATAIN", + "I2S_SPKR_LRCK", + "I2S_SPKR_BCLK", + "EC_AP_INT_ODL", + /* + * AP_FLASH_WP_L is crossystem ABI. Schematics + * call it AP_FLASH_WP_ODL. + */ + "AP_FLASH_WP_L", + "TCHPAD_INT_ODL", + "EDP_HPD_1V8", + "AP_I2C_CAM_SDA", + "AP_I2C_CAM_SCL", + "AP_I2C_TCHPAD_SDA_1V8", + "AP_I2C_TCHPAD_SCL_1V8", + "AP_I2C_AUD_SDA", + "AP_I2C_AUD_SCL", + "AP_I2C_TPM_SDA_1V8", + "AP_I2C_TPM_SCL_1V8", + "AP_I2C_TCHSCR_SDA_1V8", + "AP_I2C_TCHSCR_SCL_1V8", + "EC_AP_HPD_OD", + "", + "PCIE_NVME_RST_L", + "PCIE_NVME_CLKREQ_ODL", + "PCIE_RST_1V8_L", + "PCIE_CLKREQ_1V8_ODL", + "PCIE_WAKE_1V8_ODL", + "CLK_24M_CAM0", + "CAM1_SEN_EN", + "AP_I2C_PWR_SCL_1V8", + "AP_I2C_PWR_SDA_1V8", + "AP_I2C_MISC_SCL", + "AP_I2C_MISC_SDA", + "EN_PP5000_HDMI_X", + "AP_HDMITX_HTPLG", + "", + "AP_HDMITX_SCL_1V8", + "AP_HDMITX_SDA_1V8", + "AP_RTC_CLK32K", + "AP_EC_WATCHDOG_L", + "SRCLKENA0", + "SRCLKENA1", + "PWRAP_SPI0_CS_L", + "PWRAP_SPI0_CK", + "PWRAP_SPI0_MOSI", + "PWRAP_SPI0_MISO", + "SPMI_SCL", + "SPMI_SDA", + "", + "", + "", + "I2S_HP_DATAIN", + "I2S_HP_MCLK", + "I2S_HP_BCK", + "I2S_HP_LRCK", + "I2S_HP_DATAOUT", + "SD_CD_ODL", + "EN_PP3300_DISP_X", + "TCHSCR_RST_1V8_L", + "TCHSCR_REPORT_DISABLE", + "EN_PP3300_WLAN_X", + "BT_KILL_1V8_L", + "I2S_SPKR_DATAOUT", + "WIFI_KILL_1V8_L", + "BEEP_ON", + "SCP_I2C_SENSOR_SCL_1V8", + "SCP_I2C_SENSOR_SDA_1V8", + "", + "", + "", + "", + "AUD_CLK_MOSI", + "AUD_SYNC_MOSI", + "AUD_DAT_MOSI0", + "AUD_DAT_MOSI1", + "AUD_DAT_MISO0", + "AUD_DAT_MISO1", + "AUD_DAT_MISO2", + "SCP_VREQ_VAO", + "AP_SPI_GSC_TPM_CLK", + "AP_SPI_GSC_TPM_MOSI", + "AP_SPI_GSC_TPM_CS_L", + "AP_SPI_GSC_TPM_MISO", + "EN_PP1000_CAM_X", + "AP_EDP_BKLTEN", + "", + "USB3_HUB_RST_L", + "", + "WLAN_ALERT_ODL", + "EC_IN_RW_ODL", + "GSC_AP_INT_ODL", + "HP_INT_ODL", + "CAM0_RST_L", + "CAM1_RST_L", + "TCHSCR_INT_1V8_L", + "CAM1_DET_L", + "RST_ALC1011_L", + "", + "", + "BL_PWM_1V8", + "UART_AP_TX_DBG_RX", + "UART_DBG_TX_AP_RX", + "EN_SPKR", + "AP_EC_WARM_RST_REQ", + "UART_SCP_TX_DBGCON_RX", + "UART_DBGCON_TX_SCP_RX", + "", + "", + "KPCOL0", + "", + "MT6315_GPU_INT", + "MT6315_PROC_BC_INT", + "SD_CMD", + "SD_CLK", + "SD_DAT0", + "SD_DAT1", + "SD_DAT2", + "SD_DAT3", + "EMMC_DAT7", + "EMMC_DAT6", + "EMMC_DAT5", + "EMMC_DAT4", + "EMMC_RSTB", + "EMMC_CMD", + "EMMC_CLK", + "EMMC_DAT3", + "EMMC_DAT2", + "EMMC_DAT1", + "EMMC_DAT0", + "EMMC_DSL", + "", + "", + "MT6360_INT_ODL", + "SCP_JTAG0_TRSTN", + "AP_SPI_EC_CS_L", + "AP_SPI_EC_CLK", + "AP_SPI_EC_MOSI", + "AP_SPI_EC_MISO", + "SCP_JTAG0_TMS", + "SCP_JTAG0_TCK", + "SCP_JTAG0_TDO", + "SCP_JTAG0_TDI", + "AP_SPI_FLASH_CS_L", + "AP_SPI_FLASH_CLK", + "AP_SPI_FLASH_MOSI", + "AP_SPI_FLASH_MISO"; + mmc0_pins_default: mmc0-default-pins { pins-cmd-dat { pinmux =3D , @@ -210,6 +365,50 @@ pins-rst { bias-pull-up =3D ; }; }; + + pio_default: pio-default-pins { + pins-wifi-enable { + pinmux =3D ; + output-high; + drive-strength =3D <14>; + }; + + pins-low-power-pd { + pinmux =3D , + , + , + , + , + , + , + , + , + , + ; + input-enable; + bias-pull-down; + }; + + pins-low-power-pupd { + pinmux =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + input-enable; + bias-pull-down =3D ; + }; + }; }; =20 &pmic { --=20 2.35.1 From nobody Thu Nov 14 09:16:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A1EEC433EF for ; Mon, 4 Jul 2022 10:14:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234311AbiGDKOG (ORCPT ); Mon, 4 Jul 2022 06:14:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234151AbiGDKNi (ORCPT ); Mon, 4 Jul 2022 06:13:38 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 75CB5CE2A; Mon, 4 Jul 2022 03:13:36 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 79F60660198D; Mon, 4 Jul 2022 11:13:34 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929615; bh=FHgSrJU3WzqM39AkIrMiTStk5IDquSuk3dITN0i8HE0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fZI0Y2gmu5P3Eq2L8o5RGwZqqX1pUhxTKWLVllEIFsDD9807bWlhEU4XztQ2bsVKw u4n8wodV9IDbeft3QFkRcM1uUEOSmVf4IczSVty0AM6twl+0AprAeKZVaCD3en7w3k u7qXUjBM657dQXvXrinFwiqaT3gwj0PAj0r1mRTjR3o2pQFGVH4him1o4ZIaikXhSj G6ABGEStkczi5SbGnMx8g0PGWxU9EyFU1lAdenuVwThLlrKNF6pGL6+NcEDQZSSTIc Q0yhj7vgRArqGjy372fOeNJ2oJv3HFr1uTw7fTFagSvFxYZ3+AVwJ6h3+HdT+Mb11O mP5iJJHTRzYVA== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 07/11] arm64: dts: mediatek: cherry: Enable I2C and SPI controllers Date: Mon, 4 Jul 2022 12:13:17 +0200 Message-Id: <20220704101321.44835-8-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This platform uses eight I2C controllers and one SPI controller: in preparation for enabling devices attached to these controllers, add basic configuration to enable the busses. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: N=C3=ADcolas F. R. A. Prado --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 148 ++++++++++++++++++ 1 file changed, 148 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index f00565466328..20a4a3a32ab9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -9,6 +9,13 @@ =20 / { aliases { + i2c0 =3D &i2c0; + i2c1 =3D &i2c1; + i2c2 =3D &i2c2; + i2c3 =3D &i2c3; + i2c4 =3D &i2c4; + i2c5 =3D &i2c5; + i2c7 =3D &i2c7; mmc0 =3D &mmc0; serial0 =3D &uart0; }; @@ -90,6 +97,63 @@ ppvar_sys: regulator-ppvar-sys { }; }; =20 +&i2c0 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0_pins>; +}; + +&i2c1 { + status =3D "okay"; + + clock-frequency =3D <400000>; + i2c-scl-internal-delay-ns =3D <12500>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c1_pins>; +}; + +&i2c2 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c2_pins>; +}; + +&i2c3 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c3_pins>; +}; + +&i2c4 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c4_pins>; +}; + +&i2c5 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c5_pins>; +}; + +&i2c7 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c7_pins>; +}; + &mmc0 { status =3D "okay"; =20 @@ -302,6 +366,68 @@ &pio { "AP_SPI_FLASH_MOSI", "AP_SPI_FLASH_MISO"; =20 + i2c0_pins: i2c0-default-pins { + pins-bus { + pinmux =3D , + ; + bias-disable; + drive-strength-microamp =3D <1000>; + }; + }; + + i2c1_pins: i2c1-default-pins { + pins-bus { + pinmux =3D , + ; + bias-pull-up =3D <1000>; + drive-strength-microamp =3D <1000>; + }; + }; + + i2c2_pins: i2c2-default-pins { + pins-bus { + pinmux =3D , + ; + bias-disable; + drive-strength-microamp =3D <1000>; + }; + }; + + i2c3_pins: i2c3-default-pins { + pins-bus { + pinmux =3D , + ; + bias-pull-up =3D <1000>; + drive-strength-microamp =3D <1000>; + }; + }; + + i2c4_pins: i2c4-default-pins { + pins-bus { + pinmux =3D , + ; + bias-pull-up =3D <1000>; + drive-strength =3D <4>; + }; + }; + + i2c5_pins: i2c5-default-pins { + pins-bus { + pinmux =3D , + ; + bias-disable; + drive-strength-microamp =3D <1000>; + }; + }; + + i2c7_pins: i2c7-default-pins { + pins-bus { + pinmux =3D , + ; + bias-disable; + }; + }; + mmc0_pins_default: mmc0-default-pins { pins-cmd-dat { pinmux =3D , @@ -409,12 +535,34 @@ pins-low-power-pupd { bias-pull-down =3D ; }; }; + + spi0_pins: spi0-default-pins { + pins-cs-mosi-clk { + pinmux =3D , + , + ; + bias-disable; + }; + + pins-miso { + pinmux =3D ; + bias-pull-down; + }; + }; }; =20 &pmic { interrupts-extended =3D <&pio 222 IRQ_TYPE_LEVEL_HIGH>; }; =20 +&spi0 { + status =3D "okay"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spi0_pins>; + mediatek,pad-select =3D <0>; +}; + &uart0 { status =3D "okay"; }; --=20 2.35.1 From nobody Thu Nov 14 09:16:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75D87C43334 for ; Mon, 4 Jul 2022 10:14:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234319AbiGDKOL (ORCPT ); Mon, 4 Jul 2022 06:14:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234158AbiGDKNi (ORCPT ); Mon, 4 Jul 2022 06:13:38 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 75354CE2E; Mon, 4 Jul 2022 03:13:37 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 7D66F66017F7; Mon, 4 Jul 2022 11:13:35 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929616; bh=Uny8EAV7GcwYYEBS06gASsjFwmXHUY5/gKfjVQ6IThs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AxAXfGrtTmOPgixovjTav8w5OaniqIxuDNFoENTxcmvpnrHRD+OQ/U+t2e4MGs4Kd Sf2odbj9t3iM5uMnwplgihE1rPJGa83IZ67hb/4XZnc8LvtcsGfM4YUP/4+XIjtJHE 1fKZU8GwJ8NnD/OlKiU//s61mXz83c5hxPEAar3K7Vb3+zB03/9NQWy0Yt4H23BA2t +MRT8+KwzOcdHAgj7mDmPSptU7Hm7gN11KnSEXIo4x01q7LVbAF4fQM0hFX5CfVcZC 3NthdRT8xp8iuAuxF+FZblkJT62QS+hm4TTBh+AX3ftLvwvPId5AzsTcYL+yLpJK4N +yeOGs87DuyBQ== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 08/11] arm64: dts: mediatek: cherry: Enable T-PHYs and USB XHCI controllers Date: Mon, 4 Jul 2022 12:13:18 +0200 Message-Id: <20220704101321.44835-9-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add USB functionality by enabling the required PHYs and the XHCI controllers. This enables all of the supported USB ports on the Cherry boards. Please note that u3phy1 also enables u3port1, which is configured to be a PCI-Express PHY for the second PCIe controller that is found on the MT8195 SoC, which will be enabled in a later commit. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: N=C3=ADcolas F. R. A. Prado --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 20a4a3a32ab9..f68d8ff05b4d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -95,6 +95,15 @@ ppvar_sys: regulator-ppvar-sys { regulator-always-on; regulator-boot-on; }; + + usb_vbus: regulator-5v0-usb-vbus { + compatible =3D "regulator-fixed"; + regulator-name =3D "usb-vbus"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + enable-active-high; + regulator-always-on; + }; }; =20 &i2c0 { @@ -563,6 +572,52 @@ &spi0 { mediatek,pad-select =3D <0>; }; =20 +&u3phy0 { + status =3D "okay"; +}; + +&u3phy1 { + status =3D "okay"; +}; + +&u3phy2 { + status =3D "okay"; +}; + +&u3phy3 { + status =3D "okay"; +}; + &uart0 { status =3D "okay"; }; + +&xhci0 { + status =3D "okay"; + + vusb33-supply =3D <&mt6359_vusb_ldo_reg>; + vbus-supply =3D <&usb_vbus>; +}; + +&xhci1 { + status =3D "okay"; + + vusb33-supply =3D <&mt6359_vusb_ldo_reg>; + vbus-supply =3D <&usb_vbus>; +}; + +&xhci2 { + status =3D "okay"; + + vusb33-supply =3D <&mt6359_vusb_ldo_reg>; + vbus-supply =3D <&usb_vbus>; +}; + +&xhci3 { + status =3D "okay"; + + /* MT7921's USB Bluetooth has issues with USB2 LPM */ + usb2-lpm-disable; + vusb33-supply =3D <&mt6359_vusb_ldo_reg>; + vbus-supply =3D <&usb_vbus>; +}; --=20 2.35.1 From nobody Thu Nov 14 09:16:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E19E2C433EF for ; Mon, 4 Jul 2022 10:14:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234330AbiGDKOP (ORCPT ); Mon, 4 Jul 2022 06:14:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234128AbiGDKNj (ORCPT ); Mon, 4 Jul 2022 06:13:39 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79D0C5F6C; Mon, 4 Jul 2022 03:13:38 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 82A956601985; Mon, 4 Jul 2022 11:13:36 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929617; bh=cYCFPkI9Ox4t3aj8urLrA3wqMRp1z1bSxEhnMr1wUSY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Qdw82P7jQP9czqM3dF4d1Az22FRnHzS7I6TPRQ0FQjKV5s/uF4Xv+aXHBbCZaAVRz M/NPUhNyxdzPxVTQ/aRV/DQImMihGL5z8Te/Mvq80i8vmbkuhZK0CNmHH31wjOX9BO pgUhcNm4BJQ5+LTT5TqQnG7eOseHxMrtBQEfu8VQZaxxDhx85x1s0RId39gPUrJHnn yC5rBUEylLu5ipsxkbI2tx4wxPVqduJRbHTkka5bKOz6qL9xoNd1jpwUriDXqj6U1P jS2jLzyv4ikQjA/Ft/ujbvcjVODGUbaybO0cxc+m69mfFMj7HxKui5b6rDzWhZU6+W xgdT/4tFs0xUw== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 09/11] arm64: dts: mediatek: cherry: Enable MT6360 sub-pmic on I2C7 Date: Mon, 4 Jul 2022 12:13:19 +0200 Message-Id: <20220704101321.44835-10-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org All devices of the Cherry platform have a MT6360 sub-pmic, providing two LDOs. Add the required node to enable the PMIC but without regulators yet, as these will be added in a later commit. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: N=C3=ADcolas F. R. A. Prado --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index f68d8ff05b4d..c07d3ac79f62 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -161,6 +161,18 @@ &i2c7 { clock-frequency =3D <400000>; pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c7_pins>; + + pmic@34 { + #interrupt-cells =3D <1>; + compatible =3D "mediatek,mt6360"; + reg =3D <0x34>; + interrupt-controller; + interrupts-extended =3D <&pio 130 IRQ_TYPE_EDGE_FALLING>; + interrupt-names =3D "IRQB"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&subpmic_default>; + wakeup-source; + }; }; =20 &mmc0 { @@ -558,6 +570,14 @@ pins-miso { bias-pull-down; }; }; + + subpmic_default: subpmic-default-pins { + subpmic_pin_irq: pins-subpmic-int-n { + pinmux =3D ; + input-enable; + bias-pull-up; + }; + }; }; =20 &pmic { --=20 2.35.1 From nobody Thu Nov 14 09:16:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60C76C433EF for ; Mon, 4 Jul 2022 10:14:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234343AbiGDKOU (ORCPT ); Mon, 4 Jul 2022 06:14:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234213AbiGDKNk (ORCPT ); Mon, 4 Jul 2022 06:13:40 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1394D111; Mon, 4 Jul 2022 03:13:39 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 856F06601987; Mon, 4 Jul 2022 11:13:37 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929618; bh=AFxHTqlOyeK1LCtC1MqBh69cl8u6Qrdx+4RcZLmfPmc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E7EdQ3Y5HL0jzjaagGKq2QTQYuaMQoHax6OdhjdlYsNW5q/fERJI7bAs8Hip404j4 dSRxYanPBc5COovVCREukZCJMWyMFo/THiTmjugyDl73ZQ8YU/DK7UmeE612r0hwJG uUVA2sxiJwVoXjOaKGJ5ngR02HxJAZMd2iYuaTeCtMHyJ2H3Y5otZagmSlRqj7xGWu SCJ9dLjfAxVbnRl8yXxYxNBs7C19bPf7dG+64JQLlfrilHpGgCkdmGAWUaF1JRgXJP MXYj0AS8+sM458Xnc3R+GMNB8ZxyRs7GpvdlNk8+u5AbE6tO77mrEUWAA2VSVS63q9 c+w7naWjDdjag== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 10/11] arm64: dts: mediatek: cherry: Enable support for the SPI NOR flash Date: Mon, 4 Jul 2022 12:13:20 +0200 Message-Id: <20220704101321.44835-11-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This platform has a SPI NOR: enable support for it, completing the storage compartment enablement for the entire platform. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: N=C3=ADcolas F. R. A. Prado --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index c07d3ac79f62..2c8b760d0da1 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -231,6 +231,21 @@ &mt6359_vufs_ldo_reg { regulator-always-on; }; =20 +&nor_flash { + status =3D "okay"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&nor_pins_default>; + + flash@0 { + compatible =3D "jedec,spi-nor"; + reg =3D <0>; + spi-max-frequency =3D <52000000>; + spi-rx-bus-width =3D <2>; + spi-tx-bus-width =3D <2>; + }; +}; + &pio { mediatek,rsel-resistance-in-si-unit; pinctrl-names =3D "default"; @@ -513,6 +528,22 @@ pins-rst { }; }; =20 + nor_pins_default: nor-default-pins { + pins-ck-io { + pinmux =3D , + , + ; + drive-strength =3D <6>; + bias-pull-down; + }; + + pins-cs { + pinmux =3D ; + drive-strength =3D <6>; + bias-pull-up; + }; + }; + pio_default: pio-default-pins { pins-wifi-enable { pinmux =3D ; --=20 2.35.1 From nobody Thu Nov 14 09:16:41 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 574F9C433EF for ; Mon, 4 Jul 2022 10:14:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234335AbiGDKOQ (ORCPT ); Mon, 4 Jul 2022 06:14:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233712AbiGDKNl (ORCPT ); Mon, 4 Jul 2022 06:13:41 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 93A9FD11F; Mon, 4 Jul 2022 03:13:40 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 8ACA2660198D; Mon, 4 Jul 2022 11:13:38 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656929619; bh=F4XTdpmeLLBzARBbsr/g15mmfE1S0Zdj681HWBdHZeQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BFRDuScIM3T486D9EEH82Z/qHJcrJPM/Lfi6d7nloU0tYn2zk67XnE6IGPu5Wc++1 dKHIgzZILXIhcrfwlpb/o8irqlQyCIzm4k0sx6XC+zZ/JHu1crgXt3lil6n8074sBB /lDQU5u9uYrR9VzTZoUEuqS0yb3tm6Je5M6BDT9NoL7fd87XJTtFt/+Im/y/JMBbkT FCTDpb8aCdpT/r0Gqqm2OVDokULmlZyOimXDL/i+eu+IrwJrjnrvSyOs3SSFiC8D6f c4s2HFka0bjPcVZ9p9+pwkMaTP8/FJolTVH2io/ERk/0qVHf2Cjtlk3J9y3Ar8WwDf IZstoYHSCp81w== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 11/11] arm64: dts: mediatek: cherry: Add I2C-HID touchscreen on I2C4 Date: Mon, 4 Jul 2022 12:13:21 +0200 Message-Id: <20220704101321.44835-12-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> References: <20220704101321.44835-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This platform carries a HID compatible I2C touchscreen on the i2c4 bus, but it may be at a different address, depending on the board model. Add the node for a touchscreen at 0x10, but enable it only in the final board dts. Signed-off-by: AngeloGioacchino Del Regno --- .../dts/mediatek/mt8195-cherry-tomato-r1.dts | 4 +++ .../dts/mediatek/mt8195-cherry-tomato-r2.dts | 4 +++ .../dts/mediatek/mt8195-cherry-tomato-r3.dts | 4 +++ .../boot/dts/mediatek/mt8195-cherry.dtsi | 28 +++++++++++++++++++ 4 files changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts b/arc= h/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts index 7ca344ccc225..3348ba69ff6c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts @@ -9,3 +9,7 @@ / { model =3D "Acer Tomato (rev1) board"; compatible =3D "google,tomato-rev1", "google,tomato", "mediatek,mt8195"; }; + +&ts_10 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts b/arc= h/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts index eb80f23273aa..4669e9d917f8 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts @@ -29,3 +29,7 @@ pins-low-power-pcie0-disable { bias-pull-down; }; }; + +&ts_10 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts b/arc= h/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts index f9cdda07da88..5021edd02f7c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts @@ -30,3 +30,7 @@ pins-low-power-pcie0-disable { bias-pull-down; }; }; + +&ts_10 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 2c8b760d0da1..fcc600674339 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -145,6 +145,18 @@ &i2c4 { clock-frequency =3D <400000>; pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c4_pins>; + + ts_10: touchscreen@10 { + compatible =3D "hid-over-i2c"; + reg =3D <0x10>; + hid-descr-addr =3D <0x0001>; + interrupts-extended =3D <&pio 92 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&touchscreen_pins>; + post-power-on-delay-ms =3D <10>; + vdd-supply =3D <&pp3300_s3>; + status =3D "disabled"; + }; }; =20 &i2c5 { @@ -609,6 +621,22 @@ subpmic_pin_irq: pins-subpmic-int-n { bias-pull-up; }; }; + + touchscreen_pins: touchscreen-default-pins { + pins-int-n { + pinmux =3D ; + input-enable; + bias-pull-up =3D ; + }; + pins-rst { + pinmux =3D ; + output-high; + }; + pins-report-sw { + pinmux =3D ; + output-low; + }; + }; }; =20 &pmic { --=20 2.35.1