From nobody Sun Apr 19 10:43:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79AC6C43334 for ; Fri, 1 Jul 2022 14:58:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232761AbiGAO6n (ORCPT ); Fri, 1 Jul 2022 10:58:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54224 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230426AbiGAO6i (ORCPT ); Fri, 1 Jul 2022 10:58:38 -0400 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5AB881F630 for ; Fri, 1 Jul 2022 07:58:37 -0700 (PDT) Received: by mail-pl1-x62e.google.com with SMTP id l6so2589928plg.11 for ; Fri, 01 Jul 2022 07:58:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=y95vOAUApepxdfAS6VCO8MeeZD3qR/4xU+0HXt3Q4Pc=; b=PPFEpDRgJRyElvbUXlO/CnhqMUwwV6Pghk11+qPIMMwowcfexUKv1oBSm+0QMl0b+z 1mBEJl2l9TgFiWvEbf/4+Yml6MWZPUmdTS60wjdzprIlHD7sQBY1YrNgYWB2QGALg/A/ p5OljYAFccl9U8043eE/E1ZZpiB4IAL24N11Dhhmp0JaSAZXAOHVHB4wLVFzOj2v+JG9 X4EZJ7P/+PWxsKEcZzf4pnS3DIfR4keP0jq5L9gPs2L9kbn5KzJkfsVXpO0/i9CGtjVX 9L7k5lcgmICyR8vbzJOIqPnmJyrekapLcjPTlSUI72UJ2CgKrW/+hBm8oMAOCPwDDmVH LgEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=y95vOAUApepxdfAS6VCO8MeeZD3qR/4xU+0HXt3Q4Pc=; b=PZiI4JD3hSzNtGavlFScDUIfpBJHlOiwuB3PCacUCTcg1C+SIBUoAEaCnOowBuLcDH +cMwmt2WSv2xCSmqQznPi0v67UZNNRygrFjD7y3z+JoxZfklLHckr/C6y7BcDK+pHZ3h eEHZoTR7sdajhcHT8vWR09GsGtxqcAhllOx35sTH0l+wcFjgKE2ldvV1YkTFgC6M+LMn SFqy0wgEhVhpsrSuw9l2Q7PFbggGVDYRwGteYovtJVaXHHB+71/3RRqsS6qLc9UupT1U /Y9kMMbsoT2wmXgo2mCNaSzBheu1JYGkNutdYc0WQb6SsQkbp6AjryiFJ/dVZfrZ+TIn u1+Q== X-Gm-Message-State: AJIora/d6NRNQwbBUpDCjTcKdWD84KPWGgY5jJDneMxG6wTQtTG1SZHn Oyk28hMA6HBFm2VItJpkmCPICsB5l3QzBA== X-Google-Smtp-Source: AGRyM1vzmrIzZf2BDabs1hjTuSEkiX8S8C1+x6OgqG+TemmvKKhNYWXUJxztzdTtoCkW8xbq3wQfsg== X-Received: by 2002:a17:90a:f8c2:b0:1ec:d690:a269 with SMTP id l2-20020a17090af8c200b001ecd690a269mr17108875pjd.190.1656687516832; Fri, 01 Jul 2022 07:58:36 -0700 (PDT) Received: from localhost.localdomain ([2401:4900:1c5e:e6c0:8e75:c988:f80f:8bec]) by smtp.gmail.com with ESMTPSA id y19-20020a170902e19300b0016b844cd7e9sm9641399pla.115.2022.07.01.07.58.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Jul 2022 07:58:36 -0700 (PDT) From: Bhupesh Sharma To: linux-pm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-kernel@vger.kernel.org, bjorn.andersson@linaro.org, Amit Kucheria , Thara Gopinath , linux-arm-msm@vger.kernel.org Subject: [PATCH 1/3] firmware: qcom_scm: Add support for tsens reinit workaround Date: Fri, 1 Jul 2022 20:28:13 +0530 Message-Id: <20220701145815.2037993-2-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220701145815.2037993-1-bhupesh.sharma@linaro.org> References: <20220701145815.2037993-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Some versions of QCoM tsens controller might enter a 'bad state' while running stability tests causing sensor temperatures/interrupts status to be in an 'invalid' state. It is recommended to re-initialize the tsens controller via trustzone (secure registers) using scm call(s) when that happens. Add support for the same in the qcom_scm driver. Cc: Amit Kucheria Cc: Thara Gopinath Cc: linux-pm@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Bhupesh Sharma --- drivers/firmware/qcom_scm.c | 17 +++++++++++++++++ drivers/firmware/qcom_scm.h | 4 ++++ include/linux/qcom_scm.h | 2 ++ 3 files changed, 23 insertions(+) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 3163660fa8e2..0bc7cc466218 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -796,6 +796,23 @@ int qcom_scm_mem_protect_video_var(u32 cp_start, u32 c= p_size, } EXPORT_SYMBOL(qcom_scm_mem_protect_video_var); =20 +int qcom_scm_tsens_reinit(int *tsens_ret) +{ + unsigned int ret; + struct qcom_scm_desc desc =3D { + .svc =3D QCOM_SCM_SVC_TSENS, + .cmd =3D QCOM_SCM_TSENS_INIT_ID, + }; + struct qcom_scm_res res; + + ret =3D qcom_scm_call(__scm->dev, &desc, &res); + if (tsens_ret) + *tsens_ret =3D res.result[0]; + + return ret; +} +EXPORT_SYMBOL(qcom_scm_tsens_reinit); + static int __qcom_scm_assign_mem(struct device *dev, phys_addr_t mem_regio= n, size_t mem_sz, phys_addr_t src, size_t src_sz, phys_addr_t dest, size_t dest_sz) diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index 0d51eef2472f..495fa00230c7 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -94,6 +94,10 @@ extern int scm_legacy_call(struct device *dev, const str= uct qcom_scm_desc *desc, #define QCOM_SCM_PIL_PAS_IS_SUPPORTED 0x07 #define QCOM_SCM_PIL_PAS_MSS_RESET 0x0a =20 +/* TSENS Services and Function IDs */ +#define QCOM_SCM_SVC_TSENS 0x1E +#define QCOM_SCM_TSENS_INIT_ID 0x5 + #define QCOM_SCM_SVC_IO 0x05 #define QCOM_SCM_IO_READ 0x01 #define QCOM_SCM_IO_WRITE 0x02 diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index f8335644a01a..f8c9eb739df1 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -124,4 +124,6 @@ extern int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 paylo= ad_reg, u32 payload_val, extern int qcom_scm_lmh_profile_change(u32 profile_id); extern bool qcom_scm_lmh_dcvsh_available(void); =20 +extern int qcom_scm_tsens_reinit(int *tsens_ret); + #endif --=20 2.35.3 From nobody Sun Apr 19 10:43:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5929FC43334 for ; Fri, 1 Jul 2022 14:58:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232771AbiGAO6r (ORCPT ); Fri, 1 Jul 2022 10:58:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232683AbiGAO6l (ORCPT ); Fri, 1 Jul 2022 10:58:41 -0400 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 921132252F for ; Fri, 1 Jul 2022 07:58:40 -0700 (PDT) Received: by mail-pj1-x102a.google.com with SMTP id l2so2873348pjf.1 for ; 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charset="utf-8" QCoM sm8150 tsens controller might require re-initialization via trustzone [via scm call(s)] when it enters a 'bad state' causing sensor temperatures/interrupts status to be in an 'invalid' state. Add hooks for the same in the qcom tsens driver which can be used by followup patch(es). Cc: Amit Kucheria Cc: Thara Gopinath Cc: linux-pm@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Bhupesh Sharma --- drivers/thermal/qcom/tsens-v2.c | 11 +++++++++++ drivers/thermal/qcom/tsens.c | 4 ++++ drivers/thermal/qcom/tsens.h | 6 +++++- 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v= 2.c index b293ed32174b..61d38a56d29a 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -101,6 +101,17 @@ struct tsens_plat_data data_tsens_v2 =3D { .fields =3D tsens_v2_regfields, }; =20 +/* For sm8150 tsens, its suggested to monitor the controller health + * periodically and in case an issue is detected to reinit tsens + * controller via trustzone. + */ +struct tsens_plat_data data_tsens_sm8150 =3D { + .ops =3D &ops_generic_v2, + .feat =3D &tsens_v2_feat, + .needs_reinit_wa =3D true, + .fields =3D tsens_v2_regfields, +}; + /* Kept around for backward compatibility with old msm8996.dtsi */ struct tsens_plat_data data_8996 =3D { .num_sensors =3D 13, diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 7963ee33bf75..97f4d4454f20 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -991,6 +991,9 @@ static const struct of_device_id tsens_table[] =3D { }, { .compatible =3D "qcom,msm8996-tsens", .data =3D &data_8996, + }, { + .compatible =3D "qcom,sm8150-tsens", + .data =3D &data_tsens_sm8150, }, { .compatible =3D "qcom,tsens-v1", .data =3D &data_tsens_v1, @@ -1135,6 +1138,7 @@ static int tsens_probe(struct platform_device *pdev) =20 priv->dev =3D dev; priv->num_sensors =3D num_sensors; + priv->needs_reinit_wa =3D data->needs_reinit_wa; priv->ops =3D data->ops; for (i =3D 0; i < priv->num_sensors; i++) { if (data->hw_ids) diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 1471a2c00f15..48a7bda902c1 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -515,6 +515,7 @@ struct tsens_features { * @num_sensors: Number of sensors supported by platform * @ops: operations the tsens instance supports * @hw_ids: Subset of sensors ids supported by platform, if not the first n + * @needs_reinit_wa: tsens controller might need reinit via trustzone * @feat: features of the IP * @fields: bitfield locations */ @@ -522,6 +523,7 @@ struct tsens_plat_data { const u32 num_sensors; const struct tsens_ops *ops; unsigned int *hw_ids; + bool needs_reinit_wa; struct tsens_features *feat; const struct reg_field *fields; }; @@ -544,6 +546,7 @@ struct tsens_context { * @srot_map: pointer to SROT register address space * @tm_offset: deal with old device trees that don't address TM and SROT * address space separately + * @needs_reinit_wa: tsens controller might need reinit via trustzone * @ul_lock: lock while processing upper/lower threshold interrupts * @crit_lock: lock while processing critical threshold interrupts * @rf: array of regmap_fields used to store value of the field @@ -561,6 +564,7 @@ struct tsens_priv { struct regmap *tm_map; struct regmap *srot_map; u32 tm_offset; + bool needs_reinit_wa; =20 /* lock for upper/lower threshold interrupts */ spinlock_t ul_lock; @@ -593,6 +597,6 @@ extern struct tsens_plat_data data_8916, data_8939, dat= a_8974, data_9607; extern struct tsens_plat_data data_tsens_v1, data_8976; =20 /* TSENS v2 targets */ -extern struct tsens_plat_data data_8996, data_tsens_v2; +extern struct tsens_plat_data data_8996, data_tsens_sm8150, data_tsens_v2; =20 #endif /* __QCOM_TSENS_H__ */ --=20 2.35.3 From nobody Sun Apr 19 10:43:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7BA0EC433EF for ; Fri, 1 Jul 2022 14:59:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231529AbiGAO66 (ORCPT ); Fri, 1 Jul 2022 10:58:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231942AbiGAO6p (ORCPT ); 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Fri, 01 Jul 2022 07:58:43 -0700 (PDT) From: Bhupesh Sharma To: linux-pm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-kernel@vger.kernel.org, bjorn.andersson@linaro.org, Amit Kucheria , Thara Gopinath , linux-arm-msm@vger.kernel.org Subject: [PATCH 3/3] thermal: qcom: tsens: Implement re-initialization workaround quirk Date: Fri, 1 Jul 2022 20:28:15 +0530 Message-Id: <20220701145815.2037993-4-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220701145815.2037993-1-bhupesh.sharma@linaro.org> References: <20220701145815.2037993-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Since for some QCoM tsens controllers, its suggested to monitor the controller health periodically and in case an issue is detected, to re-initialize the tsens controller via trustzone, add the support for the same in the qcom tsens driver. Note that Once the tsens controller is reset using scm call, all SROT and TM region registers will enter the reset mode. While all the SROT registers will be re-programmed and re-enabled in trustzone prior to the scm call exit, the TM region registers will not re-initialized in trustzone and thus need to be handled by the tsens driver. Cc: Amit Kucheria Cc: Thara Gopinath Cc: linux-pm@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Bhupesh Sharma Reported-by: kernel test robot --- drivers/thermal/qcom/tsens-v2.c | 3 + drivers/thermal/qcom/tsens.c | 237 +++++++++++++++++++++++++++++++- drivers/thermal/qcom/tsens.h | 6 + 3 files changed, 239 insertions(+), 7 deletions(-) diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v= 2.c index 61d38a56d29a..9bb542f16482 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -88,6 +88,9 @@ static const struct reg_field tsens_v2_regfields[MAX_REGF= IELDS] =3D { =20 /* TRDY: 1=3Dready, 0=3Din progress */ [TRDY] =3D REG_FIELD(TM_TRDY_OFF, 0, 0), + + /* FIRST_ROUND_COMPLETE: 1=3Dcomplete, 0=3Dnot complete */ + [FIRST_ROUND_COMPLETE] =3D REG_FIELD(TM_TRDY_OFF, 3, 3), }; =20 static const struct tsens_ops ops_generic_v2 =3D { diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 97f4d4454f20..28d42ae0eb47 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -21,6 +22,8 @@ #include "../thermal_hwmon.h" #include "tsens.h" =20 +LIST_HEAD(tsens_device_list); + /** * struct tsens_irq_data - IRQ status and temperature violations * @up_viol: upper threshold violated @@ -594,19 +597,159 @@ static void tsens_disable_irq(struct tsens_priv *pri= v) regmap_field_write(priv->rf[INT_EN], 0); } =20 +static int tsens_reenable_hw_after_scm(struct tsens_priv *priv) +{ + unsigned long flags; + + spin_lock_irqsave(&priv->ul_lock, flags); + + /* Re-enable watchdog, unmask the bark and + * disable cycle completion monitoring. + */ + regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 1); + regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 0); + regmap_field_write(priv->rf[WDOG_BARK_MASK], 0); + regmap_field_write(priv->rf[CC_MON_MASK], 1); + + /* Re-enable interrupts */ + tsens_enable_irq(priv); + + spin_unlock_irqrestore(&priv->ul_lock, flags); + + return 0; +} + int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp) { - struct tsens_priv *priv =3D s->priv; + struct tsens_priv *priv =3D s->priv, *priv_reinit; int hw_id =3D s->hw_id; u32 temp_idx =3D LAST_TEMP_0 + hw_id; u32 valid_idx =3D VALID_0 + hw_id; u32 valid; - int ret; + int ret, trdy, first_round, tsens_ret, sw_reg; + unsigned long timeout; + static atomic_t in_tsens_reinit; =20 /* VER_0 doesn't have VALID bit */ if (tsens_version(priv) =3D=3D VER_0) goto get_temp; =20 + /* For some tsens controllers, its suggested to + * monitor the controller health periodically + * and in case an issue is detected to reinit + * tsens controller via trustzone. + */ + if (priv->needs_reinit_wa) { + /* First check if TRDY is SET */ + timeout =3D jiffies + usecs_to_jiffies(TIMEOUT_US); + do { + ret =3D regmap_field_read(priv->rf[TRDY], &trdy); + if (ret) + goto err; + if (!trdy) + continue; + } while (time_before(jiffies, timeout)); + + if (!trdy) { + ret =3D regmap_field_read(priv->rf[FIRST_ROUND_COMPLETE], &first_round); + if (ret) + goto err; + + if (!first_round) { + if (atomic_read(&in_tsens_reinit)) { + dev_dbg(priv->dev, "tsens re-init is in progress\n"); + ret =3D -EAGAIN; + goto err; + } + + /* Wait for 2 ms for tsens controller to recover */ + timeout =3D jiffies + msecs_to_jiffies(RESET_TIMEOUT_MS); + do { + ret =3D regmap_field_read(priv->rf[FIRST_ROUND_COMPLETE], + &first_round); + if (ret) + goto err; + + if (first_round) { + dev_dbg(priv->dev, "tsens controller recovered\n"); + goto sensor_read; + } + } while (time_before(jiffies, timeout)); + + /* + * tsens controller did not recover, + * proceed with SCM call to re-init it + */ + if (atomic_read(&in_tsens_reinit)) { + dev_dbg(priv->dev, "tsens re-init is in progress\n"); + ret =3D -EAGAIN; + goto err; + } + + atomic_set(&in_tsens_reinit, 1); + + /* + * Invoke scm call only if SW register write is + * reflecting in controller. Try it for 2 ms. + */ + timeout =3D jiffies + msecs_to_jiffies(RESET_TIMEOUT_MS); + do { + ret =3D regmap_field_write(priv->rf[INT_EN], BIT(2)); + if (ret) + goto err_unset; + + ret =3D regmap_field_read(priv->rf[INT_EN], &sw_reg); + if (ret) + goto err_unset; + + if (!(sw_reg & BIT(2))) + continue; + } while (time_before(jiffies, timeout)); + + if (!(sw_reg & BIT(2))) { + ret =3D -ENOTRECOVERABLE; + goto err_unset; + } + + ret =3D qcom_scm_tsens_reinit(&tsens_ret); + if (ret || tsens_ret) { + dev_err(priv->dev, "tsens reinit scm call failed (%d : %d)\n", + ret, tsens_ret); + if (tsens_ret) + ret =3D -ENOTRECOVERABLE; + + goto err_unset; + } + + /* After the SCM call, we need to re-enable + * the interrupts and also set active threshold + * for each sensor. + */ + list_for_each_entry(priv_reinit, + &tsens_device_list, list) { + ret =3D tsens_reenable_hw_after_scm(priv_reinit); + if (ret) { + dev_err(priv->dev, + "tsens re-enable after scm call failed (%d)\n", + ret); + ret =3D -ENOTRECOVERABLE; + goto err_unset; + } + } + + atomic_set(&in_tsens_reinit, 0); + + /* Notify reinit wa worker */ + list_for_each_entry(priv_reinit, + &tsens_device_list, list) { + queue_work(priv_reinit->reinit_wa_worker, + &priv_reinit->reinit_wa_notify); + } + } + } + } + +sensor_read: /* Valid bit is 0 for 6 AHB clock cycles. * At 19.2MHz, 1 AHB clock is ~60ns. * We should enter this loop very, very rarely. @@ -623,6 +766,12 @@ int get_temp_tsens_valid(const struct tsens_sensor *s,= int *temp) *temp =3D tsens_hw_to_mC(s, temp_idx); =20 return 0; + +err_unset: + atomic_set(&in_tsens_reinit, 0); + +err: + return ret; } =20 int get_temp_common(const struct tsens_sensor *s, int *temp) @@ -860,6 +1009,14 @@ int __init init_common(struct tsens_priv *priv) goto err_put_device; } =20 + priv->rf[FIRST_ROUND_COMPLETE] =3D devm_regmap_field_alloc(dev, + priv->tm_map, + priv->fields[FIRST_ROUND_COMPLETE]); + if (IS_ERR(priv->rf[FIRST_ROUND_COMPLETE])) { + ret =3D PTR_ERR(priv->rf[FIRST_ROUND_COMPLETE]); + goto err_put_device; + } + /* This loop might need changes if enum regfield_ids is reordered */ for (j =3D LAST_TEMP_0; j <=3D UP_THRESH_15; j +=3D 16) { for (i =3D 0; i < priv->feat->max_sensors; i++) { @@ -1097,6 +1254,43 @@ static int tsens_register(struct tsens_priv *priv) return ret; } =20 +static void tsens_reinit_worker_notify(struct work_struct *work) +{ + int i, ret, temp; + struct tsens_irq_data d; + struct tsens_priv *priv =3D container_of(work, struct tsens_priv, + reinit_wa_notify); + + for (i =3D 0; i < priv->num_sensors; i++) { + const struct tsens_sensor *s =3D &priv->sensor[i]; + u32 hw_id =3D s->hw_id; + + if (!s->tzd) + continue; + if (!tsens_threshold_violated(priv, hw_id, &d)) + continue; + + ret =3D get_temp_tsens_valid(s, &temp); + if (ret) { + dev_err(priv->dev, "[%u] %s: error reading sensor\n", + hw_id, __func__); + continue; + } + + tsens_read_irq_state(priv, hw_id, s, &d); + + if ((d.up_thresh < temp) || (d.low_thresh > temp)) { + dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n", + hw_id, __func__, temp); + thermal_zone_device_update(s->tzd, + THERMAL_EVENT_UNSPECIFIED); + } else { + dev_dbg(priv->dev, "[%u] %s: no violation: %d\n", + hw_id, __func__, temp); + } + } +} + static int tsens_probe(struct platform_device *pdev) { int ret, i; @@ -1139,6 +1333,19 @@ static int tsens_probe(struct platform_device *pdev) priv->dev =3D dev; priv->num_sensors =3D num_sensors; priv->needs_reinit_wa =3D data->needs_reinit_wa; + + if (priv->needs_reinit_wa && !qcom_scm_is_available()) + return -EPROBE_DEFER; + + if (priv->needs_reinit_wa) { + priv->reinit_wa_worker =3D alloc_workqueue("tsens_reinit_work", + WQ_HIGHPRI, 0); + if (!priv->reinit_wa_worker) + return -ENOMEM; + + INIT_WORK(&priv->reinit_wa_notify, tsens_reinit_worker_notify); + } + priv->ops =3D data->ops; for (i =3D 0; i < priv->num_sensors; i++) { if (data->hw_ids) @@ -1151,13 +1358,15 @@ static int tsens_probe(struct platform_device *pdev) =20 platform_set_drvdata(pdev, priv); =20 - if (!priv->ops || !priv->ops->init || !priv->ops->get_temp) - return -EINVAL; + if (!priv->ops || !priv->ops->init || !priv->ops->get_temp) { + ret =3D -EINVAL; + goto free_wq; + } =20 ret =3D priv->ops->init(priv); if (ret < 0) { dev_err(dev, "%s: init failed\n", __func__); - return ret; + goto free_wq; } =20 if (priv->ops->calibrate) { @@ -1165,11 +1374,23 @@ static int tsens_probe(struct platform_device *pdev) if (ret < 0) { if (ret !=3D -EPROBE_DEFER) dev_err(dev, "%s: calibration failed\n", __func__); - return ret; + + goto free_wq; } } =20 - return tsens_register(priv); + ret =3D tsens_register(priv); + if (ret < 0) { + dev_err(dev, "%s: registration failed\n", __func__); + goto free_wq; + } + + list_add_tail(&priv->list, &tsens_device_list); + return 0; + +free_wq: + destroy_workqueue(priv->reinit_wa_worker); + return ret; } =20 static int tsens_remove(struct platform_device *pdev) @@ -1181,6 +1402,8 @@ static int tsens_remove(struct platform_device *pdev) if (priv->ops->disable) priv->ops->disable(priv); =20 + destroy_workqueue(priv->reinit_wa_worker); + return 0; } =20 diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 48a7bda902c1..c7279a50cf9b 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -14,6 +14,7 @@ #define SLOPE_FACTOR 1000 #define SLOPE_DEFAULT 3200 #define TIMEOUT_US 100 +#define RESET_TIMEOUT_MS 2 #define THRESHOLD_MAX_ADC_CODE 0x3ff #define THRESHOLD_MIN_ADC_CODE 0x0 =20 @@ -167,6 +168,7 @@ enum regfield_ids { /* ----- TM ------ */ /* TRDY */ TRDY, + FIRST_ROUND_COMPLETE, /* INTERRUPT ENABLE */ INT_EN, /* v2+ has separate enables for crit, upper and lower irq */ /* STATUS */ @@ -565,6 +567,10 @@ struct tsens_priv { struct regmap *srot_map; u32 tm_offset; bool needs_reinit_wa; + struct workqueue_struct *reinit_wa_worker; + struct work_struct reinit_wa_notify; + + struct list_head list; =20 /* lock for upper/lower threshold interrupts */ spinlock_t ul_lock; --=20 2.35.3