From nobody Sun Sep 22 01:40:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8514CC43334 for ; Wed, 29 Jun 2022 16:00:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234415AbiF2QAi (ORCPT ); Wed, 29 Jun 2022 12:00:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234323AbiF2QAQ (ORCPT ); Wed, 29 Jun 2022 12:00:16 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D89F81D0F9; Wed, 29 Jun 2022 09:00:14 -0700 (PDT) Received: from notapiano.myfiosgateway.com (pool-98-113-53-228.nycmny.fios.verizon.net [98.113.53.228]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 9A53D660196F; Wed, 29 Jun 2022 17:00:12 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656518413; bh=epxNQMkBnhZkdWrXfvSSypucC3opbqyFCBxYcCzKHGg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QPo0pCyMxI/iLHaKwWcVnw3c7woXm5YVQokd2ave3flD/4QZs1fWWNqU9oC/wiEkD gRW6nvkuGQTcacYGdI/6cuDAacCFUg5Lkf5XxE46PJzFpB3fIv3FKVjxOjLgi/Qblb LLc9JmHabKXntX1mAcxNEXNtY6zr5pG2Ru3IcKBJqjSJFWmdZM+R07OgcltUcNd6Ul sXMI4MWvSoD+fXM9OCghYO87R3iZ3uMkxVYxPpp860xB6p1pyA1mf2QQxpCGt/B0MO 21BFq8FqzHsabenQvn58ExHaAh+15UEy9c3sup7GQr+fpjZfaXQ8xZ+B7MVoSIBj55 yHzzfv+aZ/W9A== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v4 07/19] arm64: dts: mediatek: asurada: Add ChromeOS EC Date: Wed, 29 Jun 2022 11:59:44 -0400 Message-Id: <20220629155956.1138955-8-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220629155956.1138955-1-nfraprado@collabora.com> References: <20220629155956.1138955-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for the ChromeOS Embedded Controller present on the Asurada platform. It is connected through the SPI1 bus and offers several functionalities: base detection, PWM controller, I2C tunneling, regulators, Type-C connector management, keyboard and Smart Battery Metrics (SBS). Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v2) Changes in v2: - Renamed PWM subnode to avoid dt-binding warning (ec-pwm -> pwm) .../boot/dts/mediatek/mt8192-asurada.dtsi | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 72dc974fe6fc..07405dea4d9d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -353,6 +353,14 @@ &pio { "AUD_DAT_MISO0", "AUD_DAT_MISO1"; =20 + cros_ec_int: cros-ec-irq-default-pins { + pins-ec-ap-int-odl { + pinmux =3D ; + input-enable; + bias-pull-up; + }; + }; + i2c0_pins: i2c0-default-pins { pins-bus { pinmux =3D , @@ -428,6 +436,74 @@ &spi1 { mediatek,pad-select =3D <0>; pinctrl-names =3D "default"; pinctrl-0 =3D <&spi1_pins>; + + cros_ec: ec@0 { + compatible =3D "google,cros-ec-spi"; + reg =3D <0>; + interrupts-extended =3D <&pio 5 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency =3D <3000000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cros_ec_int>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + base_detection: cbas { + compatible =3D "google,cros-cbas"; + }; + + cros_ec_pwm: pwm { + compatible =3D "google,cros-ec-pwm"; + #pwm-cells =3D <1>; + + status =3D "disabled"; + }; + + i2c_tunnel: i2c-tunnel { + compatible =3D "google,cros-ec-i2c-tunnel"; + google,remote-bus =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + mt6360_ldo3_reg: regulator@0 { + compatible =3D "google,cros-ec-regulator"; + reg =3D <0>; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + }; + + mt6360_ldo5_reg: regulator@1 { + compatible =3D "google,cros-ec-regulator"; + reg =3D <1>; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + typec { + compatible =3D "google,cros-ec-typec"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + usb_c0: connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + label =3D "left"; + power-role =3D "dual"; + data-role =3D "host"; + try-power-role =3D "source"; + }; + + usb_c1: connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + label =3D "right"; + power-role =3D "dual"; + data-role =3D "host"; + try-power-role =3D "source"; + }; + }; + }; }; =20 &spi5 { @@ -442,3 +518,6 @@ &spi5 { &uart0 { status =3D "okay"; }; + +#include +#include --=20 2.36.1