From nobody Thu Nov 14 19:24:30 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64314C433EF for ; Wed, 29 Jun 2022 16:01:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234353AbiF2QB3 (ORCPT ); Wed, 29 Jun 2022 12:01:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234058AbiF2QAm (ORCPT ); Wed, 29 Jun 2022 12:00:42 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48CE42C644; Wed, 29 Jun 2022 09:00:33 -0700 (PDT) Received: from notapiano.myfiosgateway.com (pool-98-113-53-228.nycmny.fios.verizon.net [98.113.53.228]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 61E6E66019AC; Wed, 29 Jun 2022 17:00:30 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656518431; bh=fWpLVNkaRd2J8/GN0NiVTcm+/j+WzfBVE0/fxSI1x5A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DY92GFjN3oeuKinw8Ew49bJgJxgOWoEzUt8A8bZVJPRHE59LO3545axbqRbXd5QI6 NOvolx1mgJgf+roEOHSN7NuOJQ0r6maVhCTo9p/20oueU1YT8lQYaE3TusW4e13aqr Wgu7phTuv8d70Zc6IPA7puSWOvI4bWE4Ja98bu7eOeSwM4CGQ9n6g4oCbh/YlShGuW KJ69HN2yvBHPBnC+GdC/nehh+L3J4vxiQ25nRQYnVCiERoBvR/UOVrNpAmN9USsz9c G6OHQ6n+q17lHnOZDCbgPHHs/6yvDDjHN52lMDHILXCKmiCK5/ReyFXGzmOYbOelxW TGpBJe7lQUP0g== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v4 19/19] arm64: dts: mediatek: asurada: Add SPI NOR flash memory Date: Wed, 29 Jun 2022 11:59:56 -0400 Message-Id: <20220629155956.1138955-20-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220629155956.1138955-1-nfraprado@collabora.com> References: <20220629155956.1138955-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for the SPI NOR flash memory present on the Asurada platform. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- Changes in v4: - Added this patch .../boot/dts/mediatek/mt8192-asurada.dtsi | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index a5625b3cb317..4b314435f8fd 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -241,6 +241,23 @@ &mt6359codec { mediatek,mic-type-2 =3D <2>; /* DMIC */ }; =20 +&nor_flash { + status =3D "okay"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&nor_flash_pins>; + assigned-clocks =3D <&topckgen CLK_TOP_SFLASH_SEL>; + assigned-clock-parents =3D <&topckgen CLK_TOP_UNIVPLL_D6_D8>; + + flash@0 { + compatible =3D "winbond,w25q64jwm", "jedec,spi-nor"; + reg =3D <0>; + spi-max-frequency =3D <52000000>; + spi-rx-bus-width =3D <2>; + spi-tx-bus-width =3D <2>; + }; +}; + &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pcie_pins>; @@ -658,6 +675,29 @@ pins-clk { }; }; =20 + nor_flash_pins: nor-flash-default-pins { + pins-cs-io1 { + pinmux =3D , + ; + input-enable; + bias-pull-up; + drive-strength =3D <10>; + }; + + pins-io0 { + pinmux =3D ; + bias-pull-up; + drive-strength =3D <10>; + }; + + pins-clk { + pinmux =3D ; + input-enable; + bias-pull-up; + drive-strength =3D <10>; + }; + }; + pcie_pins: pcie-default-pins { pins-pcie-wake { pinmux =3D ; --=20 2.36.1