From nobody Sun Sep 22 01:34:07 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58F36C433EF for ; Wed, 29 Jun 2022 16:01:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231933AbiF2QBK (ORCPT ); Wed, 29 Jun 2022 12:01:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234419AbiF2QA0 (ORCPT ); Wed, 29 Jun 2022 12:00:26 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 52AE420BF2; Wed, 29 Jun 2022 09:00:25 -0700 (PDT) Received: from notapiano.myfiosgateway.com (pool-98-113-53-228.nycmny.fios.verizon.net [98.113.53.228]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 057AA6601A28; Wed, 29 Jun 2022 17:00:22 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656518424; bh=gqdq1+xz9/LOr4x7zjy0Q3+2j4Bwrp8jWZIH9ix1isE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nJB2DZI25Uezk14CTkd4yAkAz0+oE4+EXH2g0f59vZgs5JIdEd1epUZS0U8pJc0AI 65y+l2bKNEx8qd40agBs44u5rvqSjq2Z5h84khUSJUkp/SrPpIYj51E7xyiJXu6Bmn LPqkuuRFNlIYs7T3ArzN/CEN692EKy4FxevXo5v6W5fgDlBIf2f6bIQMYRamuA3wFK qDgJ0YqwGpmz34uNGYM1Y9wXrDKAthDGYvstTNdmxhQ2WMVcqiU6x6cyfwdvfK20KP 9NEckruvJi+YNtZNexa4Ka5DpjhK9fd92cEu9ieT/9eKMdxe1xssJBYERbBlpes0xU At69IliUbtFgg== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v4 14/19] arm64: dts: mediatek: asurada: Enable PCIe and add WiFi Date: Wed, 29 Jun 2022 11:59:51 -0400 Message-Id: <20220629155956.1138955-15-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220629155956.1138955-1-nfraprado@collabora.com> References: <20220629155956.1138955-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable MT8192's PCIe controller and add support for the MT7921e WiFi card that is present on that bus for the Asurada platform. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v3) Changes in v3: - Renamed regulator node to be generic Changes in v2: - Added this patch .../boot/dts/mediatek/mt8192-asurada.dtsi | 74 +++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 69bb43f7b346..e59c178d3d26 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -66,6 +66,19 @@ pp3300_u: regulator-3v3-u { vin-supply =3D <&pp3300_g>; }; =20 + pp3300_wlan: regulator-3v3-wlan { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_wlan"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pp3300_wlan_pins>; + enable-active-high; + gpio =3D <&pio 143 GPIO_ACTIVE_HIGH>; + }; + /* system wide switching 5.0V power rail */ pp5000_a: regulator-5v0-a { compatible =3D "regulator-fixed"; @@ -84,6 +97,17 @@ ppvar_sys: regulator-var-sys { regulator-always-on; regulator-boot-on; }; + + reserved_memory: reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + wifi_restricted_dma_region: wifi@c0000000 { + compatible =3D "restricted-dma-pool"; + reg =3D <0 0xc0000000 0 0x4000000>; + }; + }; }; =20 &i2c0 { @@ -144,6 +168,28 @@ &i2c7 { pinctrl-0 =3D <&i2c7_pins>; }; =20 +&pcie { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie_pins>; + + pcie0: pcie@0,0 { + device_type =3D "pci"; + reg =3D <0x0000 0 0 0 0>; + num-lanes =3D <1>; + bus-range =3D <0x1 0x1>; + + #address-cells =3D <3>; + #size-cells =3D <2>; + ranges; + + wifi: wifi@0,0 { + reg =3D <0x10000 0 0 0 0x100000>, + <0x10000 0 0x100000 0 0x100000>; + memory-region =3D <&wifi_restricted_dma_region>; + }; + }; +}; + &pio { /* 220 lines */ gpio-line-names =3D "I2S_DP_LRCK", @@ -430,6 +476,34 @@ pins-bus { }; }; =20 + pcie_pins: pcie-default-pins { + pins-pcie-wake { + pinmux =3D ; + bias-pull-up; + }; + + pins-pcie-pereset { + pinmux =3D ; + }; + + pins-pcie-clkreq { + pinmux =3D ; + bias-pull-up; + }; + + pins-wifi-kill { + pinmux =3D ; /* WIFI_KILL_L */ + output-high; + }; + }; + + pp3300_wlan_pins: pp3300-wlan-pins { + pins-pcie-en-pp3300-wlan { + pinmux =3D ; + output-high; + }; + }; + spi1_pins: spi1-default-pins { pins-cs-mosi-clk { pinmux =3D , --=20 2.36.1