From nobody Tue Apr 28 09:39:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5E57C433EF for ; Tue, 28 Jun 2022 13:42:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346823AbiF1Nmx (ORCPT ); Tue, 28 Jun 2022 09:42:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346761AbiF1Nmu (ORCPT ); Tue, 28 Jun 2022 09:42:50 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE13827CD0; Tue, 28 Jun 2022 06:42:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656423768; x=1687959768; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=50gRAoZGM9NF7c6C4HXrCkF3YdGjg4EaBCk9JFs1D5Y=; b=hzc6XVIRkLT5CoaZMDxKoWL2bskRBmYwJUStbeMRDjVd4zkQbNV2981j AOI8dDc04/Jtk0eHjufI1oqrjAFDkhog/3uDsVZa1Wx3FckESn7/2IDc1 +P7o2T2Q+413oOattK6iMQRwvnxgw65lF1zbu+GwfB47aoyBia3pooTFD vUM3Seu4hpZKZNtUYKJUlC5H1ar72gcbvqSrk+gwmJvQsSf3VlRRV17mi WS7vGaQlnrIyGdDy8s6u0Pl7qVFqGfwhcHb3wwJEd4kKiQ+79m3eYyi18 OrjLlWM1lh8ltify0mI+QgniniDgsqFpcG6XcuK6S7gbkA2bRC907hLD8 w==; X-IronPort-AV: E=McAfee;i="6400,9594,10391"; a="281780633" X-IronPort-AV: E=Sophos;i="5.92,227,1650956400"; d="scan'208";a="281780633" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2022 06:42:48 -0700 X-IronPort-AV: E=Sophos;i="5.92,227,1650956400"; d="scan'208";a="646918016" Received: from iannetti-mobl.ger.corp.intel.com (HELO ijarvine-MOBL2.ger.corp.intel.com) ([10.251.216.215]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2022 06:42:46 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: linux-serial@vger.kernel.org, Greg KH , Jiri Slaby , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Andy Shevchenko , linux-kernel@vger.kernel.org Subject: [PATCH 1/4] serial: 8250_dw: Use dw8250_serial_out() in dw8250_serial_out38x() Date: Tue, 28 Jun 2022 16:42:31 +0300 Message-Id: <20220628134234.53771-2-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220628134234.53771-1-ilpo.jarvinen@linux.intel.com> References: <20220628134234.53771-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Place dw8250_serial_out() before dw8250_serial_out38x() so that it can be called from dw8250_serial_out38x() to do the actual write. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/tty/serial/8250/8250_dw.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/82= 50_dw.c index 167a691c7b19..41bf063396e4 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -143,29 +143,23 @@ static void dw8250_tx_wait_empty(struct uart_port *p) } } =20 -static void dw8250_serial_out38x(struct uart_port *p, int offset, int valu= e) +static void dw8250_serial_out(struct uart_port *p, int offset, int value) { struct dw8250_data *d =3D to_dw8250_data(p->private_data); =20 - /* Allow the TX to drain before we reconfigure */ - if (offset =3D=3D UART_LCR) - dw8250_tx_wait_empty(p); - writeb(value, p->membase + (offset << p->regshift)); =20 if (offset =3D=3D UART_LCR && !d->uart_16550_compatible) dw8250_check_lcr(p, value); } =20 - -static void dw8250_serial_out(struct uart_port *p, int offset, int value) +static void dw8250_serial_out38x(struct uart_port *p, int offset, int valu= e) { - struct dw8250_data *d =3D to_dw8250_data(p->private_data); - - writeb(value, p->membase + (offset << p->regshift)); + /* Allow the TX to drain before we reconfigure */ + if (offset =3D=3D UART_LCR) + dw8250_tx_wait_empty(p); =20 - if (offset =3D=3D UART_LCR && !d->uart_16550_compatible) - dw8250_check_lcr(p, value); + dw8250_serial_out(p, offset, value); } =20 static unsigned int dw8250_serial_in(struct uart_port *p, int offset) --=20 2.30.2 From nobody Tue Apr 28 09:39:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C971C433EF for ; Tue, 28 Jun 2022 13:43:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346831AbiF1NnA (ORCPT ); Tue, 28 Jun 2022 09:43:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46070 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346822AbiF1Nmw (ORCPT ); Tue, 28 Jun 2022 09:42:52 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EAF5827CFE; Tue, 28 Jun 2022 06:42:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656423771; x=1687959771; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=/YGgMPxrsMSQlXCWrjRM6rpDxigDXo+yUsU1t73bO+c=; b=caKpNtdkSG5a8jfXIozvwCLS1LkXxee/3vBEui9KSx6yssL5lkqiDzic JoC8GnzWeIlt2jOonDtVN9wjFdWBXcFYNS58oTA0GopNzBH7LkqpigOen eDuKX7ptArrRlqlN3far0U4S1gFD4ZVRh2hj0GPKRW/KY/n3CPqoovH0O XrpLD8wg2uo5+wDo4WgGOjGAzvuzGXJIBkvMCxZOdvxzbCFL2IdTjYH10 rrv+EBjEQUq5mthLdbW6iIX2F1O7cKUQufSB0tCatjvXDatJ+ldLPxEf2 KCNfZgo3bsiXAblyOpU8LNVqjrqvCQpOBeDsy/Aj2EpU0nKEKchpmc8Oe w==; X-IronPort-AV: E=McAfee;i="6400,9594,10391"; a="281780641" X-IronPort-AV: E=Sophos;i="5.92,227,1650956400"; d="scan'208";a="281780641" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2022 06:42:51 -0700 X-IronPort-AV: E=Sophos;i="5.92,227,1650956400"; d="scan'208";a="646918023" Received: from iannetti-mobl.ger.corp.intel.com (HELO ijarvine-MOBL2.ger.corp.intel.com) ([10.251.216.215]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2022 06:42:49 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: linux-serial@vger.kernel.org, Greg KH , Jiri Slaby , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Andy Shevchenko , linux-kernel@vger.kernel.org Subject: [PATCH 2/4] serial: 8250_dw: Rename offset to reg_offset Date: Tue, 28 Jun 2022 16:42:32 +0300 Message-Id: <20220628134234.53771-3-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220628134234.53771-1-ilpo.jarvinen@linux.intel.com> References: <20220628134234.53771-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Get 'offset' variable out of the way of parameter named 'offset', rename it to 'reg_offset'. This is very short lived change as reg_offset is going to be soon removed. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/tty/serial/8250/8250_dw.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/82= 50_dw.c index 41bf063396e4..f18975b4d2c7 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -89,7 +89,7 @@ static void dw8250_force_idle(struct uart_port *p) =20 static void dw8250_check_lcr(struct uart_port *p, int value) { - void __iomem *offset =3D p->membase + (UART_LCR << p->regshift); + void __iomem *reg_offset =3D p->membase + (UART_LCR << p->regshift); int tries =3D 1000; =20 /* Make sure LCR write wasn't ignored */ @@ -103,15 +103,15 @@ static void dw8250_check_lcr(struct uart_port *p, int= value) =20 #ifdef CONFIG_64BIT if (p->type =3D=3D PORT_OCTEON) - __raw_writeq(value & 0xff, offset); + __raw_writeq(value & 0xff, reg_offset); else #endif if (p->iotype =3D=3D UPIO_MEM32) - writel(value, offset); + writel(value, reg_offset); else if (p->iotype =3D=3D UPIO_MEM32BE) - iowrite32be(value, offset); + iowrite32be(value, reg_offset); else - writeb(value, offset); + writeb(value, reg_offset); } /* * FIXME: this deadlocks if port->lock is already held --=20 2.30.2 From nobody Tue Apr 28 09:39:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA20ECCA47F for ; Tue, 28 Jun 2022 13:43:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346835AbiF1NnC (ORCPT ); Tue, 28 Jun 2022 09:43:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46128 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346781AbiF1Nm4 (ORCPT ); Tue, 28 Jun 2022 09:42:56 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CBFE32AC43; Tue, 28 Jun 2022 06:42:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656423774; x=1687959774; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Y0QXjOizetyX3Soq97gP2p3KCAQsLgAHEtiVVB0k/s0=; b=aHBY6B36K2yO8Rn/rM4a8BR8R8FOOVTTatDd5dggoa7T/Fz5ed9dAhHA Ban6o7t/sVgbYooQ8eGtcnOMhZUnyubnmEVGw7tuM1swgVI+1Ucj/R/Zw Cgl9spsglik8re52TD5bCqa5zm9rrz7bNb3oEP4OSOJ79t6OBa4XCCHwW zNlUqfwrQgeCovo4jZy7ztLT26F2OIVAiOlmgWj/mfu6jjVhFWRk8HR10 FuNjEj3yLN+hF2Gy6MBm+Un5v8zhkDNuUpkPSXBbCzFUNLQqluvG+1Ejs xUmkss+MGwgh/fDNcNSAPTx1YnjfEU3jKU/BWHSFNxuxOzhnZpoucGsQ+ A==; X-IronPort-AV: E=McAfee;i="6400,9594,10391"; a="281780646" X-IronPort-AV: E=Sophos;i="5.92,227,1650956400"; d="scan'208";a="281780646" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2022 06:42:54 -0700 X-IronPort-AV: E=Sophos;i="5.92,227,1650956400"; d="scan'208";a="646918031" Received: from iannetti-mobl.ger.corp.intel.com (HELO ijarvine-MOBL2.ger.corp.intel.com) ([10.251.216.215]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2022 06:42:52 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: linux-serial@vger.kernel.org, Greg KH , Jiri Slaby , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Andy Shevchenko , linux-kernel@vger.kernel.org Subject: [PATCH 3/4] serial: 8250_dw: Move 16550 compatible & LCR checks to dw8250_verify_write() Date: Tue, 28 Jun 2022 16:42:33 +0300 Message-Id: <20220628134234.53771-4-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220628134234.53771-1-ilpo.jarvinen@linux.intel.com> References: <20220628134234.53771-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rename dw8250_check_lcr() -> dw8250_verify_write() and add comment. Move LCR and 16550_compatible checks there. As offset is now passed and dw8250_verify_write() ensures it's UART_LCR, offset can use used instead of explicit UART_LCR. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/tty/serial/8250/8250_dw.c | 35 +++++++++++++++---------------- 1 file changed, 17 insertions(+), 18 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/82= 50_dw.c index f18975b4d2c7..fc367d44f86d 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -87,14 +87,24 @@ static void dw8250_force_idle(struct uart_port *p) (void)p->serial_in(p, UART_RX); } =20 -static void dw8250_check_lcr(struct uart_port *p, int value) +/* + * DW UART can be configured to indicate BUSY in USR (with + * UART_16550_COMPATIBLE=3DNO or version prior to introducing that option). + * If BUSY is set while writing to LCR register, the write is ignored and + * needs to be retries. + */ +static void dw8250_verify_write(struct uart_port *p, int offset, int value) { - void __iomem *reg_offset =3D p->membase + (UART_LCR << p->regshift); + void __iomem *reg_offset =3D p->membase + (offset << p->regshift); + struct dw8250_data *d =3D to_dw8250_data(p->private_data); int tries =3D 1000; =20 + if ((offset !=3D UART_LCR) || !d->uart_16550_compatible) + return; + /* Make sure LCR write wasn't ignored */ while (tries--) { - unsigned int lcr =3D p->serial_in(p, UART_LCR); + unsigned int lcr =3D p->serial_in(p, offset); =20 if ((value & ~UART_LCR_SPAR) =3D=3D (lcr & ~UART_LCR_SPAR)) return; @@ -145,12 +155,9 @@ static void dw8250_tx_wait_empty(struct uart_port *p) =20 static void dw8250_serial_out(struct uart_port *p, int offset, int value) { - struct dw8250_data *d =3D to_dw8250_data(p->private_data); - writeb(value, p->membase + (offset << p->regshift)); =20 - if (offset =3D=3D UART_LCR && !d->uart_16550_compatible) - dw8250_check_lcr(p, value); + dw8250_verify_write(p, offset, value); } =20 static void dw8250_serial_out38x(struct uart_port *p, int offset, int valu= e) @@ -181,26 +188,20 @@ static unsigned int dw8250_serial_inq(struct uart_por= t *p, int offset) =20 static void dw8250_serial_outq(struct uart_port *p, int offset, int value) { - struct dw8250_data *d =3D to_dw8250_data(p->private_data); - value &=3D 0xff; __raw_writeq(value, p->membase + (offset << p->regshift)); /* Read back to ensure register write ordering. */ __raw_readq(p->membase + (UART_LCR << p->regshift)); =20 - if (offset =3D=3D UART_LCR && !d->uart_16550_compatible) - dw8250_check_lcr(p, value); + dw8250_verify_write(p, offset, value); } #endif /* CONFIG_64BIT */ =20 static void dw8250_serial_out32(struct uart_port *p, int offset, int value) { - struct dw8250_data *d =3D to_dw8250_data(p->private_data); - writel(value, p->membase + (offset << p->regshift)); =20 - if (offset =3D=3D UART_LCR && !d->uart_16550_compatible) - dw8250_check_lcr(p, value); + dw8250_verify_write(p, offset, value); } =20 static unsigned int dw8250_serial_in32(struct uart_port *p, int offset) @@ -212,12 +213,10 @@ static unsigned int dw8250_serial_in32(struct uart_po= rt *p, int offset) =20 static void dw8250_serial_out32be(struct uart_port *p, int offset, int val= ue) { - struct dw8250_data *d =3D to_dw8250_data(p->private_data); =20 iowrite32be(value, p->membase + (offset << p->regshift)); =20 - if (offset =3D=3D UART_LCR && !d->uart_16550_compatible) - dw8250_check_lcr(p, value); + dw8250_verify_write(p, offset, value); } =20 static unsigned int dw8250_serial_in32be(struct uart_port *p, int offset) --=20 2.30.2 From nobody Tue Apr 28 09:39:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDE76C43334 for ; Tue, 28 Jun 2022 13:43:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346841AbiF1NnD (ORCPT ); Tue, 28 Jun 2022 09:43:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46070 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346827AbiF1Nm6 (ORCPT ); Tue, 28 Jun 2022 09:42:58 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ABF0927CD0; Tue, 28 Jun 2022 06:42:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656423777; x=1687959777; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=SPLW4MUTelcNhLfIwrYgBfgM4WHiKHjiuBV0hIitAOk=; b=VC1qva8aZRF8FnzQ6UWM0/XnvXHUVmBd/h1uoIBtonQpNVMetKBy5wam 93biRH9Z4UrO1E1T4h5kkR580a51K6eN+nhHSJ3N0IitCypc2TNwcDU6h 8L+94qPV5c9yIN5SWvob/sXRDgbVdItgUXqGdEj1kUNr2X2zjVOQmIWqb St1F7/Ws0bj9vuk9/Bggc6wVAfYrrJCMchsg4VO/eOTZy71mdoWSOk7I7 eATlcfCyPOS8XMk8PEwGuAjzPj2C3hgdiHoASbj62lknhxDd1C2eoh+rb TEpTgkyuJdiYEkyNRHKa5G4PlQHV95DqOBVOTh2Wwi8TaHyU9kfuMuGKq Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10391"; a="281780657" X-IronPort-AV: E=Sophos;i="5.92,227,1650956400"; d="scan'208";a="281780657" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2022 06:42:57 -0700 X-IronPort-AV: E=Sophos;i="5.92,227,1650956400"; d="scan'208";a="646918036" Received: from iannetti-mobl.ger.corp.intel.com (HELO ijarvine-MOBL2.ger.corp.intel.com) ([10.251.216.215]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2022 06:42:55 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: linux-serial@vger.kernel.org, Greg KH , Jiri Slaby , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Andy Shevchenko , linux-kernel@vger.kernel.org Subject: [PATCH 4/4] serial: 8250_dw: Rework ->serial_out() LCR write retry logic Date: Tue, 28 Jun 2022 16:42:34 +0300 Message-Id: <20220628134234.53771-5-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220628134234.53771-1-ilpo.jarvinen@linux.intel.com> References: <20220628134234.53771-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently dw8250_verify_write() (was dw8250_check_lcr()) nullifies the benefit from differentiated ->serial_out() by having big if tree to select correct write type. Rework the logic such that the LCR write can be retried within the relevant ->serial_out() handler: 1. Move retries counter on the caller level and pass as pointer to dw8250_verify_write() 2. Make dw8250_verify_write() return bool 3. Retry the write on caller level (if needed) Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/tty/serial/8250/8250_dw.c | 59 ++++++++++++++++++------------- 1 file changed, 35 insertions(+), 24 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/82= 50_dw.c index fc367d44f86d..f6846363341b 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -92,41 +92,36 @@ static void dw8250_force_idle(struct uart_port *p) * UART_16550_COMPATIBLE=3DNO or version prior to introducing that option). * If BUSY is set while writing to LCR register, the write is ignored and * needs to be retries. + * + * Returns: false if the caller should retry the write. */ -static void dw8250_verify_write(struct uart_port *p, int offset, int value) +static bool dw8250_verify_write(struct uart_port *p, int offset, int value, + unsigned int *retries) { - void __iomem *reg_offset =3D p->membase + (offset << p->regshift); struct dw8250_data *d =3D to_dw8250_data(p->private_data); - int tries =3D 1000; + unsigned int lcr; =20 if ((offset !=3D UART_LCR) || !d->uart_16550_compatible) - return; + return true; =20 /* Make sure LCR write wasn't ignored */ - while (tries--) { - unsigned int lcr =3D p->serial_in(p, offset); + lcr =3D p->serial_in(p, offset); =20 - if ((value & ~UART_LCR_SPAR) =3D=3D (lcr & ~UART_LCR_SPAR)) - return; + if ((value & ~UART_LCR_SPAR) =3D=3D (lcr & ~UART_LCR_SPAR)) + return true; =20 - dw8250_force_idle(p); + dw8250_force_idle(p); =20 -#ifdef CONFIG_64BIT - if (p->type =3D=3D PORT_OCTEON) - __raw_writeq(value & 0xff, reg_offset); - else -#endif - if (p->iotype =3D=3D UPIO_MEM32) - writel(value, reg_offset); - else if (p->iotype =3D=3D UPIO_MEM32BE) - iowrite32be(value, reg_offset); - else - writeb(value, reg_offset); + if (*retries) { + *retries -=3D 1; + return false; } + /* * FIXME: this deadlocks if port->lock is already held * dev_err(p->dev, "Couldn't set LCR to %d\n", value); */ + return true; } =20 /* Returns once the transmitter is empty or we run out of retries */ @@ -155,9 +150,13 @@ static void dw8250_tx_wait_empty(struct uart_port *p) =20 static void dw8250_serial_out(struct uart_port *p, int offset, int value) { + unsigned int retries =3D 1000; + +retry: writeb(value, p->membase + (offset << p->regshift)); =20 - dw8250_verify_write(p, offset, value); + if (!dw8250_verify_write(p, offset, value, &retries)) + goto retry; } =20 static void dw8250_serial_out38x(struct uart_port *p, int offset, int valu= e) @@ -188,20 +187,29 @@ static unsigned int dw8250_serial_inq(struct uart_por= t *p, int offset) =20 static void dw8250_serial_outq(struct uart_port *p, int offset, int value) { + unsigned int retries =3D 1000; + value &=3D 0xff; + +retry: __raw_writeq(value, p->membase + (offset << p->regshift)); /* Read back to ensure register write ordering. */ __raw_readq(p->membase + (UART_LCR << p->regshift)); =20 - dw8250_verify_write(p, offset, value); + if (!dw8250_verify_write(p, offset, value, &retries)) + goto retry; } #endif /* CONFIG_64BIT */ =20 static void dw8250_serial_out32(struct uart_port *p, int offset, int value) { + unsigned int retries =3D 1000; + +retry: writel(value, p->membase + (offset << p->regshift)); =20 - dw8250_verify_write(p, offset, value); + if (!dw8250_verify_write(p, offset, value, &retries)) + goto retry; } =20 static unsigned int dw8250_serial_in32(struct uart_port *p, int offset) @@ -213,10 +221,13 @@ static unsigned int dw8250_serial_in32(struct uart_po= rt *p, int offset) =20 static void dw8250_serial_out32be(struct uart_port *p, int offset, int val= ue) { + unsigned int retries =3D 1000; =20 +retry: iowrite32be(value, p->membase + (offset << p->regshift)); =20 - dw8250_verify_write(p, offset, value); + if (!dw8250_verify_write(p, offset, value, &retries)) + goto retry; } =20 static unsigned int dw8250_serial_in32be(struct uart_port *p, int offset) --=20 2.30.2