From nobody Sun Apr 19 21:55:35 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95F6AC43334 for ; Sat, 25 Jun 2022 12:56:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232894AbiFYM4i (ORCPT ); Sat, 25 Jun 2022 08:56:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232616AbiFYM4e (ORCPT ); Sat, 25 Jun 2022 08:56:34 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80E7618362 for ; Sat, 25 Jun 2022 05:56:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656161793; x=1687697793; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xrUhPovyVpzQVk4gf4IQBAjF6Pmgk0B0rsPwQtugD/8=; b=n7QziLnrI2Db6pDDqff/q0A2MhUQI686HY8kZPvAR6p5EJUovItgghCo BxHA59Uk3TIn8Id1ShoDTorxqafJVQkbl2UUr+3QetP7+G1/6g8vsBv/5 IV/oiLBt+rIjfM38ilskUjae5BMB1mUrXe9DhrLhA5sfcHFzLUOjW7P4X Zm7yhDajbaotsM2LvyQCl4Ti2rrYeQPWjMVlzNUUl5HuPLRQPxMDeN3o2 P8Jby5CJgDpCRKI58/YkufTAlnhd6CfebRKMZqAu8Er644vLz89mLbU3f 7GR8CahlfwYKPHSr1avM8CPWFLL2QU4QZk/vbw5eGUjW7iO9vzp8r/G/n A==; X-IronPort-AV: E=McAfee;i="6400,9594,10388"; a="278727945" X-IronPort-AV: E=Sophos;i="5.92,222,1650956400"; d="scan'208";a="278727945" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2022 05:56:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,222,1650956400"; d="scan'208";a="586890354" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga007.jf.intel.com with ESMTP; 25 Jun 2022 05:56:30 -0700 From: Lu Baolu To: Joerg Roedel , Steve Wahl , Kevin Tian Cc: David Woodhouse , Jerry Snitselaar , Mike Travis , Dimitri Sivanich , Russ Anderson , iommu@lists.linux.dev, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v1 1/6] iommu/vt-d: Remove unused domain_get_iommu() Date: Sat, 25 Jun 2022 20:51:59 +0800 Message-Id: <20220625125204.2199437-2-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220625125204.2199437-1-baolu.lu@linux.intel.com> References: <20220625125204.2199437-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" It is not used anywhere. Remove it to avoid dead code. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Reviewed-by: Steve Wahl --- drivers/iommu/intel/iommu.h | 1 - drivers/iommu/intel/iommu.c | 18 ------------------ 2 files changed, 19 deletions(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index df64d3d9c49a..56e0d8cd2102 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -725,7 +725,6 @@ extern int dmar_ir_support(void); =20 void *alloc_pgtable_page(int node); void free_pgtable_page(void *vaddr); -struct intel_iommu *domain_get_iommu(struct dmar_domain *domain); void iommu_flush_write_buffer(struct intel_iommu *iommu); int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct device *dev= ); struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn= ); diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index da6cfea0f0d6..781e060352e6 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -445,24 +445,6 @@ int iommu_calculate_agaw(struct intel_iommu *iommu) return __iommu_calculate_agaw(iommu, DEFAULT_DOMAIN_ADDRESS_WIDTH); } =20 -/* This functionin only returns single iommu in a domain */ -struct intel_iommu *domain_get_iommu(struct dmar_domain *domain) -{ - int iommu_id; - - /* si_domain and vm domain should not get here. */ - if (WARN_ON(!iommu_is_dma_domain(&domain->domain))) - return NULL; - - for_each_domain_iommu(iommu_id, domain) - break; - - if (iommu_id < 0 || iommu_id >=3D g_num_of_iommus) - return NULL; - - return g_iommus[iommu_id]; -} - static inline bool iommu_paging_structure_coherency(struct intel_iommu *io= mmu) { return sm_supported(iommu) ? --=20 2.25.1 From nobody Sun Apr 19 21:55:35 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E535CCA480 for ; Sat, 25 Jun 2022 12:56:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232915AbiFYM4k (ORCPT ); Sat, 25 Jun 2022 08:56:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46146 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232881AbiFYM4h (ORCPT ); Sat, 25 Jun 2022 08:56:37 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 854AB1836D for ; Sat, 25 Jun 2022 05:56:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656161796; x=1687697796; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=k2v7g+9a3285H4d+1+ZkMtPg9131on/0l+jEzg72A3Y=; b=WEvJGFbZ/9ee7aUSpuOjJiO7nCQxA5Jl7OQ3cA/0IXd44qqIeo/CoHqT uPeIFDtV2sLhtzWZTLz9Mzo/bp+upcDlu1/GDtynCgmn+DBbaxfn+HH5O RubWGEzuoT2kT6IOSWhLKqajzTq+2qSPZmX7iw7B3q/kh5nMEGlk+rlzf E4lV//5PZCLv3FQDFwoceTFeEBY9H1xIYQAhcvDqe5TfJvX9Ofs43+vdT Gz9LYP/qlhair74Fp1+FmwW00TsOysmFTMIucf7VMJFA45kIzUz2p3+fG 5IWQpX25YUbOI751vEh0tL7v0xCGRVWVtx9taiu1+/9DfK7fmCqDMK1lr g==; X-IronPort-AV: E=McAfee;i="6400,9594,10388"; a="278727960" X-IronPort-AV: E=Sophos;i="5.92,222,1650956400"; d="scan'208";a="278727960" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2022 05:56:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,222,1650956400"; d="scan'208";a="586890361" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga007.jf.intel.com with ESMTP; 25 Jun 2022 05:56:33 -0700 From: Lu Baolu To: Joerg Roedel , Steve Wahl , Kevin Tian Cc: David Woodhouse , Jerry Snitselaar , Mike Travis , Dimitri Sivanich , Russ Anderson , iommu@lists.linux.dev, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v1 2/6] iommu/vt-d: Use IDA interface to manage iommu sequence id Date: Sat, 25 Jun 2022 20:52:00 +0800 Message-Id: <20220625125204.2199437-3-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220625125204.2199437-1-baolu.lu@linux.intel.com> References: <20220625125204.2199437-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Switch dmar unit sequence id allocation and release from bitmap to IDA interface. Signed-off-by: Lu Baolu Reviewed-by: Steve Wahl --- drivers/iommu/intel/dmar.c | 33 +++++++-------------------------- 1 file changed, 7 insertions(+), 26 deletions(-) diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c index 2a5e0f91e647..bf43889b9d2a 100644 --- a/drivers/iommu/intel/dmar.c +++ b/drivers/iommu/intel/dmar.c @@ -60,7 +60,7 @@ LIST_HEAD(dmar_drhd_units); =20 struct acpi_table_header * __initdata dmar_tbl; static int dmar_dev_scope_status =3D 1; -static unsigned long dmar_seq_ids[BITS_TO_LONGS(DMAR_UNITS_SUPPORTED)]; +static DEFINE_IDA(dmar_seq_ids); =20 static int alloc_iommu(struct dmar_drhd_unit *drhd); static void free_iommu(struct intel_iommu *iommu); @@ -1023,28 +1023,6 @@ static int map_iommu(struct intel_iommu *iommu, u64 = phys_addr) return err; } =20 -static int dmar_alloc_seq_id(struct intel_iommu *iommu) -{ - iommu->seq_id =3D find_first_zero_bit(dmar_seq_ids, - DMAR_UNITS_SUPPORTED); - if (iommu->seq_id >=3D DMAR_UNITS_SUPPORTED) { - iommu->seq_id =3D -1; - } else { - set_bit(iommu->seq_id, dmar_seq_ids); - sprintf(iommu->name, "dmar%d", iommu->seq_id); - } - - return iommu->seq_id; -} - -static void dmar_free_seq_id(struct intel_iommu *iommu) -{ - if (iommu->seq_id >=3D 0) { - clear_bit(iommu->seq_id, dmar_seq_ids); - iommu->seq_id =3D -1; - } -} - static int alloc_iommu(struct dmar_drhd_unit *drhd) { struct intel_iommu *iommu; @@ -1062,11 +1040,14 @@ static int alloc_iommu(struct dmar_drhd_unit *drhd) if (!iommu) return -ENOMEM; =20 - if (dmar_alloc_seq_id(iommu) < 0) { + iommu->seq_id =3D ida_alloc_range(&dmar_seq_ids, 0, + DMAR_UNITS_SUPPORTED, GFP_KERNEL); + if (iommu->seq_id < 0) { pr_err("Failed to allocate seq_id\n"); err =3D -ENOSPC; goto error; } + sprintf(iommu->name, "dmar%d", iommu->seq_id); =20 err =3D map_iommu(iommu, drhd->reg_base_addr); if (err) { @@ -1150,7 +1131,7 @@ static int alloc_iommu(struct dmar_drhd_unit *drhd) err_unmap: unmap_iommu(iommu); error_free_seq_id: - dmar_free_seq_id(iommu); + ida_free(&dmar_seq_ids, iommu->seq_id); error: kfree(iommu); return err; @@ -1183,7 +1164,7 @@ static void free_iommu(struct intel_iommu *iommu) if (iommu->reg) unmap_iommu(iommu); =20 - dmar_free_seq_id(iommu); + ida_free(&dmar_seq_ids, iommu->seq_id); kfree(iommu); } =20 --=20 2.25.1 From nobody Sun Apr 19 21:55:35 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96193C43334 for ; Sat, 25 Jun 2022 12:56:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232941AbiFYM4n (ORCPT ); Sat, 25 Jun 2022 08:56:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46188 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232881AbiFYM4l (ORCPT ); Sat, 25 Jun 2022 08:56:41 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C194F1836D for ; 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d="scan'208";a="586890367" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga007.jf.intel.com with ESMTP; 25 Jun 2022 05:56:36 -0700 From: Lu Baolu To: Joerg Roedel , Steve Wahl , Kevin Tian Cc: David Woodhouse , Jerry Snitselaar , Mike Travis , Dimitri Sivanich , Russ Anderson , iommu@lists.linux.dev, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v1 3/6] iommu/vt-d: Refactor iommu information of each domain Date: Sat, 25 Jun 2022 20:52:01 +0800 Message-Id: <20220625125204.2199437-4-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220625125204.2199437-1-baolu.lu@linux.intel.com> References: <20220625125204.2199437-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" When a DMA domain is attached to a device, it needs to allocate a domain ID from its IOMMU. Currently, the domain ID information is stored in two static arrays embedded in the domain structure. This can lead to memory waste when the driver is running on a small platform. This optimizes these static arrays by replacing them with an xarray and consuming memory on demand. Signed-off-by: Lu Baolu Reviewed-by: Steve Wahl --- drivers/iommu/intel/iommu.h | 27 +++++--- drivers/iommu/intel/iommu.c | 123 ++++++++++++++++++++---------------- drivers/iommu/intel/pasid.c | 2 +- drivers/iommu/intel/svm.c | 2 +- 4 files changed, 90 insertions(+), 64 deletions(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index 56e0d8cd2102..56c3d1a9e155 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -21,6 +21,7 @@ #include #include #include +#include =20 #include #include @@ -524,17 +525,15 @@ struct context_entry { */ #define DOMAIN_FLAG_USE_FIRST_LEVEL BIT(1) =20 +struct iommu_domain_info { + struct intel_iommu *iommu; + unsigned int refcnt; + u16 did; +}; + struct dmar_domain { int nid; /* node id */ - - unsigned int iommu_refcnt[DMAR_UNITS_SUPPORTED]; - /* Refcount of devices per iommu */ - - - u16 iommu_did[DMAR_UNITS_SUPPORTED]; - /* Domain ids per IOMMU. Use u16 since - * domain ids are 16 bit wide according - * to VT-d spec, section 9.3 */ + struct xarray iommu_array; /* Attached IOMMU array */ =20 u8 has_iotlb_device: 1; u8 iommu_coherency: 1; /* indicate coherency of iommu access */ @@ -640,6 +639,16 @@ static inline struct dmar_domain *to_dmar_domain(struc= t iommu_domain *dom) return container_of(dom, struct dmar_domain, domain); } =20 +/* Retrieve the domain ID which has allocated to the domain */ +static inline u16 +domain_id_iommu(struct dmar_domain *domain, struct intel_iommu *iommu) +{ + struct iommu_domain_info *info =3D + xa_load(&domain->iommu_array, iommu->seq_id); + + return info->did; +} + /* * 0: readable * 1: writable diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 781e060352e6..78b26fef685e 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -254,10 +254,6 @@ static inline void context_clear_entry(struct context_= entry *context) static struct dmar_domain *si_domain; static int hw_pass_through =3D 1; =20 -#define for_each_domain_iommu(idx, domain) \ - for (idx =3D 0; idx < g_num_of_iommus; idx++) \ - if (domain->iommu_refcnt[idx]) - struct dmar_rmrr_unit { struct list_head list; /* list of rmrr units */ struct acpi_dmar_header *hdr; /* ACPI header */ @@ -453,16 +449,16 @@ static inline bool iommu_paging_structure_coherency(s= truct intel_iommu *iommu) =20 static void domain_update_iommu_coherency(struct dmar_domain *domain) { + struct iommu_domain_info *info; struct dmar_drhd_unit *drhd; struct intel_iommu *iommu; bool found =3D false; - int i; + unsigned long i; =20 domain->iommu_coherency =3D true; - - for_each_domain_iommu(i, domain) { + xa_for_each(&domain->iommu_array, i, info) { found =3D true; - if (!iommu_paging_structure_coherency(g_iommus[i])) { + if (!iommu_paging_structure_coherency(info->iommu)) { domain->iommu_coherency =3D false; break; } @@ -1495,7 +1491,7 @@ static void iommu_flush_iotlb_psi(struct intel_iommu = *iommu, unsigned int aligned_pages =3D __roundup_pow_of_two(pages); unsigned int mask =3D ilog2(aligned_pages); uint64_t addr =3D (uint64_t)pfn << VTD_PAGE_SHIFT; - u16 did =3D domain->iommu_did[iommu->seq_id]; + u16 did =3D domain_id_iommu(domain, iommu); =20 BUG_ON(pages =3D=3D 0); =20 @@ -1565,11 +1561,12 @@ static inline void __mapping_notify_one(struct inte= l_iommu *iommu, static void intel_flush_iotlb_all(struct iommu_domain *domain) { struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); - int idx; + struct iommu_domain_info *info; + unsigned long idx; =20 - for_each_domain_iommu(idx, dmar_domain) { - struct intel_iommu *iommu =3D g_iommus[idx]; - u16 did =3D dmar_domain->iommu_did[iommu->seq_id]; + xa_for_each(&dmar_domain->iommu_array, idx, info) { + struct intel_iommu *iommu =3D info->iommu; + u16 did =3D domain_id_iommu(dmar_domain, iommu); =20 if (domain_use_first_level(dmar_domain)) qi_flush_piotlb(iommu, did, PASID_RID2PASID, 0, -1, 0); @@ -1745,6 +1742,7 @@ static struct dmar_domain *alloc_domain(unsigned int = type) domain->has_iotlb_device =3D false; INIT_LIST_HEAD(&domain->devices); spin_lock_init(&domain->lock); + xa_init(&domain->iommu_array); =20 return domain; } @@ -1752,45 +1750,64 @@ static struct dmar_domain *alloc_domain(unsigned in= t type) static int domain_attach_iommu(struct dmar_domain *domain, struct intel_iommu *iommu) { + struct iommu_domain_info *info, *curr; unsigned long ndomains; - int num, ret =3D 0; + int num, ret =3D -ENOSPC; =20 - spin_lock(&iommu->lock); - domain->iommu_refcnt[iommu->seq_id] +=3D 1; - if (domain->iommu_refcnt[iommu->seq_id] =3D=3D 1) { - ndomains =3D cap_ndoms(iommu->cap); - num =3D find_first_zero_bit(iommu->domain_ids, ndomains); - - if (num >=3D ndomains) { - pr_err("%s: No free domain ids\n", iommu->name); - domain->iommu_refcnt[iommu->seq_id] -=3D 1; - ret =3D -ENOSPC; - goto out_unlock; - } + info =3D kzalloc(sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; =20 - set_bit(num, iommu->domain_ids); - domain->iommu_did[iommu->seq_id] =3D num; - domain->nid =3D iommu->node; - domain_update_iommu_cap(domain); + spin_lock(&iommu->lock); + curr =3D xa_load(&domain->iommu_array, iommu->seq_id); + if (curr) { + curr->refcnt++; + kfree(info); + goto success; } =20 -out_unlock: + ndomains =3D cap_ndoms(iommu->cap); + num =3D find_first_zero_bit(iommu->domain_ids, ndomains); + if (num >=3D ndomains) { + pr_err("%s: No free domain ids\n", iommu->name); + goto err_unlock; + } + + set_bit(num, iommu->domain_ids); + info->refcnt =3D 1; + info->did =3D num; + info->iommu =3D iommu; + domain->nid =3D iommu->node; + ret =3D xa_err(xa_store(&domain->iommu_array, iommu->seq_id, + info, GFP_ATOMIC)); + if (ret) + goto err_clear; + domain_update_iommu_cap(domain); + +success: + spin_unlock(&iommu->lock); + return 0; + +err_clear: + clear_bit(info->did, iommu->domain_ids); +err_unlock: spin_unlock(&iommu->lock); + kfree(info); return ret; } =20 static void domain_detach_iommu(struct dmar_domain *domain, struct intel_iommu *iommu) { - int num; + struct iommu_domain_info *info; =20 spin_lock(&iommu->lock); - domain->iommu_refcnt[iommu->seq_id] -=3D 1; - if (domain->iommu_refcnt[iommu->seq_id] =3D=3D 0) { - num =3D domain->iommu_did[iommu->seq_id]; - clear_bit(num, iommu->domain_ids); + info =3D xa_load(&domain->iommu_array, iommu->seq_id); + if (--info->refcnt =3D=3D 0) { + clear_bit(info->did, iommu->domain_ids); + xa_erase(&domain->iommu_array, iommu->seq_id); domain_update_iommu_cap(domain); - domain->iommu_did[iommu->seq_id] =3D 0; + kfree(info); } spin_unlock(&iommu->lock); } @@ -1880,7 +1897,7 @@ static int domain_context_mapping_one(struct dmar_dom= ain *domain, { struct device_domain_info *info =3D iommu_support_dev_iotlb(domain, iommu, bus, devfn); - u16 did =3D domain->iommu_did[iommu->seq_id]; + u16 did =3D domain_id_iommu(domain, iommu); int translation =3D CONTEXT_TT_MULTI_LEVEL; struct context_entry *context; int ret; @@ -2130,8 +2147,9 @@ static void switch_to_super_page(struct dmar_domain *= domain, unsigned long end_pfn, int level) { unsigned long lvl_pages =3D lvl_to_nr_pages(level); + struct iommu_domain_info *info; struct dma_pte *pte =3D NULL; - int i; + unsigned long i; =20 while (start_pfn <=3D end_pfn) { if (!pte) @@ -2142,8 +2160,8 @@ static void switch_to_super_page(struct dmar_domain *= domain, start_pfn + lvl_pages - 1, level + 1); =20 - for_each_domain_iommu(i, domain) - iommu_flush_iotlb_psi(g_iommus[i], domain, + xa_for_each(&domain->iommu_array, i, info) + iommu_flush_iotlb_psi(info->iommu, domain, start_pfn, lvl_pages, 0, 0); } @@ -2273,7 +2291,7 @@ static void domain_context_clear_one(struct device_do= main_info *info, u8 bus, u8 if (hw_pass_through && domain_type_is_si(info->domain)) did_old =3D FLPT_DEFAULT_DID; else - did_old =3D info->domain->iommu_did[iommu->seq_id]; + did_old =3D domain_id_iommu(info->domain, iommu); } else { did_old =3D context_domain_id(context); } @@ -2331,7 +2349,7 @@ static int domain_setup_first_level(struct intel_iomm= u *iommu, flags |=3D PASID_FLAG_PAGE_SNOOP; =20 return intel_pasid_setup_first_level(iommu, dev, (pgd_t *)pgd, pasid, - domain->iommu_did[iommu->seq_id], + domain_id_iommu(domain, iommu), flags); } =20 @@ -4369,15 +4387,16 @@ static void intel_iommu_tlb_sync(struct iommu_domai= n *domain, struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); unsigned long iova_pfn =3D IOVA_PFN(gather->start); size_t size =3D gather->end - gather->start; + struct iommu_domain_info *info; unsigned long start_pfn; unsigned long nrpages; - int iommu_id; + unsigned long i; =20 nrpages =3D aligned_nrpages(gather->start, size); start_pfn =3D mm_to_dma_pfn(iova_pfn); =20 - for_each_domain_iommu(iommu_id, dmar_domain) - iommu_flush_iotlb_psi(g_iommus[iommu_id], dmar_domain, + xa_for_each(&dmar_domain->iommu_array, i, info) + iommu_flush_iotlb_psi(info->iommu, dmar_domain, start_pfn, nrpages, list_empty(&gather->freelist), 0); =20 @@ -4622,7 +4641,7 @@ int intel_iommu_enable_pasid(struct intel_iommu *iomm= u, struct device *dev) context[0].lo =3D ctx_lo; wmb(); iommu->flush.flush_context(iommu, - domain->iommu_did[iommu->seq_id], + domain_id_iommu(domain, iommu), PCI_DEVID(info->bus, info->devfn), DMA_CCMD_MASK_NOBIT, DMA_CCMD_DEVICE_INVL); @@ -4759,13 +4778,11 @@ static void intel_iommu_iotlb_sync_map(struct iommu= _domain *domain, struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); unsigned long pages =3D aligned_nrpages(iova, size); unsigned long pfn =3D iova >> VTD_PAGE_SHIFT; - struct intel_iommu *iommu; - int iommu_id; + struct iommu_domain_info *info; + unsigned long i; =20 - for_each_domain_iommu(iommu_id, dmar_domain) { - iommu =3D g_iommus[iommu_id]; - __mapping_notify_one(iommu, dmar_domain, pfn, pages); - } + xa_for_each(&dmar_domain->iommu_array, i, info) + __mapping_notify_one(info->iommu, dmar_domain, pfn, pages); } =20 const struct iommu_ops intel_iommu_ops =3D { diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c index c30de2339de5..006026dc18d4 100644 --- a/drivers/iommu/intel/pasid.c +++ b/drivers/iommu/intel/pasid.c @@ -626,7 +626,7 @@ int intel_pasid_setup_second_level(struct intel_iommu *= iommu, } =20 pgd_val =3D virt_to_phys(pgd); - did =3D domain->iommu_did[iommu->seq_id]; + did =3D domain_id_iommu(domain, iommu); =20 spin_lock(&iommu->lock); pte =3D intel_pasid_get_entry(dev, pasid); diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index 64072e628bbd..8bcfb93dda56 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -541,7 +541,7 @@ static void intel_svm_drain_prq(struct device *dev, u32= pasid) domain =3D info->domain; pdev =3D to_pci_dev(dev); sid =3D PCI_DEVID(info->bus, info->devfn); - did =3D domain->iommu_did[iommu->seq_id]; + did =3D domain_id_iommu(domain, iommu); qdep =3D pci_ats_queue_depth(pdev); =20 /* --=20 2.25.1 From nobody Sun Apr 19 21:55:35 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3F5AC43334 for ; Sat, 25 Jun 2022 12:56:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232955AbiFYM4p (ORCPT ); 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X-IronPort-AV: E=McAfee;i="6400,9594,10388"; a="278727983" X-IronPort-AV: E=Sophos;i="5.92,222,1650956400"; d="scan'208";a="278727983" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2022 05:56:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,222,1650956400"; d="scan'208";a="586890393" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga007.jf.intel.com with ESMTP; 25 Jun 2022 05:56:39 -0700 From: Lu Baolu To: Joerg Roedel , Steve Wahl , Kevin Tian Cc: David Woodhouse , Jerry Snitselaar , Mike Travis , Dimitri Sivanich , Russ Anderson , iommu@lists.linux.dev, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v1 4/6] iommu/vt-d: Add VTD_FLAG_IOMMU_PROBED flag Date: Sat, 25 Jun 2022 20:52:02 +0800 Message-Id: <20220625125204.2199437-5-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220625125204.2199437-1-baolu.lu@linux.intel.com> References: <20220625125204.2199437-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In the IOMMU hot-add path, there's a need to check whether an IOMMU has been probed. Instead of checking the IOMMU pointer in the global list, it's better to allocate a flag bit in iommu->flags for this purpose. Signed-off-by: Lu Baolu Reviewed-by: Steve Wahl --- drivers/iommu/intel/iommu.h | 1 + drivers/iommu/intel/iommu.c | 5 ++++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index 56c3d1a9e155..105a1e7c60d9 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -479,6 +479,7 @@ enum { #define VTD_FLAG_TRANS_PRE_ENABLED (1 << 0) #define VTD_FLAG_IRQ_REMAP_PRE_ENABLED (1 << 1) #define VTD_FLAG_SVM_CAPABLE (1 << 2) +#define VTD_FLAG_IOMMU_PROBED (1 << 3) =20 extern int intel_iommu_sm; =20 diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 78b26fef685e..f6d7055cffd7 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1695,6 +1695,7 @@ static void free_dmar_iommu(struct intel_iommu *iommu) } =20 g_iommus[iommu->seq_id] =3D NULL; + iommu->flags &=3D ~VTD_FLAG_IOMMU_PROBED; =20 /* free context mapping */ free_context_table(iommu); @@ -2951,6 +2952,7 @@ static int __init init_dmars(void) } =20 g_iommus[iommu->seq_id] =3D iommu; + iommu->flags |=3D VTD_FLAG_IOMMU_PROBED; =20 intel_iommu_init_qi(iommu); =20 @@ -3460,7 +3462,7 @@ static int intel_iommu_add(struct dmar_drhd_unit *dma= ru) int sp, ret; struct intel_iommu *iommu =3D dmaru->iommu; =20 - if (g_iommus[iommu->seq_id]) + if (iommu->flags & VTD_FLAG_IOMMU_PROBED) return 0; =20 ret =3D intel_cap_audit(CAP_AUDIT_HOTPLUG_DMAR, iommu); @@ -3487,6 +3489,7 @@ static int intel_iommu_add(struct dmar_drhd_unit *dma= ru) iommu_disable_translation(iommu); =20 g_iommus[iommu->seq_id] =3D iommu; + iommu->flags |=3D VTD_FLAG_IOMMU_PROBED; ret =3D iommu_init_domains(iommu); if (ret =3D=3D 0) ret =3D iommu_alloc_root_entry(iommu); --=20 2.25.1 From nobody Sun Apr 19 21:55:35 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F061FC433EF for ; Sat, 25 Jun 2022 12:56:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232964AbiFYM4u (ORCPT ); Sat, 25 Jun 2022 08:56:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46290 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232950AbiFYM4q (ORCPT ); Sat, 25 Jun 2022 08:56:46 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66F7D1836D for ; Sat, 25 Jun 2022 05:56:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656161805; x=1687697805; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ln3n9F0ShlVuPAtczPL0XqN7vo4FAVJWYWhIOXlcAvo=; b=JftxZ00V2DWnM9+NwEkhKBe93JCiKoI9ERJ7m96uIXaTGPAN/q2zxHFw yt0LzbaZq7w0Yv/U2Zr51e/xMiEcKNoFoVXy/PdPq8vD8BA+CgjiB41y6 pkOpN5eyJJuW0JVZU31N71WIEmgsTLycZFLfSN8sQpVliyhd7nel7f2cj cuLAhAV+TbbsEJEpmbTVk9Y28q/mMq3hqTH5VYrFcaLhCRR5C05cRZJJN s8ktjLDOwW8qIiWxn3cDobN0wjzeF5L1WYOfpFbZJ20a6L0urDpfQl/Mx Vu0tZaBvRsfMTttFGlhva9SFG+fPrw2CmBDKDrWIWhMqmIWksGb5npidw Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10388"; a="278727999" X-IronPort-AV: E=Sophos;i="5.92,222,1650956400"; d="scan'208";a="278727999" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2022 05:56:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,222,1650956400"; d="scan'208";a="586890402" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga007.jf.intel.com with ESMTP; 25 Jun 2022 05:56:42 -0700 From: Lu Baolu To: Joerg Roedel , Steve Wahl , Kevin Tian Cc: David Woodhouse , Jerry Snitselaar , Mike Travis , Dimitri Sivanich , Russ Anderson , iommu@lists.linux.dev, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v1 5/6] iommu/vt-d: Remove global g_iommus array Date: Sat, 25 Jun 2022 20:52:03 +0800 Message-Id: <20220625125204.2199437-6-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220625125204.2199437-1-baolu.lu@linux.intel.com> References: <20220625125204.2199437-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The g_iommus is not used anywhere. Remove it to avoid dead code. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Reviewed-by: Steve Wahl --- drivers/iommu/intel/iommu.c | 42 ------------------------------------- 1 file changed, 42 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index f6d7055cffd7..9a284394b2c5 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -126,9 +126,6 @@ static inline unsigned long virt_to_dma_pfn(void *p) return page_to_dma_pfn(virt_to_page(p)); } =20 -/* global iommu list, set NULL for ignored DMAR units */ -static struct intel_iommu **g_iommus; - static void __init check_tylersburg_isoch(void); static int rwbf_quirk; =20 @@ -287,9 +284,6 @@ static LIST_HEAD(dmar_satc_units); #define for_each_rmrr_units(rmrr) \ list_for_each_entry(rmrr, &dmar_rmrr_units, list) =20 -/* bitmap for indexing intel_iommus */ -static int g_num_of_iommus; - static void dmar_remove_one_dev_info(struct device *dev); =20 int dmar_disabled =3D !IS_ENABLED(CONFIG_INTEL_IOMMU_DEFAULT_ON); @@ -1694,7 +1688,6 @@ static void free_dmar_iommu(struct intel_iommu *iommu) iommu->domain_ids =3D NULL; } =20 - g_iommus[iommu->seq_id] =3D NULL; iommu->flags &=3D ~VTD_FLAG_IOMMU_PROBED; =20 /* free context mapping */ @@ -2899,36 +2892,6 @@ static int __init init_dmars(void) struct intel_iommu *iommu; int ret; =20 - /* - * for each drhd - * allocate root - * initialize and program root entry to not present - * endfor - */ - for_each_drhd_unit(drhd) { - /* - * lock not needed as this is only incremented in the single - * threaded kernel __init code path all other access are read - * only - */ - if (g_num_of_iommus < DMAR_UNITS_SUPPORTED) { - g_num_of_iommus++; - continue; - } - pr_err_once("Exceeded %d IOMMUs\n", DMAR_UNITS_SUPPORTED); - } - - /* Preallocate enough resources for IOMMU hot-addition */ - if (g_num_of_iommus < DMAR_UNITS_SUPPORTED) - g_num_of_iommus =3D DMAR_UNITS_SUPPORTED; - - g_iommus =3D kcalloc(g_num_of_iommus, sizeof(struct intel_iommu *), - GFP_KERNEL); - if (!g_iommus) { - ret =3D -ENOMEM; - goto error; - } - ret =3D intel_cap_audit(CAP_AUDIT_STATIC_DMAR, NULL); if (ret) goto free_iommu; @@ -2951,7 +2914,6 @@ static int __init init_dmars(void) intel_pasid_max_id); } =20 - g_iommus[iommu->seq_id] =3D iommu; iommu->flags |=3D VTD_FLAG_IOMMU_PROBED; =20 intel_iommu_init_qi(iommu); @@ -3079,9 +3041,6 @@ static int __init init_dmars(void) free_dmar_iommu(iommu); } =20 - kfree(g_iommus); - -error: return ret; } =20 @@ -3488,7 +3447,6 @@ static int intel_iommu_add(struct dmar_drhd_unit *dma= ru) if (iommu->gcmd & DMA_GCMD_TE) iommu_disable_translation(iommu); =20 - g_iommus[iommu->seq_id] =3D iommu; iommu->flags |=3D VTD_FLAG_IOMMU_PROBED; ret =3D iommu_init_domains(iommu); if (ret =3D=3D 0) --=20 2.25.1 From nobody Sun Apr 19 21:55:35 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB834C433EF for ; Sat, 25 Jun 2022 12:56:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232968AbiFYM4x (ORCPT ); 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X-IronPort-AV: E=McAfee;i="6400,9594,10388"; a="278728008" X-IronPort-AV: E=Sophos;i="5.92,222,1650956400"; d="scan'208";a="278728008" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2022 05:56:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,222,1650956400"; d="scan'208";a="586890410" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga007.jf.intel.com with ESMTP; 25 Jun 2022 05:56:45 -0700 From: Lu Baolu To: Joerg Roedel , Steve Wahl , Kevin Tian Cc: David Woodhouse , Jerry Snitselaar , Mike Travis , Dimitri Sivanich , Russ Anderson , iommu@lists.linux.dev, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v1 6/6] iommu/vt-d: Make DMAR_UNITS_SUPPORTED default 1024 Date: Sat, 25 Jun 2022 20:52:04 +0800 Message-Id: <20220625125204.2199437-7-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220625125204.2199437-1-baolu.lu@linux.intel.com> References: <20220625125204.2199437-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" If the available hardware exceeds DMAR_UNITS_SUPPORTED (previously set to MAX_IO_APICS, or 128), it causes these messages: "DMAR: Failed to allocate seq_id", "DMAR: Parse DMAR table failure.", and "x2apic: IRQ remapping doesn't support X2APIC mode x2apic disabled"; and the system fails to boot properly. To support up to 64 sockets with 10 DMAR units each (640), make the value of DMAR_UNITS_SUPPORTED default 1024. Signed-off-by: Steve Wahl Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Reviewed-by: Steve Wahl --- include/linux/dmar.h | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/include/linux/dmar.h b/include/linux/dmar.h index cbd714a198a0..d81a51978d01 100644 --- a/include/linux/dmar.h +++ b/include/linux/dmar.h @@ -18,11 +18,7 @@ =20 struct acpi_dmar_header; =20 -#ifdef CONFIG_X86 -# define DMAR_UNITS_SUPPORTED MAX_IO_APICS -#else -# define DMAR_UNITS_SUPPORTED 64 -#endif +#define DMAR_UNITS_SUPPORTED 1024 =20 /* DMAR Flags */ #define DMAR_INTR_REMAP 0x1 --=20 2.25.1