From nobody Sun Sep 22 02:01:37 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6EBE6C433EF for ; Fri, 24 Jun 2022 03:11:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231370AbiFXDLD (ORCPT ); Thu, 23 Jun 2022 23:11:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231154AbiFXDKC (ORCPT ); Thu, 23 Jun 2022 23:10:02 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E0F4340C7; Thu, 23 Jun 2022 20:10:00 -0700 (PDT) X-UUID: b180011f8b744dd7a1f3003e94f161db-20220624 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6,REQID:000c6e44-d060-4dfa-8178-3ee74f99e0b1,OB:0,LO B:0,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:5 X-CID-META: VersionHash:b14ad71,CLOUDID:c4d05638-5e4b-44d7-80b2-bb618cb09d29,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:1,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: b180011f8b744dd7a1f3003e94f161db-20220624 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 697777858; Fri, 24 Jun 2022 11:09:51 +0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 24 Jun 2022 11:09:50 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 24 Jun 2022 11:09:49 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Fri, 24 Jun 2022 11:09:49 +0800 From: Bo-Chen Chen To: , , , , , , CC: , , , , , , , , , , , , Bo-Chen Chen Subject: [PATCH v14 08/15] drm/mediatek: dpi: move hvsize_mask to SoC config Date: Fri, 24 Jun 2022 11:09:39 +0800 Message-ID: <20220624030946.14961-9-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220624030946.14961-1-rex-bc.chen@mediatek.com> References: <20220624030946.14961-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Guillaume Ranquet Add flexibility by moving the hvsize mask to SoC specific config. Signed-off-by: Guillaume Ranquet Signed-off-by: Bo-Chen Chen Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rex-BC Chen Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_dpi.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/= mtk_dpi.c index 2cc6f1339024..e1aa62f0e763 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -130,6 +130,7 @@ struct mtk_dpi_yc_limit { * @swap_input_support: Support input swap function. * @dimension_mask: Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PO= RCH * (no shift). + * @hvsize_mask: Mask of HSIZE and VSIZE mask (no shift). */ struct mtk_dpi_conf { unsigned int (*cal_factor)(int clock); @@ -141,6 +142,7 @@ struct mtk_dpi_conf { bool is_ck_de_pol; bool swap_input_support; u32 dimension_mask; + u32 hvsize_mask; }; =20 static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mas= k) @@ -254,8 +256,10 @@ static void mtk_dpi_config_interface(struct mtk_dpi *d= pi, bool inter) =20 static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 hei= ght) { - mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE, HSIZE_MASK); - mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK); + mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE, + dpi->conf->hvsize_mask << HSIZE); + mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, + dpi->conf->hvsize_mask << VSIZE); } =20 static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi) @@ -836,6 +840,7 @@ static const struct mtk_dpi_conf mt8173_conf =3D { .is_ck_de_pol =3D true, .swap_input_support =3D true, .dimension_mask =3D HPW_MASK, + .hvsize_mask =3D HSIZE_MASK, }; =20 static const struct mtk_dpi_conf mt2701_conf =3D { @@ -848,6 +853,7 @@ static const struct mtk_dpi_conf mt2701_conf =3D { .is_ck_de_pol =3D true, .swap_input_support =3D true, .dimension_mask =3D HPW_MASK, + .hvsize_mask =3D HSIZE_MASK, }; =20 static const struct mtk_dpi_conf mt8183_conf =3D { @@ -859,6 +865,7 @@ static const struct mtk_dpi_conf mt8183_conf =3D { .is_ck_de_pol =3D true, .swap_input_support =3D true, .dimension_mask =3D HPW_MASK, + .hvsize_mask =3D HSIZE_MASK, }; =20 static const struct mtk_dpi_conf mt8192_conf =3D { @@ -870,6 +877,7 @@ static const struct mtk_dpi_conf mt8192_conf =3D { .is_ck_de_pol =3D true, .swap_input_support =3D true, .dimension_mask =3D HPW_MASK, + .hvsize_mask =3D HSIZE_MASK, }; =20 static int mtk_dpi_probe(struct platform_device *pdev) --=20 2.18.0