From nobody Sat Sep 21 21:27:11 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C07B4CCA487 for ; Thu, 23 Jun 2022 19:44:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231558AbiFWTot (ORCPT ); Thu, 23 Jun 2022 15:44:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229658AbiFWToW (ORCPT ); Thu, 23 Jun 2022 15:44:22 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E36BE033; Thu, 23 Jun 2022 12:37:10 -0700 (PDT) Received: from notapiano.myfiosgateway.com (pool-98-113-53-228.nycmny.fios.verizon.net [98.113.53.228]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 09F7966017E9; Thu, 23 Jun 2022 20:37:07 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656013029; bh=lwViBhJmQ4/VLbe6swJu1r+MvFhkFBSR7vNRdATdHGM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZvZ2UyUNN7W3hH7fIv4ijJ4u54yR4ttyl7sF731m2+vrdlaGq11/BgdbNdx47Q7Fd sJk8ScUQuYDXFWzYJQG577TfaibR87aK5291xkThfd63qkgcyCWzb9LotVSgQcWznl eBHh9U5yG7UKezERUN4sEE3ttSaZE2OQiEEHgone5yNJgD4zctTzgdhfovXVM4dJz4 xAAbphNQoju41Jf+PZeefeFOIYVvkpeU2I+OB6fzQvQ59MWFCIuLYzzat2OwCCNqUC eWU827r9gblwPaKQq264XTbx8GL4kuRDWNPORAAdSudIOSPeBi9ezLsxJL42bFU3xJ PNp3BXGfJqtqQ== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Greg Kroah-Hartman , Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Chunfeng Yun , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-usb@vger.kernel.org Subject: [PATCH v2 1/4] dt-bindings: usb: mtk-xhci: Allow wakeup interrupt-names to be optional Date: Thu, 23 Jun 2022 15:36:59 -0400 Message-Id: <20220623193702.817996-2-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220623193702.817996-1-nfraprado@collabora.com> References: <20220623193702.817996-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add missing "minItems: 1" to the interrupt-names property to allow the second interrupt-names, "wakeup", to be optional. Fixes: fe8e488058c4 ("dt-bindings: usb: mtk-xhci: add wakeup interrupt") Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: Krzysztof Kozlowski Acked-by: Chunfeng Yun --- (no changes since v1) Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b= /Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml index 892718459d25..63cbc2b62d18 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml @@ -57,6 +57,7 @@ properties: - description: optional, wakeup interrupt used to support runtime PM =20 interrupt-names: + minItems: 1 items: - const: host - const: wakeup --=20 2.36.1 From nobody Sat Sep 21 21:27:11 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F606C43334 for ; Thu, 23 Jun 2022 19:44:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231991AbiFWTov (ORCPT ); Thu, 23 Jun 2022 15:44:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231398AbiFWToX (ORCPT ); Thu, 23 Jun 2022 15:44:23 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BC81101E1; Thu, 23 Jun 2022 12:37:12 -0700 (PDT) Received: from notapiano.myfiosgateway.com (pool-98-113-53-228.nycmny.fios.verizon.net [98.113.53.228]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id C448C66017EB; Thu, 23 Jun 2022 20:37:09 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656013031; bh=kok2Tk9hNC8W/8hBE+yjTgkvfCjAF1IKTQhZZf2MFyE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=A6UvB1vgu6Ke9+L8pNqa9NYbo0Ma5QNsklJOHsPJQiCYD0Nt+bJD+wvZZi25MVYmd bdGsdXKjCH63Cd1KQ8ord23GcpnzboiI7MynL6TBUwRH1AMG74rGQ4rI/QqaPVrgeh SwZqRrjfYFn1XZbHTHpEAkvwYjtLqf8aJ38vt7Dq2KVttpve7cXznmCCVv3P9kFVMT hv7lYf22stokSgbpIAX0x/iWcuEL9fhyln4jFppmTcOrofFnIRHVRptG7uTkoBclDZ NZqWh4EpdllpxED/zZSk9tKfOfw1oiJfuw8ApPtCc99MnxmEMCv/A9Z4uW3ZxLgRjg wPRcM8EBIgTdA== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Greg Kroah-Hartman , Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Chunfeng Yun , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-usb@vger.kernel.org Subject: [PATCH v2 2/4] dt-bindings: usb: mtk-xhci: Make all clocks required Date: Thu, 23 Jun 2022 15:37:00 -0400 Message-Id: <20220623193702.817996-3-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220623193702.817996-1-nfraprado@collabora.com> References: <20220623193702.817996-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org All of the clocks listed in the binding are always wired to the XHCI controller hardware blocks on all SoCs. The reason some clocks were made optional in the binding was to account for the fact that depending on the SoC, some of the clocks might be fixed (ie not controlled by software). Given that the devicetree should represent the hardware, make all clocks required in the binding. Subsequent patches will make the DTS changes to specify fixed-clocks for the clocks that aren't controllable. Signed-off-by: N=C3=ADcolas F. R. A. Prado --- Changes in v2: - Undid clock list changes that allowed middle clocks to be missing from v1 and made all clocks required instead - Rewrote commit message and title Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b= /Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml index 63cbc2b62d18..1444d18ef9bc 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml @@ -67,7 +67,6 @@ properties: maxItems: 1 =20 clocks: - minItems: 1 items: - description: Controller clock used by normal mode - description: Reference clock used by low power mode etc @@ -76,9 +75,8 @@ properties: - description: controller clock =20 clock-names: - minItems: 1 items: - - const: sys_ck # required, the following ones are optional + - const: sys_ck - const: ref_ck - const: mcu_ck - const: dma_ck --=20 2.36.1 From nobody Sat Sep 21 21:27:11 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91E86C43334 for ; Thu, 23 Jun 2022 19:45:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231818AbiFWTpM (ORCPT ); Thu, 23 Jun 2022 15:45:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43206 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229670AbiFWToY (ORCPT ); Thu, 23 Jun 2022 15:44:24 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC72D10578; Thu, 23 Jun 2022 12:37:13 -0700 (PDT) Received: from notapiano.myfiosgateway.com (pool-98-113-53-228.nycmny.fios.verizon.net [98.113.53.228]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 976A566017ED; Thu, 23 Jun 2022 20:37:11 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656013032; bh=/LxDQPxHfyiUgre3GB0q3RHmhgoanHBngDjpfGX6Yog=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YIJmxzUzOGfV1BE9Z0Gl813sbwN2bP6aPOeYICMsWlLBhiyw4cZHuqfQwcoTESyXP 26OdUbC0sFhQDxvVVYfyziQsR4dIKL0aw+7+iOTMw04i73FV3uY2MUWpHoDJ3QHPft LBfycqcEv8D/U+tobyVXMm9P9XCx+WhduJShgqt4hyZEqERJYQZ0Qdjlh7guDqnGp3 8O0dZKwAmcK6QeAFt/EOVuQMUs5YTbnyOA2WJesqGv/zCNtOPS9E2NtyUsz26vwxfB g3vYlbR+R25VGetwCC00lXXZko8tdV4y2p0G9ZGuDlP6b1150NxuVM0j9HeVTE6osv i4NL/dGxAA1nw== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Greg Kroah-Hartman , Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 3/4] arm64: dts: mediatek: Set fixed-clock for missing XHCI clocks Date: Thu, 23 Jun 2022 15:37:01 -0400 Message-Id: <20220623193702.817996-4-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220623193702.817996-1-nfraprado@collabora.com> References: <20220623193702.817996-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The XHCI controller hardware always has all clocks wired, however depending on the SoC, some of them might be fixed (ie not controllable). These fixed clocks were previously omitted from the devicetree entirely. In order to better describe the hardware on the devicetree, and to have a fixed order of clocks for all SoCs, add the missing non-controllable clocks as phandles to a fixed-clock node. By keeping a fixed clock order, this gets rid of dtbs_check warnings on mt8192 and mt8195. Signed-off-by: N=C3=ADcolas F. R. A. Prado --- Changes in v2: - Instead of simply reordering the clocks on mt8192, added missing fixed clocks for all arm64 dts - Rewrote commit message and title arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 18 ++++++++++++++---- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 5 +++-- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 9 +++++++-- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 ++++++-- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 9 ++++++--- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 18 ++++++++++++++---- 6 files changed, 50 insertions(+), 17 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dt= s/mediatek/mt2712e.dtsi index 623eb3beabf2..941d6a19075c 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -816,8 +816,13 @@ usb_host0: usb@11270000 { reg-names =3D "mac"; interrupts =3D ; power-domains =3D <&scpsys MT2712_POWER_DOMAIN_USB>; - clocks =3D <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>; - clock-names =3D "sys_ck", "ref_ck"; + clocks =3D <&topckgen CLK_TOP_USB30_SEL>, + <&clk26m>, + <&clk26m>, + <&clk26m>, + <&clk26m>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", + "xhci_ck"; status =3D "disabled"; }; }; @@ -880,8 +885,13 @@ usb_host1: usb@112c0000 { reg-names =3D "mac"; interrupts =3D ; power-domains =3D <&scpsys MT2712_POWER_DOMAIN_USB2>; - clocks =3D <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>; - clock-names =3D "sys_ck", "ref_ck"; + clocks =3D <&topckgen CLK_TOP_USB30_SEL>, + <&clk26m>, + <&clk26m>, + <&clk26m>, + <&clk26m>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", + "xhci_ck"; status =3D "disabled"; }; }; diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts= /mediatek/mt7622.dtsi index 146e18b5b1f4..04ba0773dda3 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -752,8 +752,9 @@ ssusb: usb@1a0c0000 { clocks =3D <&ssusbsys CLK_SSUSB_SYS_EN>, <&ssusbsys CLK_SSUSB_REF_EN>, <&ssusbsys CLK_SSUSB_MCU_EN>, - <&ssusbsys CLK_SSUSB_DMA_EN>; - clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; + <&ssusbsys CLK_SSUSB_DMA_EN>, + <&clk25m>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; phys =3D <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>, <&u2port1 PHY_TYPE_USB2>; diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts= /mediatek/mt8173.dtsi index d1f3dc5dec35..3b64651f7a43 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -943,8 +943,13 @@ usb_host: usb@11270000 { reg-names =3D "mac"; interrupts =3D ; power-domains =3D <&spm MT8173_POWER_DOMAIN_USB>; - clocks =3D <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>; - clock-names =3D "sys_ck", "ref_ck"; + clocks =3D <&topckgen CLK_TOP_USB30_SEL>, + <&clk26m>, + <&clk26m>, + <&clk26m>, + <&clk26m>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", + "dma_ck", "xhci_ck"; status =3D "disabled"; }; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts= /mediatek/mt8183.dtsi index e92a0b8c1ee2..fe114f70f677 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1471,8 +1471,12 @@ usb_host: usb@11200000 { reg-names =3D "mac"; interrupts =3D ; clocks =3D <&infracfg CLK_INFRA_UNIPRO_SCK>, - <&infracfg CLK_INFRA_USB>; - clock-names =3D "sys_ck", "ref_ck"; + <&infracfg CLK_INFRA_USB>, + <&clk26m>, + <&clk26m>, + <&clk26m>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", + "dma_ck", "xhci_ck"; status =3D "disabled"; }; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 733aec2e7f77..fd2ab1f2a1bb 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -723,9 +723,12 @@ xhci: usb@11200000 { assigned-clock-parents =3D <&topckgen CLK_TOP_UNIVPLL_D5_D4>, <&topckgen CLK_TOP_UNIVPLL_D5_D4>; clocks =3D <&infracfg CLK_INFRA_SSUSB>, - <&infracfg CLK_INFRA_SSUSB_XHCI>, - <&apmixedsys CLK_APMIXED_USBPLL>; - clock-names =3D "sys_ck", "xhci_ck", "ref_ck"; + <&apmixedsys CLK_APMIXED_USBPLL>, + <&clk26m>, + <&clk26m>, + <&infracfg CLK_INFRA_SSUSB_XHCI>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", + "xhci_ck"; wakeup-source; mediatek,syscon-wakeup =3D <&pericfg 0x420 102>; status =3D "disabled"; diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 3ad14e0e0956..8e9783953795 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -571,8 +571,10 @@ xhci0: usb@11200000 { clocks =3D <&infracfg_ao CLK_INFRA_AO_SSUSB>, <&topckgen CLK_TOP_SSUSB_REF>, <&apmixedsys CLK_APMIXED_USB1PLL>, + <&clk26m>, <&infracfg_ao CLK_INFRA_AO_SSUSB_XHCI>; - clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "xhci_ck"; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", + "xhci_ck"; mediatek,syscon-wakeup =3D <&pericfg 0x400 103>; wakeup-source; status =3D "disabled"; @@ -636,8 +638,10 @@ xhci1: usb@11290000 { clocks =3D <&pericfg_ao CLK_PERI_AO_SSUSB_1P_BUS>, <&topckgen CLK_TOP_SSUSB_P1_REF>, <&apmixedsys CLK_APMIXED_USB1PLL>, + <&clk26m>, <&pericfg_ao CLK_PERI_AO_SSUSB_1P_XHCI>; - clock-names =3D "sys_ck", "ref_ck", "mcu_ck","xhci_ck"; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", + "xhci_ck"; mediatek,syscon-wakeup =3D <&pericfg 0x400 104>; wakeup-source; status =3D "disabled"; @@ -657,8 +661,11 @@ xhci2: usb@112a0000 { <&topckgen CLK_TOP_UNIVPLL_D5_D4>; clocks =3D <&pericfg_ao CLK_PERI_AO_SSUSB_2P_BUS>, <&topckgen CLK_TOP_SSUSB_P2_REF>, + <&clk26m>, + <&clk26m>, <&pericfg_ao CLK_PERI_AO_SSUSB_2P_XHCI>; - clock-names =3D "sys_ck", "ref_ck", "xhci_ck"; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", + "xhci_ck"; mediatek,syscon-wakeup =3D <&pericfg 0x400 105>; wakeup-source; status =3D "disabled"; @@ -678,8 +685,11 @@ xhci3: usb@112b0000 { <&topckgen CLK_TOP_UNIVPLL_D5_D4>; clocks =3D <&pericfg_ao CLK_PERI_AO_SSUSB_3P_BUS>, <&topckgen CLK_TOP_SSUSB_P3_REF>, + <&clk26m>, + <&clk26m>, <&pericfg_ao CLK_PERI_AO_SSUSB_3P_XHCI>; - clock-names =3D "sys_ck", "ref_ck", "xhci_ck"; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", + "xhci_ck"; mediatek,syscon-wakeup =3D <&pericfg 0x400 106>; wakeup-source; status =3D "disabled"; --=20 2.36.1 From nobody Sat Sep 21 21:27:11 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53C22C43334 for ; Thu, 23 Jun 2022 19:44:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231138AbiFWToy (ORCPT ); Thu, 23 Jun 2022 15:44:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229666AbiFWToY (ORCPT ); Thu, 23 Jun 2022 15:44:24 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8183F98; Thu, 23 Jun 2022 12:37:15 -0700 (PDT) Received: from notapiano.myfiosgateway.com (pool-98-113-53-228.nycmny.fios.verizon.net [98.113.53.228]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 2A9A266017EE; Thu, 23 Jun 2022 20:37:13 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656013034; bh=1D15zN5ANHSId/agHI+Tuv7EsBE//FROepf2wo5oErg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EntiTqqjhdS4/y3PrupowVflm5IdwyhE0eXTxh0q3hdMULjnbCdZrI17DqdCIoXim X/nV/sxRoq0ke1KkRYbUqkwy5PKGeUya8qDDtPvIl7ijSB3SSQ9D3/aO6gqg79ThmR dqrskSLZKTMwH4CKYDojDQFy3crrbIJDoN/9s6A0mU9weON0U7pVlka5vnonAxRk/D bw3Qu/+nFHZqQ983dwTUJ39M/uQfKKOKXS/YMaeGyZZ1fTEQNn8B/YPQ+43w74Kz1g l7bo062CZZ9hNzYirzETRvvMocLFKaFTeqmSBNRzGa8QVpNHFy9J3NEJnkwsr2slvN G5aYUky8TJDTw== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Greg Kroah-Hartman , Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 4/4] arm: dts: mediatek: Set fixed-clock for missing XHCI clocks Date: Thu, 23 Jun 2022 15:37:02 -0400 Message-Id: <20220623193702.817996-5-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220623193702.817996-1-nfraprado@collabora.com> References: <20220623193702.817996-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The XHCI controller hardware always has all clocks wired, however depending on the SoC, some of them might be fixed (ie not controllable). These fixed clocks were previously omitted from the devicetree entirely. In order to better describe the hardware on the devicetree, and to have a fixed order of clocks for all SoCs, add the missing non-controllable clocks as phandles to a fixed-clock node. Signed-off-by: N=C3=ADcolas F. R. A. Prado --- Changes in v2: - Added this commit arch/arm/boot/dts/mt2701.dtsi | 14 ++++++++++---- arch/arm/boot/dts/mt7623.dtsi | 14 ++++++++++---- arch/arm/boot/dts/mt7629.dtsi | 6 ++++-- 3 files changed, 24 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index b8eba3ba153c..1c1b9b5a1d7a 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -611,8 +611,11 @@ usb0: usb@1a1c0000 { reg-names =3D "mac", "ippc"; interrupts =3D ; clocks =3D <&hifsys CLK_HIFSYS_USB0PHY>, - <&topckgen CLK_TOP_ETHIF_SEL>; - clock-names =3D "sys_ck", "ref_ck"; + <&topckgen CLK_TOP_ETHIF_SEL>, + <&clk26m>, + <&clk26m>, + <&clk26m>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; power-domains =3D <&scpsys MT2701_POWER_DOMAIN_HIF>; phys =3D <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>; status =3D "disabled"; @@ -651,8 +654,11 @@ usb1: usb@1a240000 { reg-names =3D "mac", "ippc"; interrupts =3D ; clocks =3D <&hifsys CLK_HIFSYS_USB1PHY>, - <&topckgen CLK_TOP_ETHIF_SEL>; - clock-names =3D "sys_ck", "ref_ck"; + <&topckgen CLK_TOP_ETHIF_SEL>, + <&clk26m>, + <&clk26m>, + <&clk26m>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; power-domains =3D <&scpsys MT2701_POWER_DOMAIN_HIF>; phys =3D <&u2port1 PHY_TYPE_USB2>, <&u3port1 PHY_TYPE_USB3>; status =3D "disabled"; diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index 25d31e40a553..b640e6f4ad2e 100644 --- a/arch/arm/boot/dts/mt7623.dtsi +++ b/arch/arm/boot/dts/mt7623.dtsi @@ -864,8 +864,11 @@ usb1: usb@1a1c0000 { reg-names =3D "mac", "ippc"; interrupts =3D ; clocks =3D <&hifsys CLK_HIFSYS_USB0PHY>, - <&topckgen CLK_TOP_ETHIF_SEL>; - clock-names =3D "sys_ck", "ref_ck"; + <&topckgen CLK_TOP_ETHIF_SEL>, + <&clk26m>, + <&clk26m>, + <&clk26m>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; power-domains =3D <&scpsys MT2701_POWER_DOMAIN_HIF>; phys =3D <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>; status =3D "disabled"; @@ -905,8 +908,11 @@ usb2: usb@1a240000 { reg-names =3D "mac", "ippc"; interrupts =3D ; clocks =3D <&hifsys CLK_HIFSYS_USB1PHY>, - <&topckgen CLK_TOP_ETHIF_SEL>; - clock-names =3D "sys_ck", "ref_ck"; + <&topckgen CLK_TOP_ETHIF_SEL>, + <&clk26m>, + <&clk26m>, + <&clk26m>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; power-domains =3D <&scpsys MT2701_POWER_DOMAIN_HIF>; phys =3D <&u2port1 PHY_TYPE_USB2>, <&u3port1 PHY_TYPE_USB3>; status =3D "disabled"; diff --git a/arch/arm/boot/dts/mt7629.dtsi b/arch/arm/boot/dts/mt7629.dtsi index 46fc236e1b89..810d1c867b43 100644 --- a/arch/arm/boot/dts/mt7629.dtsi +++ b/arch/arm/boot/dts/mt7629.dtsi @@ -315,8 +315,10 @@ ssusb: usb@1a0c0000 { clocks =3D <&ssusbsys CLK_SSUSB_SYS_EN>, <&ssusbsys CLK_SSUSB_REF_EN>, <&ssusbsys CLK_SSUSB_MCU_EN>, - <&ssusbsys CLK_SSUSB_DMA_EN>; - clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; + <&ssusbsys CLK_SSUSB_DMA_EN>, + <&clk20m>; + clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", + "xhci_ck"; assigned-clocks =3D <&topckgen CLK_TOP_AXI_SEL>, <&topckgen CLK_TOP_SATA_SEL>, <&topckgen CLK_TOP_HIF_SEL>; --=20 2.36.1