From nobody Mon Apr 20 02:46:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99846C433EF for ; Thu, 23 Jun 2022 02:12:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377475AbiFWCMN (ORCPT ); Wed, 22 Jun 2022 22:12:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235423AbiFWCMF (ORCPT ); Wed, 22 Jun 2022 22:12:05 -0400 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1977224BDA for ; Wed, 22 Jun 2022 19:12:05 -0700 (PDT) Received: by mail-pl1-x633.google.com with SMTP id jb13so3329421plb.9 for ; Wed, 22 Jun 2022 19:12:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=B49d4SIox+e+mb7jQzvkFTKZpAevCiiZS2mIDlEpl4k=; b=kEgb9LUqG+MZosF6hO/uW1v1tK8ivJcSTm0EWjSMAdk7qY3wyvK7sS4oHwSdxT2VQC yTVQhyPgZlwNGLuqtKrRq8c40jf+pOHvTKcIPd9tdkI2zLvjJ8mqTEhcsA+sxOEnkeWy 6zHUEqSXwbh4zb5iQzemIgZCGhufWwCWQ1W6E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=B49d4SIox+e+mb7jQzvkFTKZpAevCiiZS2mIDlEpl4k=; b=U6Ee+rLdEkBmMqePg9I9cOoydfBOMOVSWX9MS+v2xFHGaxGIwJXSKOOuQbfsgFdOE1 bwhZmGI35S6J+NWPOsQId5/JAC26AKfpKSLyP/mnp15K9ndh8zUMTKh5GjBnJ9qBful8 tFg7FogcT9Nj0Lu9WrVnZiwXeTtngCb4fWtUJiW/gjlaUZscbMA/QOKyZ+NfQVQ9/TcI KZJVRrXfXvxwO8+um5LZcngt09EJLfin5tL3y3pTpCyLYv36csjsaNBW/OsWBVJEWjV7 2utzexlOOCzn0ifTy7V/EuB4rfJXeEyG9M+4AoZoaPKvC+d4b0ISsrEkHU7h4rwxQ738 Wn/w== X-Gm-Message-State: AJIora/Bssa8cgW7gR8iuhjUG228gz/GBDvNrKWuVd8wmf78t4BHBGWi cuI7Y2w0ovntce6Rzqus2lLRdA== X-Google-Smtp-Source: AGRyM1vUdIB+8cpeDYyqckhQRPC0sjPvKxMcaRn3LdvlrufgT7/mPMROzc9F0xJ7lUreCuUBW6WllA== X-Received: by 2002:a17:902:f646:b0:168:e2da:8931 with SMTP id m6-20020a170902f64600b00168e2da8931mr36827774plg.84.1655950324519; Wed, 22 Jun 2022 19:12:04 -0700 (PDT) Received: from judyhsiao0523.c.googlers.com.com (0.223.81.34.bc.googleusercontent.com. [34.81.223.0]) by smtp.gmail.com with ESMTPSA id m6-20020a170902768600b0016196bd15f4sm6194000pll.15.2022.06.22.19.12.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Jun 2022 19:12:03 -0700 (PDT) From: Judy Hsiao To: Heiko Stuebner Cc: Liam Girdwood , Rob Herring , Brian Norris , Mark Brown , Jaroslav Kysela , Chen-Yu Tsai , alsa-devel@alsa-project.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Judy Hsiao Subject: [PATCH v5 1/3] ASoC: rockchip: i2s: switch BCLK to GPIO Date: Thu, 23 Jun 2022 02:11:51 +0000 Message-Id: <20220623021153.587423-2-judyhsiao@chromium.org> X-Mailer: git-send-email 2.37.0.rc0.104.g0611611a94-goog In-Reply-To: <20220623021153.587423-1-judyhsiao@chromium.org> References: <20220623021153.587423-1-judyhsiao@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" We discoverd that the state of BCLK on, LRCLK off and SD_MODE on may cause the speaker melting issue. Removing LRCLK while BCLK is present can cause unexpected output behavior including a large DC output voltage as described in the Max98357a datasheet. In order to: 1. prevent BCLK from turning on by other component. 2. keep BCLK and LRCLK being present at the same time This patch switches BCLK to GPIO func before LRCLK output, and configures BCLK func back during LRCLK is output. Without this fix, BCLK is turned on 11 ms earlier than LRCK by the da7219. With this fix, BCLK is turned on only 0.4 ms earlier than LRCK by the rockchip codec. Signed-off-by: Judy Hsiao Reviewed-by: Brian Norris --- sound/soc/rockchip/rockchip_i2s.c | 171 ++++++++++++++++++++++-------- 1 file changed, 124 insertions(+), 47 deletions(-) diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchi= p_i2s.c index 47a3971a9ce1..79d94fbd2550 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c @@ -54,8 +54,38 @@ struct rk_i2s_dev { const struct rk_i2s_pins *pins; unsigned int bclk_ratio; spinlock_t lock; /* tx/rx lock */ + struct pinctrl *pinctrl; + struct pinctrl_state *bclk_on; + struct pinctrl_state *bclk_off; }; =20 +static int i2s_pinctrl_select_bclk_on(struct rk_i2s_dev *i2s) +{ + int ret =3D 0; + + if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_on)) + ret =3D pinctrl_select_state(i2s->pinctrl, i2s->bclk_on); + + if (ret) + dev_err(i2s->dev, "bclk enable failed %d\n", ret); + + return ret; +} + +static int i2s_pinctrl_select_bclk_off(struct rk_i2s_dev *i2s) +{ + + int ret =3D 0; + + if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_off)) + ret =3D pinctrl_select_state(i2s->pinctrl, i2s->bclk_off); + + if (ret) + dev_err(i2s->dev, "bclk disable failed %d\n", ret); + + return ret; +} + static int i2s_runtime_suspend(struct device *dev) { struct rk_i2s_dev *i2s =3D dev_get_drvdata(dev); @@ -92,39 +122,46 @@ static inline struct rk_i2s_dev *to_info(struct snd_so= c_dai *dai) return snd_soc_dai_get_drvdata(dai); } =20 -static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on) +static int rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on) { unsigned int val =3D 0; int retry =3D 10; - + int ret =3D 0; +=09 spin_lock(&i2s->lock); if (on) { - regmap_update_bits(i2s->regmap, I2S_DMACR, - I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_ENABLE); - - regmap_update_bits(i2s->regmap, I2S_XFER, - I2S_XFER_TXS_START | I2S_XFER_RXS_START, - I2S_XFER_TXS_START | I2S_XFER_RXS_START); - + ret =3D regmap_update_bits(i2s->regmap, I2S_DMACR, + I2S_DMACR_TDE_ENABLE, + I2S_DMACR_TDE_ENABLE); + if (ret < 0) + goto end; + ret =3D regmap_update_bits(i2s->regmap, I2S_XFER, + I2S_XFER_TXS_START | I2S_XFER_RXS_START, + I2S_XFER_TXS_START | I2S_XFER_RXS_START); + if (ret < 0) + goto end; i2s->tx_start =3D true; } else { i2s->tx_start =3D false; =20 - regmap_update_bits(i2s->regmap, I2S_DMACR, - I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_DISABLE); + ret =3D regmap_update_bits(i2s->regmap, I2S_DMACR, + I2S_DMACR_TDE_ENABLE, + I2S_DMACR_TDE_DISABLE); + if (ret < 0) + goto end; =20 if (!i2s->rx_start) { - regmap_update_bits(i2s->regmap, I2S_XFER, - I2S_XFER_TXS_START | - I2S_XFER_RXS_START, - I2S_XFER_TXS_STOP | - I2S_XFER_RXS_STOP); - + ret =3D regmap_update_bits(i2s->regmap, I2S_XFER, + I2S_XFER_TXS_START | I2S_XFER_RXS_START, + I2S_XFER_TXS_STOP | I2S_XFER_RXS_STOP); + if (ret < 0) + goto end; udelay(150); - regmap_update_bits(i2s->regmap, I2S_CLR, - I2S_CLR_TXC | I2S_CLR_RXC, - I2S_CLR_TXC | I2S_CLR_RXC); - + ret =3D regmap_update_bits(i2s->regmap, I2S_CLR, + I2S_CLR_TXC | I2S_CLR_RXC, + I2S_CLR_TXC | I2S_CLR_RXC); + if (ret < 0) + goto end; regmap_read(i2s->regmap, I2S_CLR, &val); =20 /* Should wait for clear operation to finish */ @@ -138,42 +175,55 @@ static void rockchip_snd_txctrl(struct rk_i2s_dev *i2= s, int on) } } } +end: spin_unlock(&i2s->lock); + if (ret < 0) + dev_err(i2s->dev, "lrclk update failed\n"); + + return ret; } =20 -static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on) +static int rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on) { unsigned int val =3D 0; int retry =3D 10; + int ret =3D 0; =20 spin_lock(&i2s->lock); if (on) { - regmap_update_bits(i2s->regmap, I2S_DMACR, - I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_ENABLE); - - regmap_update_bits(i2s->regmap, I2S_XFER, - I2S_XFER_TXS_START | I2S_XFER_RXS_START, - I2S_XFER_TXS_START | I2S_XFER_RXS_START); - + ret =3D regmap_update_bits(i2s->regmap, I2S_DMACR, + I2S_DMACR_RDE_ENABLE, + I2S_DMACR_RDE_ENABLE); + if (ret < 0) + goto end; + + ret =3D regmap_update_bits(i2s->regmap, I2S_XFER, + I2S_XFER_TXS_START | I2S_XFER_RXS_START, + I2S_XFER_TXS_START | I2S_XFER_RXS_START); + if (ret < 0) + goto end; i2s->rx_start =3D true; } else { i2s->rx_start =3D false; =20 - regmap_update_bits(i2s->regmap, I2S_DMACR, - I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_DISABLE); + ret =3D regmap_update_bits(i2s->regmap, I2S_DMACR, + I2S_DMACR_RDE_ENABLE, + I2S_DMACR_RDE_DISABLE); + if (ret < 0) + goto end; =20 if (!i2s->tx_start) { - regmap_update_bits(i2s->regmap, I2S_XFER, - I2S_XFER_TXS_START | - I2S_XFER_RXS_START, - I2S_XFER_TXS_STOP | - I2S_XFER_RXS_STOP); - + ret =3D regmap_update_bits(i2s->regmap, I2S_XFER, + I2S_XFER_TXS_START | I2S_XFER_RXS_START, + I2S_XFER_TXS_STOP | I2S_XFER_RXS_STOP); + if (ret < 0) + goto end; udelay(150); - regmap_update_bits(i2s->regmap, I2S_CLR, - I2S_CLR_TXC | I2S_CLR_RXC, - I2S_CLR_TXC | I2S_CLR_RXC); - + ret =3D regmap_update_bits(i2s->regmap, I2S_CLR, + I2S_CLR_TXC | I2S_CLR_RXC, + I2S_CLR_TXC | I2S_CLR_RXC); + if (ret < 0) + goto end; regmap_read(i2s->regmap, I2S_CLR, &val); =20 /* Should wait for clear operation to finish */ @@ -187,7 +237,12 @@ static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s= , int on) } } } +end: spin_unlock(&i2s->lock); + if (ret < 0) + dev_err(i2s->dev, "lrclk update failed\n"); + + return ret; } =20 static int rockchip_i2s_set_fmt(struct snd_soc_dai *cpu_dai, @@ -425,17 +480,25 @@ static int rockchip_i2s_trigger(struct snd_pcm_substr= eam *substream, case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: if (substream->stream =3D=3D SNDRV_PCM_STREAM_CAPTURE) - rockchip_snd_rxctrl(i2s, 1); + ret =3D rockchip_snd_rxctrl(i2s, 1); else - rockchip_snd_txctrl(i2s, 1); + ret =3D rockchip_snd_txctrl(i2s, 1); + if (ret < 0) + return ret; + i2s_pinctrl_select_bclk_on(i2s); break; case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - if (substream->stream =3D=3D SNDRV_PCM_STREAM_CAPTURE) - rockchip_snd_rxctrl(i2s, 0); - else - rockchip_snd_txctrl(i2s, 0); + if (substream->stream =3D=3D SNDRV_PCM_STREAM_CAPTURE) { + if (!i2s->tx_start) + i2s_pinctrl_select_bclk_off(i2s); + ret =3D rockchip_snd_rxctrl(i2s, 0); + } else { + if (!i2s->rx_start) + i2s_pinctrl_select_bclk_off(i2s); + ret =3D rockchip_snd_txctrl(i2s, 0); + } break; default: ret =3D -EINVAL; @@ -736,6 +799,20 @@ static int rockchip_i2s_probe(struct platform_device *= pdev) } =20 i2s->bclk_ratio =3D 64; + i2s->pinctrl =3D devm_pinctrl_get(&pdev->dev); + if (IS_ERR(i2s->pinctrl)) { + dev_err(&pdev->dev, "failed to find i2s pinctrl\n"); + } else { + i2s->bclk_on =3D pinctrl_lookup_state(i2s->pinctrl, "bclk_on"); + if (!IS_ERR_OR_NULL(i2s->bclk_on)) { + i2s->bclk_off =3D pinctrl_lookup_state(i2s->pinctrl, "bclk_off"); + if (IS_ERR_OR_NULL(i2s->bclk_off)) { + dev_err(&pdev->dev, "failed to find i2s bclk_off\n"); + goto err_clk; + } + } + i2s_pinctrl_select_bclk_off(i2s); + } =20 dev_set_drvdata(&pdev->dev, i2s); =20 --=20 2.37.0.rc0.104.g0611611a94-goog From nobody Mon Apr 20 02:46:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5158BC433EF for ; Thu, 23 Jun 2022 02:12:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377726AbiFWCMZ (ORCPT ); Wed, 22 Jun 2022 22:12:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55430 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235423AbiFWCMP (ORCPT ); Wed, 22 Jun 2022 22:12:15 -0400 Received: from mail-pj1-x1036.google.com (mail-pj1-x1036.google.com [IPv6:2607:f8b0:4864:20::1036]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71D12220F3 for ; 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[34.81.223.0]) by smtp.gmail.com with ESMTPSA id m6-20020a170902768600b0016196bd15f4sm6194000pll.15.2022.06.22.19.12.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Jun 2022 19:12:12 -0700 (PDT) From: Judy Hsiao To: Heiko Stuebner Cc: Liam Girdwood , Rob Herring , Brian Norris , Mark Brown , Jaroslav Kysela , Chen-Yu Tsai , alsa-devel@alsa-project.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Judy Hsiao Subject: [PATCH v5 2/3] arm64: dts: rk3399: i2s: switch BCLK to GPIO Date: Thu, 23 Jun 2022 02:11:52 +0000 Message-Id: <20220623021153.587423-3-judyhsiao@chromium.org> X-Mailer: git-send-email 2.37.0.rc0.104.g0611611a94-goog In-Reply-To: <20220623021153.587423-1-judyhsiao@chromium.org> References: <20220623021153.587423-1-judyhsiao@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" We discoverd that the state of BCLK on, LRCLK off and SD_MODE on may cause the speaker melting issue. Removing LRCLK while BCLK is present can cause unexpected output behavior including a large DC output voltage as described in the Max98357a datasheet. In order to: 1. prevent BCLK from turning on by other component. 2. keep BCLK and LRCLK being present at the same time This patch adjusts the device tree to allow BCLK to switch to GPIO func before LRCLK output, and switch back during LRCLK is output. Signed-off-by: Judy Hsiao Reviewed-by: Brian Norris --- .../boot/dts/rockchip/rk3399-gru-scarlet.dtsi | 10 ++++++++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 25 ++++++++++++++++++- 2 files changed, 34 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi b/arch/ar= m64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi index 913d845eb51a..df1647e9d487 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi @@ -766,6 +766,16 @@ &i2s0_8ch_bus { <4 RK_PA0 1 &pcfg_pull_none_6ma>; }; =20 +&i2s0_8ch_bus_bclk_off { + rockchip,pins =3D + <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none_6ma>, + <3 RK_PD1 1 &pcfg_pull_none_6ma>, + <3 RK_PD2 1 &pcfg_pull_none_6ma>, + <3 RK_PD3 1 &pcfg_pull_none_6ma>, + <3 RK_PD7 1 &pcfg_pull_none_6ma>, + <4 RK_PA0 1 &pcfg_pull_none_6ma>; +}; + /* there is no external pull up, so need to set this pin pull up */ &sdmmc_cd_pin { rockchip,pins =3D <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts= /rockchip/rk3399.dtsi index fbd0346624e6..311c8394cc84 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1662,8 +1662,9 @@ i2s0: i2s@ff880000 { dma-names =3D "tx", "rx"; clock-names =3D "i2s_clk", "i2s_hclk"; clocks =3D <&cru SCLK_I2S0_8CH>, <&cru HCLK_I2S0_8CH>; - pinctrl-names =3D "default"; + pinctrl-names =3D "bclk_on", "bclk_off"; pinctrl-0 =3D <&i2s0_8ch_bus>; + pinctrl-1 =3D <&i2s0_8ch_bus_bclk_off>; power-domains =3D <&power RK3399_PD_SDIOAUDIO>; #sound-dai-cells =3D <0>; status =3D "disabled"; @@ -2407,6 +2408,19 @@ i2s0_8ch_bus: i2s0-8ch-bus { <3 RK_PD7 1 &pcfg_pull_none>, <4 RK_PA0 1 &pcfg_pull_none>; }; + + i2s0_8ch_bus_bclk_off: i2s0-8ch-bus-bclk-off { + rockchip,pins =3D + <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PD1 1 &pcfg_pull_none>, + <3 RK_PD2 1 &pcfg_pull_none>, + <3 RK_PD3 1 &pcfg_pull_none>, + <3 RK_PD4 1 &pcfg_pull_none>, + <3 RK_PD5 1 &pcfg_pull_none>, + <3 RK_PD6 1 &pcfg_pull_none>, + <3 RK_PD7 1 &pcfg_pull_none>, + <4 RK_PA0 1 &pcfg_pull_none>; + }; }; =20 i2s1 { @@ -2418,6 +2432,15 @@ i2s1_2ch_bus: i2s1-2ch-bus { <4 RK_PA6 1 &pcfg_pull_none>, <4 RK_PA7 1 &pcfg_pull_none>; }; + + i2s1_2ch_bus_bclk_off: i2s1-2ch-bus-bclk-off { + rockchip,pins =3D + <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PA4 1 &pcfg_pull_none>, + <4 RK_PA5 1 &pcfg_pull_none>, + <4 RK_PA6 1 &pcfg_pull_none>, + <4 RK_PA7 1 &pcfg_pull_none>; + }; }; =20 sdio0 { --=20 2.37.0.rc0.104.g0611611a94-goog From nobody Mon Apr 20 02:46:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 020F9C433EF for ; Thu, 23 Jun 2022 02:12:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377806AbiFWCM2 (ORCPT ); Wed, 22 Jun 2022 22:12:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377675AbiFWCMS (ORCPT ); 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[34.81.223.0]) by smtp.gmail.com with ESMTPSA id m6-20020a170902768600b0016196bd15f4sm6194000pll.15.2022.06.22.19.12.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Jun 2022 19:12:16 -0700 (PDT) From: Judy Hsiao To: Heiko Stuebner Cc: Liam Girdwood , Rob Herring , Brian Norris , Mark Brown , Jaroslav Kysela , Chen-Yu Tsai , alsa-devel@alsa-project.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Judy Hsiao Subject: [PATCH v5 3/3] ASoC: dt-bindings: rockchip: Document pinctrl-names for i2s Date: Thu, 23 Jun 2022 02:11:53 +0000 Message-Id: <20220623021153.587423-4-judyhsiao@chromium.org> X-Mailer: git-send-email 2.37.0.rc0.104.g0611611a94-goog In-Reply-To: <20220623021153.587423-1-judyhsiao@chromium.org> References: <20220623021153.587423-1-judyhsiao@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch documents pinctrl-names for i2s. Signed-off-by: Judy Hsiao --- Documentation/devicetree/bindings/sound/rockchip-i2s.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.yaml b/Do= cumentation/devicetree/bindings/sound/rockchip-i2s.yaml index 5ea16b8ef93f..7e36e389e976 100644 --- a/Documentation/devicetree/bindings/sound/rockchip-i2s.yaml +++ b/Documentation/devicetree/bindings/sound/rockchip-i2s.yaml @@ -61,6 +61,13 @@ properties: - const: tx - const: rx =20 + pinctrl-names: + oneOf: + - const: default + - items: + - const: bclk_on + - const: bclk_off + power-domains: maxItems: 1 =20 --=20 2.37.0.rc0.104.g0611611a94-goog