From nobody Sun Apr 26 08:13:17 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 693A4C43334 for ; Tue, 21 Jun 2022 08:04:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348028AbiFUIE3 (ORCPT ); Tue, 21 Jun 2022 04:04:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58316 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348005AbiFUIEX (ORCPT ); Tue, 21 Jun 2022 04:04:23 -0400 Received: from mail-wr1-x449.google.com (mail-wr1-x449.google.com [IPv6:2a00:1450:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8B34A248FD for ; Tue, 21 Jun 2022 01:04:21 -0700 (PDT) Received: by mail-wr1-x449.google.com with SMTP id n5-20020adf8b05000000b00219ece7272bso2985491wra.8 for ; Tue, 21 Jun 2022 01:04:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=7VMne+EKLRft0qoamTnr0CI/OXg/OuA4q1t0xWWFe2o=; b=ZpdHpS/kVBkUOJwVEPcdo0gHpjf8MKHUz7jPBmYGq3k1KMLmPRd2ZpB11ScYvhPYae VjmHZ8Ey9n3Vpqt/V6ZU/qw6JFNt9DK1IsZ8n5VLXLJd1g/pMjcuhqNEkoizuIMOS6mB TazxErIT81eBlOJLg2c0lJ4vyf0Mt8cnXnMKeRyHZJ2iJL3a7DZvSut3ypbnmpBCRUGA pWpM7rBrtWwCRhZscik0zotn0r/1QsvGmD9P1w506MAyRnfmQfz1ACVf4HGy3HZaNUA/ 80MxefG+6aa6G6gDBH1ES8d/L41NpdX8mUPXJ3Zo48mMb3gfFI0Bg5o0lvXNre+Vu4Ur 5i/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=7VMne+EKLRft0qoamTnr0CI/OXg/OuA4q1t0xWWFe2o=; b=gjuzyYmQBexvW0yp2dAU8Yz1yh7LpnKk/9pe22meXXnvDN/4ic6UbqqGBodJq8/peJ aLyVwSY1SIHiVMh/ZCJktITs1QJv56jtubOJmgQejTgLDzGmDNnUUPYR2n/Mtpxa5IEc V5RYvz1PKXVBZFYPYUd5IxFeqF8pJnxf/Hg1sjJ1U+xWgtw01Z2JXuTh788W65EmJZKR ZetGc33vaCsEpEFV0Vu33rZFQUU4Yr3nfT+uMP5+Xr2UG9ztTJXqvKz3DdET9sv/AhgL WeJB5ZvtpKka5kVerqKZaLc5YBGymG6+dv0c9x8CqkaKNd+9Yqx+1fKp+O0luJ6K+/Zb CMoQ== X-Gm-Message-State: AJIora/wH7PC8HerdD6HKRiI5WlhNJdpR3wNwicOx6GeU24lTEAksaJz 2qZr8IiBxpXz/Nc3kklT3WjazZxekO8lDhiGum4= X-Google-Smtp-Source: AGRyM1ujwRu2sdSHU9sTM0W4DcaqqDbif+GyCUpF+D26HvIKZJ21ukdIuyNRS4oR6aOod2DgIwlQUI6WIjlSTX3K81w= X-Received: from sene.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:27c4]) (user=sebastianene job=sendgmr) by 2002:a5d:500a:0:b0:21b:8274:9ddc with SMTP id e10-20020a5d500a000000b0021b82749ddcmr18548837wrt.251.1655798659798; Tue, 21 Jun 2022 01:04:19 -0700 (PDT) Date: Tue, 21 Jun 2022 08:03:08 +0000 In-Reply-To: <20220621080308.3952915-1-sebastianene@google.com> Message-Id: <20220621080308.3952915-2-sebastianene@google.com> Mime-Version: 1.0 References: <20220621080308.3952915-1-sebastianene@google.com> X-Mailer: git-send-email 2.37.0.rc0.104.g0611611a94-goog Subject: [PATCH v7 1/2] dt-bindings: vcpu_stall_detector: Add qemu,vcpu-stall-detector compatible From: Sebastian Ene To: Rob Herring , Greg Kroah-Hartman , Arnd Bergmann , Dragan Cvetic Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, maz@kernel.org, will@kernel.org, vdonnefort@google.com, Guenter Roeck , Sebastian Ene Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The VCPU stall detection mechanism allows to configure the expiration duration and the internal counter clock frequency measured in Hz. Add these properties in the schema. While this is a memory mapped virtual device, it is expected to be loaded when the DT contains the compatible: "qemu,vcpu-stall-detector" node. In a protected VM we trust the generated DT nodes and we don't rely on the host to present the hardware peripherals. Signed-off-by: Sebastian Ene --- .../misc/qemu,vcpu-stall-detector.yaml | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/qemu,vcpu-stall-= detector.yaml diff --git a/Documentation/devicetree/bindings/misc/qemu,vcpu-stall-detecto= r.yaml b/Documentation/devicetree/bindings/misc/qemu,vcpu-stall-detector.ya= ml new file mode 100644 index 000000000000..91f012d2a382 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/qemu,vcpu-stall-detector.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/qemu,vcpu-stall-detector.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VCPU stall detector + +description: + This binding describes a CPU stall detector mechanism for virtual CPUs + which is accessed through MMIO. + +maintainers: + - Sebastian Ene + +properties: + compatible: + enum: + - qemu,vcpu-stall-detector + + clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + The internal clock of the stall detector peripheral measure in Hz us= ed + to decrement its internal counter register on each tick. + Defaults to 10 if unset. + default: 10 + + timeout-sec: + description: | + The stall detector expiration timeout measured in seconds. + Defaults to 8 if unset. Please note that it also takes into account = the + time spent while the VCPU is not running. + default: 8 + +required: + - compatible + +additionalProperties: false + +examples: + - | + vmwdt@9030000 { + compatible =3D "qemu,vcpu-stall-detector"; + clock-frequency =3D <10>; + timeout-sec =3D <8>; + reg =3D <0x0 0x9030000 0x0 0x10000>; + }; + +... --=20 2.36.1.476.g0c4daa206d-goog From nobody Sun Apr 26 08:13:17 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE226C43334 for ; Tue, 21 Jun 2022 08:04:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348042AbiFUIEw (ORCPT ); Tue, 21 Jun 2022 04:04:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58284 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348022AbiFUIE2 (ORCPT ); Tue, 21 Jun 2022 04:04:28 -0400 Received: from mail-wm1-x34a.google.com (mail-wm1-x34a.google.com [IPv6:2a00:1450:4864:20::34a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D965724968 for ; Tue, 21 Jun 2022 01:04:23 -0700 (PDT) Received: by mail-wm1-x34a.google.com with SMTP id z13-20020a7bc7cd000000b0039c4a238eadso3998180wmk.9 for ; Tue, 21 Jun 2022 01:04:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=imF+lM9Pc5uHKEfn+VXRtD6CGd7AhHeIOjBkOi6t6Po=; b=QhmfRpS/aB+zbF517uXkO25R1wPSpjZ2OIoekSDBqdPoF3wtHon08pBZ7LTNeg7IAB lIXsBrfJSuJuSXC5NXIDne7SJmSemwEysq66LzoB1ythwTJPb+fbj49ilOdw8zVhjO2q NAdGr0idHgVgtSBtLJgWvEh8EAOgNiEXnAROWJg31dyfPY5HQYkRSRaiJAR9c1/OrdFj LRKEbdw5c49PHge4difVOUPnbdPilzEdcEp6SqDTILv3iaG6czozByhuOtKuFyII1tqn 7WUXMicj6qxTE1cUVvIahXSMcAOa/Su9+zSnSzVobf2AYB9r5ehv1hwd4mFHooPmKyDq Hjhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=imF+lM9Pc5uHKEfn+VXRtD6CGd7AhHeIOjBkOi6t6Po=; b=3h5NqTQBel/YJ9U48kgNy9Zy3n8wocygDewkoQHQSoh69Umfrdo6nvI5OKIsJEF4wZ T1soSHB+yBXMdDysQWJ4VDooJGSL7flBaKc24Zwt09ZrSXvNQIbGL9vo3QUISuz/FDWe CHxInRq1m0qvkqkWWJivRnlkOm7OeC3uILt4IdIg8io71wpR1NN8kB6PXCSMIFYAtp/D YzH4VNONOila3w3upJR8I2/7Qx5/yJspPjk62pbiJ7UJEh2+NYK3fBC8of+LK4ATys6D ci5GUMG0G8/P/yf2yFWZBEpQtRXm8JlNLQlnILOQrwj3iFZLWZocGq2r7reAEMO9oTv4 p5Kg== X-Gm-Message-State: AJIora+SVIhjzvVTQcqOariiIfFW+59mKqBciI0PYhQi1doRtG8RVUhw wf3AmiWzIXJOGn7qKkhwQPeEtkrv9sAd0mAg6Zc= X-Google-Smtp-Source: AGRyM1vFNThORglSUp07nH10UiKnNmY6eyCkb5snUdhrpesMP1oteneTbAwKGF4ZQLRaGO7HHqwseX6xBm6k4iOwyh8= X-Received: from sene.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:27c4]) (user=sebastianene job=sendgmr) by 2002:adf:e9c4:0:b0:21b:8397:860b with SMTP id l4-20020adfe9c4000000b0021b8397860bmr16933030wrn.546.1655798662343; Tue, 21 Jun 2022 01:04:22 -0700 (PDT) Date: Tue, 21 Jun 2022 08:03:09 +0000 In-Reply-To: <20220621080308.3952915-1-sebastianene@google.com> Message-Id: <20220621080308.3952915-3-sebastianene@google.com> Mime-Version: 1.0 References: <20220621080308.3952915-1-sebastianene@google.com> X-Mailer: git-send-email 2.37.0.rc0.104.g0611611a94-goog Subject: [PATCH v7 2/2] misc: Add a mechanism to detect stalls on guest vCPUs From: Sebastian Ene To: Rob Herring , Greg Kroah-Hartman , Arnd Bergmann , Dragan Cvetic Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, maz@kernel.org, will@kernel.org, vdonnefort@google.com, Guenter Roeck , Sebastian Ene Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This driver creates per-cpu hrtimers which are required to do the periodic 'pet' operation. On a conventional watchdog-core driver, the userspace is responsible for delivering the 'pet' events by writing to the particular /dev/watchdogN node. In this case we require a strong thread affinity to be able to account for lost time on a per vCPU. This part of the driver is the 'frontend' which is reponsible for delivering the periodic 'pet' events, configuring the virtual peripheral and listening for cpu hotplug events. The other part of the driver handles the peripheral emulation and this part accounts for lost time by looking at the /proc/{}/task/{}/stat entries and is located here: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/354= 8817 Signed-off-by: Sebastian Ene --- drivers/misc/Kconfig | 12 ++ drivers/misc/Makefile | 1 + drivers/misc/vcpu_stall_detector.c | 222 +++++++++++++++++++++++++++++ 3 files changed, 235 insertions(+) create mode 100644 drivers/misc/vcpu_stall_detector.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 41d2bb0ae23a..e15c85d74c4b 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -483,6 +483,18 @@ config OPEN_DICE =20 If unsure, say N. =20 +config VCPU_STALL_DETECTOR + tristate "VCPU stall detector" + select LOCKUP_DETECTOR + help + Detect CPU locks on a kvm virtual machine. This driver relies on + the hrtimers which are CPU-binded to do the 'pet' operation. When a + vCPU has to do a 'pet', it exits the guest through MMIO write and + the backend driver takes into account the lost ticks for this + particular CPU. + To compile this driver as a module, choose M here: the + module will be called vcpu_stall_detector. + source "drivers/misc/c2port/Kconfig" source "drivers/misc/eeprom/Kconfig" source "drivers/misc/cb710/Kconfig" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 70e800e9127f..2be8542616dd 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -60,3 +60,4 @@ obj-$(CONFIG_XILINX_SDFEC) +=3D xilinx_sdfec.o obj-$(CONFIG_HISI_HIKEY_USB) +=3D hisi_hikey_usb.o obj-$(CONFIG_HI6421V600_IRQ) +=3D hi6421v600-irq.o obj-$(CONFIG_OPEN_DICE) +=3D open-dice.o +obj-$(CONFIG_VCPU_STALL_DETECTOR) +=3D vcpu_stall_detector.o \ No newline at end of file diff --git a/drivers/misc/vcpu_stall_detector.c b/drivers/misc/vcpu_stall_d= etector.c new file mode 100644 index 000000000000..8b33f04a9719 --- /dev/null +++ b/drivers/misc/vcpu_stall_detector.c @@ -0,0 +1,222 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// VCPU stall detector. +// Copyright (C) Google, 2022 + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define REG_STATUS (0x00) +#define REG_LOAD_CNT (0x04) +#define REG_CURRENT_CNT (0x08) +#define REG_CLOCK_FREQ_HZ (0x0C) +#define REG_LEN (0x10) + +#define DEFAULT_CLOCK_HZ (10) +#define DEFAULT_TIMEOT_SEC (8) + +struct vm_stall_detect_s { + void __iomem *membase; + u32 clock_freq; + u32 expiration_sec; + u32 ping_timeout_ms; + struct hrtimer per_cpu_hrtimer; + struct platform_device *dev; +}; + +#define vcpu_stall_detect_reg_write(stall_detect, reg, value) \ + iowrite32((value), (stall_detect)->membase + (reg)) +#define vcpu_stall_detect_reg_read(stall_detect, reg) \ + io32read((stall_detect)->membase + (reg)) + +static struct platform_device *virt_dev; + +static enum hrtimer_restart +vcpu_stall_detect_timer_fn(struct hrtimer *hrtimer) +{ + struct vm_stall_detect_s *cpu_stall_detect; + u32 ticks; + + cpu_stall_detect =3D container_of(hrtimer, struct vm_stall_detect_s, + per_cpu_hrtimer); + ticks =3D cpu_stall_detect->clock_freq * + cpu_stall_detect->expiration_sec; + vcpu_stall_detect_reg_write(cpu_stall_detect, REG_LOAD_CNT, ticks); + hrtimer_forward_now(hrtimer, + ms_to_ktime(cpu_stall_detect->ping_timeout_ms)); + + return HRTIMER_RESTART; +} + +static void vcpu_stall_detect_start(void *arg) +{ + u32 ticks; + struct vm_stall_detect_s *cpu_stall_detect =3D arg; + struct hrtimer *hrtimer =3D &cpu_stall_detect->per_cpu_hrtimer; + + vcpu_stall_detect_reg_write(cpu_stall_detect, REG_CLOCK_FREQ_HZ, + cpu_stall_detect->clock_freq); + + /* Compute the number of ticks required for the stall detector counter + * register based on the internal clock frequency and the timeout + * value given from the device tree. + */ + ticks =3D cpu_stall_detect->clock_freq * + cpu_stall_detect->expiration_sec; + vcpu_stall_detect_reg_write(cpu_stall_detect, REG_LOAD_CNT, ticks); + + /* Enable the internal clock and start the stall detector */ + vcpu_stall_detect_reg_write(cpu_stall_detect, REG_STATUS, 1); + + hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); + hrtimer->function =3D vcpu_stall_detect_timer_fn; + hrtimer_start(hrtimer, ms_to_ktime(cpu_stall_detect->ping_timeout_ms), + HRTIMER_MODE_REL_PINNED); +} + +static void vcpu_stall_detect_stop(void *arg) +{ + struct vm_stall_detect_s *cpu_stall_detect =3D arg; + struct hrtimer *hrtimer =3D &cpu_stall_detect->per_cpu_hrtimer; + + hrtimer_cancel(hrtimer); + + /* Disable the stall detector */ + vcpu_stall_detect_reg_write(cpu_stall_detect, REG_STATUS, 0); +} + +static int start_stall_detector_on_cpu(unsigned int cpu) +{ + struct vm_stall_detect_s __percpu *vm_stall_detect; + + vm_stall_detect =3D (struct vm_stall_detect_s __percpu *) + platform_get_drvdata(virt_dev); + vcpu_stall_detect_start(this_cpu_ptr(vm_stall_detect)); + return 0; +} + +static int stop_stall_detector_on_cpu(unsigned int cpu) +{ + struct vm_stall_detect_s __percpu *vm_stall_detect; + + vm_stall_detect =3D (struct vm_stall_detect_s __percpu *) + platform_get_drvdata(virt_dev); + vcpu_stall_detect_stop(this_cpu_ptr(vm_stall_detect)); + return 0; +} + +static int vcpu_stall_detect_probe(struct platform_device *dev) +{ + int cpu, ret, err; + void __iomem *membase; + struct resource *r; + struct vm_stall_detect_s __percpu *vm_stall_detect; + u32 stall_detect_clock, stall_detect_timeout_sec =3D 0; + + r =3D platform_get_resource(dev, IORESOURCE_MEM, 0); + if (r =3D=3D NULL) + return -ENOENT; + + vm_stall_detect =3D alloc_percpu(typeof(struct vm_stall_detect_s)); + if (!vm_stall_detect) + return -ENOMEM; + + membase =3D ioremap(r->start, resource_size(r)); + if (!membase) { + ret =3D -ENXIO; + goto err_withmem; + } + + virt_dev =3D dev; + platform_set_drvdata(dev, vm_stall_detect); + if (of_property_read_u32(dev->dev.of_node, "clock-frequency", + &stall_detect_clock)) + stall_detect_clock =3D DEFAULT_CLOCK_HZ; + + if (of_property_read_u32(dev->dev.of_node, "timeout-sec", + &stall_detect_timeout_sec)) + stall_detect_timeout_sec =3D DEFAULT_TIMEOT_SEC; + + for_each_cpu_and(cpu, cpu_online_mask, &watchdog_cpumask) { + struct vm_stall_detect_s *cpu_stall_detect; + + cpu_stall_detect =3D per_cpu_ptr(vm_stall_detect, cpu); + cpu_stall_detect->membase =3D membase + cpu * REG_LEN; + cpu_stall_detect->clock_freq =3D stall_detect_clock; + cpu_stall_detect->expiration_sec =3D stall_detect_timeout_sec; + cpu_stall_detect->ping_timeout_ms =3D stall_detect_timeout_sec * + MSEC_PER_SEC / 2; + smp_call_function_single(cpu, vcpu_stall_detect_start, + cpu_stall_detect, true); + } + + err =3D cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, + "virt/vcpu_stall_detector:online", + start_stall_detector_on_cpu, + stop_stall_detector_on_cpu); + if (err < 0) { + dev_warn(&dev->dev, "failed to install cpu hotplug"); + ret =3D err; + goto err_withmem; + } + + return 0; + +err_withmem: + free_percpu(vm_stall_detect); + return ret; +} + +static int vcpu_stall_detect_remove(struct platform_device *dev) +{ + int cpu; + struct vm_stall_detect_s __percpu *vm_stall_detect; + + vm_stall_detect =3D (struct vm_stall_detect_s __percpu *) + platform_get_drvdata(dev); + for_each_cpu_and(cpu, cpu_online_mask, &watchdog_cpumask) { + struct vm_stall_detect_s *cpu_stall_detect; + + cpu_stall_detect =3D per_cpu_ptr(vm_stall_detect, cpu); + smp_call_function_single(cpu, vcpu_stall_detect_stop, + cpu_stall_detect, true); + } + + free_percpu(vm_stall_detect); + return 0; +} + +static const struct of_device_id vcpu_stall_detect_of_match[] =3D { + { .compatible =3D "qemu,vcpu-stall-detector", }, + {} +}; + +MODULE_DEVICE_TABLE(of, vcpu_stall_detect_of_match); + +static struct platform_driver vcpu_stall_detect_driver =3D { + .probe =3D vcpu_stall_detect_probe, + .remove =3D vcpu_stall_detect_remove, + .driver =3D { + .name =3D KBUILD_MODNAME, + .of_match_table =3D vcpu_stall_detect_of_match, + }, +}; + +module_platform_driver(vcpu_stall_detect_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Sebastian Ene "); +MODULE_DESCRIPTION("VCPU stall detector"); --=20 2.36.1.476.g0c4daa206d-goog