From nobody Sat Sep 21 23:33:24 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B7A9C433EF for ; Mon, 20 Jun 2022 12:10:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242389AbiFTMK5 (ORCPT ); Mon, 20 Jun 2022 08:10:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242089AbiFTMKl (ORCPT ); Mon, 20 Jun 2022 08:10:41 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A185218362; Mon, 20 Jun 2022 05:10:38 -0700 (PDT) X-UUID: 0f4231e017cb4eea8d967bef587d45c9-20220620 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6,REQID:8d21b801-af55-4dfc-bdf6-7310e1c10450,OB:10,L OB:10,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham,A CTION:release,TS:100 X-CID-INFO: VERSION:1.1.6,REQID:8d21b801-af55-4dfc-bdf6-7310e1c10450,OB:10,LOB :10,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D,A CTION:quarantine,TS:100 X-CID-META: VersionHash:b14ad71,CLOUDID:9a37333d-9948-4b2a-a784-d8a6c1086106,C OID:5f55011f79bc,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:1,File:nil,QS:nil,BEC:nil,COL:0 X-UUID: 0f4231e017cb4eea8d967bef587d45c9-20220620 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1630283349; Mon, 20 Jun 2022 20:10:31 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Mon, 20 Jun 2022 20:10:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Mon, 20 Jun 2022 20:10:30 +0800 From: Bo-Chen Chen To: , , , , , , CC: , , , , , , , , , , , , Bo-Chen Chen Subject: [PATCH v12 07/14] drm/mediatek: dpi: move swap_shift to SoC config Date: Mon, 20 Jun 2022 20:10:21 +0800 Message-ID: <20220620121028.29234-8-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220620121028.29234-1-rex-bc.chen@mediatek.com> References: <20220620121028.29234-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Guillaume Ranquet Add flexibility by moving the swap shift value to SoC specific config. Signed-off-by: Guillaume Ranquet Signed-off-by: Bo-Chen Chen Reviewed-by: Rex-BC Chen Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_dpi.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/= mtk_dpi.c index f9c7c258d2af..fcd3941f8003 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -131,6 +131,7 @@ struct mtk_dpi_conf { u32 dimension_mask; /* HSIZE and VSIZE mask (no shift) */ u32 hvsize_mask; + u32 channel_swap_shift; }; =20 static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mas= k) @@ -361,7 +362,9 @@ static void mtk_dpi_config_channel_swap(struct mtk_dpi = *dpi, break; } =20 - mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << CH_SWAP, CH_SWAP_MASK); + mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, + val << dpi->conf->channel_swap_shift, + CH_SWAP_MASK << dpi->conf->channel_swap_shift); } =20 static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool enable) @@ -829,6 +832,7 @@ static const struct mtk_dpi_conf mt8173_conf =3D { .swap_input_support =3D true, .dimension_mask =3D HPW_MASK, .hvsize_mask =3D HSIZE_MASK, + .channel_swap_shift =3D CH_SWAP, }; =20 static const struct mtk_dpi_conf mt2701_conf =3D { @@ -842,6 +846,7 @@ static const struct mtk_dpi_conf mt2701_conf =3D { .swap_input_support =3D true, .dimension_mask =3D HPW_MASK, .hvsize_mask =3D HSIZE_MASK, + .channel_swap_shift =3D CH_SWAP, }; =20 static const struct mtk_dpi_conf mt8183_conf =3D { @@ -854,6 +859,7 @@ static const struct mtk_dpi_conf mt8183_conf =3D { .swap_input_support =3D true, .dimension_mask =3D HPW_MASK, .hvsize_mask =3D HSIZE_MASK, + .channel_swap_shift =3D CH_SWAP, }; =20 static const struct mtk_dpi_conf mt8192_conf =3D { @@ -866,6 +872,7 @@ static const struct mtk_dpi_conf mt8192_conf =3D { .swap_input_support =3D true, .dimension_mask =3D HPW_MASK, .hvsize_mask =3D HSIZE_MASK, + .channel_swap_shift =3D CH_SWAP, }; =20 static int mtk_dpi_probe(struct platform_device *pdev) --=20 2.18.0