From nobody Mon Apr 27 06:02:58 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1BB4C433EF for ; Thu, 16 Jun 2022 13:38:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377136AbiFPNii (ORCPT ); Thu, 16 Jun 2022 09:38:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42476 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377128AbiFPNiX (ORCPT ); Thu, 16 Jun 2022 09:38:23 -0400 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80EBF2181D for ; Thu, 16 Jun 2022 06:38:21 -0700 (PDT) Received: by mail-wm1-x32a.google.com with SMTP id q15so795344wmj.2 for ; Thu, 16 Jun 2022 06:38:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PxD5eSuoVNmuy9uK+8ImVic/9oJqQQRTmLdQoVDSq7Y=; b=KUiIidYubKIQhmnPtrgcqWcZFytwUm9hJxPJTs/iRO0+H51/6/n1Xd/98LXtsAUToW DSycfm5OK+VF5Aw54NXyUhKkia6/lS63d8eVYhUiqo8opHX3+jl7rAM/1NYDeJA2Apb6 vP3T6unqET61xpxyXVK6Wn11V9+x+kRab3KMpVF4PSz5cANkm5TBzLGt9QHcyTU9PZkH HIS0CBP/4eOD5uv6gBTn6kDHVMXBFeCsgVaIxAtndx9CBM2vjwI7L3rt59SRZXILAKlW 54oA0+OZ6itH/HyVQ2d3DxcXnIrj0VxfSPMfLnN822oL790a8DpzHIOB0TJhHspehk5D 4B1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PxD5eSuoVNmuy9uK+8ImVic/9oJqQQRTmLdQoVDSq7Y=; b=NSa06X4/lbLf5gEZ5bBEv8GAiPO+t3+/R4pp9BpfWLbwR55dag0X+ClFzjxExwW+7a BvkCeSwxxeZ0O/MnLJckC3CAp9UB252hEwraVwfQRCWB3qzXb0gPMIpe8HkqI+I8DYtm tLwT+zuOU6XYv1QlVaPyp4FL+qgDwgFN+kOETqorGfIrpVSucaetHCgDH5viuf+p/xF7 7vjQ+81ieMiCx3MRXJq0KIICsHIXLEVrJnqYU88PdyPT5/XY4dn1re5/QxP9qSXoEqnX 9RuvwhwBgqQe1Lwu7SIHzzpsleMS90ZTRKXnkN/UZl7SYMNyCRyomO9egBw+11X5yDtt VWMw== X-Gm-Message-State: AJIora8O6MAAlvuB8pVtpL5ho43zTKD8MU91V21oYJNm8QHdavy/3X8+ U8xxLdhBQ5A5L7bhpMecuVM4yw== X-Google-Smtp-Source: AGRyM1tWwdUCxZ5lku8fS/JAqMfPYZ1pVuLz3qlRsQKA25sJXVvPekovAHC6E/LUsIRHdr7iSUur7w== X-Received: by 2002:a7b:c1d1:0:b0:39c:605c:1530 with SMTP id a17-20020a7bc1d1000000b0039c605c1530mr5150562wmj.80.1655386699992; Thu, 16 Jun 2022 06:38:19 -0700 (PDT) Received: from localhost.localdomain ([2a0d:e487:34f:da80:9c48:d9f8:5c33:3dd5]) by smtp.gmail.com with ESMTPSA id v12-20020a5d678c000000b0020c5253d90asm1935423wru.86.2022.06.16.06.38.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 06:38:19 -0700 (PDT) From: Neil Armstrong To: kishon@ti.com, vkoul@kernel.org, devicetree@vger.kernel.org Cc: linux-phy@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Neil Armstrong Subject: [PATCH v4 1/2] dt-bindings: phy: add Amlogic G12A Analog MIPI D-PHY bindings Date: Thu, 16 Jun 2022 15:38:10 +0200 Message-Id: <20220616133811.1674777-2-narmstrong@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220616133811.1674777-1-narmstrong@baylibre.com> References: <20220616133811.1674777-1-narmstrong@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Amlogic G12A SoCs embeds an Analog MIPI D-PHY to communicate with DSI panels, this adds the bindings. This Analog D-PHY works with a separate Digital MIPI D-PHY. Signed-off-by: Neil Armstrong Reviewed-by: Rob Herring --- .../phy/amlogic,g12a-mipi-dphy-analog.yaml | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/amlogic,g12a-mipi= -dphy-analog.yaml diff --git a/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-a= nalog.yaml b/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-a= nalog.yaml new file mode 100644 index 000000000000..7aa0c05d6ce4 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.y= aml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/amlogic,g12a-mipi-dphy-analog.yaml= #" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic G12A MIPI analog PHY + +maintainers: + - Neil Armstrong + +properties: + compatible: + const: amlogic,g12a-mipi-dphy-analog + + "#phy-cells": + const: 0 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - "#phy-cells" + +additionalProperties: false + +examples: + - | + phy@0 { + compatible =3D "amlogic,g12a-mipi-dphy-analog"; + reg =3D <0x0 0xc>; + #phy-cells =3D <0>; + }; --=20 2.25.1 From nobody Mon Apr 27 06:02:58 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B235AC43334 for ; Thu, 16 Jun 2022 13:38:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377161AbiFPNin (ORCPT ); Thu, 16 Jun 2022 09:38:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377130AbiFPNiY (ORCPT ); Thu, 16 Jun 2022 09:38:24 -0400 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3FC252AE06 for ; Thu, 16 Jun 2022 06:38:23 -0700 (PDT) Received: by mail-wr1-x435.google.com with SMTP id s1so1920622wra.9 for ; Thu, 16 Jun 2022 06:38:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=F/SPXYyJ9pOv+57/VRPyN+3QaTNRZ+8Q87oNWa1ed6U=; b=sZnvhiQPTbFhgH01BZXK9frx5kA9oJjPA7EMRswq3DvCa7aU2L5g/j16bM8oXtkyta +6FFNp85niS7md8GlEVv6dVl98KHd4ItmqnZyV5UZ21UaR5BSI2QdXVgdK4P7F9/05c0 tz9W+4UPJzYD9RjCidvYnXljAXw39h2u+Vj86JfR+Vj/Jects2tXu53R5vpYJe1s4lkJ 9/gCtdFoTGn1fpcZyy2sFS4ezcNNDRTrdnb3u8Scp7rv27YI5dnx1psDIityA7Qkd/VM L0ApCvLQWYvfmo5Xnk66wXKtIiFm1NUtKDIPDeBmdNlb33mfMSiHnd38NEKWn5KOTktH RwKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=F/SPXYyJ9pOv+57/VRPyN+3QaTNRZ+8Q87oNWa1ed6U=; b=JI8VnXn9qi+76qn+WHQvO9Q77H6C3vcT4aJbtSm0xzDGeqwgWF90dOK5GdLnyGKCS6 MUJwAdJdhZQALMU4Bspd+cJVPDGsbbhTCestBpYCkpK0IyAwDzCMxOXZFvgXVmEHZjUY oJsAYN3N4EULjmJ3SAgsGP3palI4O5ZjLmNbdB50p20LY2rr/rz6e3Um+zApChoRFRrx fm59NCre0r0e+3ZUDBo6TFIjVa+rvDhkN1kBVHqkSONvTFU2AbOXqvQEaiV6qYbR4LsH /8NT/IyK+uXymQ6z5Lr96L1yHA5JHfHafPDvylHQ9Kbaiv0ws7TsZYCqacss2GJ7OaPc Qd/A== X-Gm-Message-State: AJIora+npX2QXqQtZ1d3FOCJ/Py/wyJuvr1QMeQ6nTX9pN0AGCmqxMIT WZNNUYoomztZ2ejDluir8RDVFQ== X-Google-Smtp-Source: AGRyM1uzUj7FAN/10Bu3b+bPtVXXKsugwJewcCZ3H2BR0vg8eYeVP6T8bZOBrzVRTv2yR+QDna/jIA== X-Received: by 2002:a5d:4d8f:0:b0:210:3e14:ff27 with SMTP id b15-20020a5d4d8f000000b002103e14ff27mr4601797wru.81.1655386701496; Thu, 16 Jun 2022 06:38:21 -0700 (PDT) Received: from localhost.localdomain ([2a0d:e487:34f:da80:9c48:d9f8:5c33:3dd5]) by smtp.gmail.com with ESMTPSA id v12-20020a5d678c000000b0020c5253d90asm1935423wru.86.2022.06.16.06.38.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 06:38:21 -0700 (PDT) From: Neil Armstrong To: kishon@ti.com, vkoul@kernel.org Cc: linux-phy@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Neil Armstrong Subject: [PATCH v4 2/2] phy: amlogic: Add G12A Analog MIPI D-PHY driver Date: Thu, 16 Jun 2022 15:38:11 +0200 Message-Id: <20220616133811.1674777-3-narmstrong@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220616133811.1674777-1-narmstrong@baylibre.com> References: <20220616133811.1674777-1-narmstrong@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Amlogic G12A SoCs embeds an Analog MIPI D-PHY used to communicate with = DSI panels. Signed-off-by: Neil Armstrong --- drivers/phy/amlogic/Kconfig | 12 ++ drivers/phy/amlogic/Makefile | 1 + .../amlogic/phy-meson-g12a-mipi-dphy-analog.c | 177 ++++++++++++++++++ 3 files changed, 190 insertions(+) create mode 100644 drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c diff --git a/drivers/phy/amlogic/Kconfig b/drivers/phy/amlogic/Kconfig index 486ca23aba32..e4d1170efd54 100644 --- a/drivers/phy/amlogic/Kconfig +++ b/drivers/phy/amlogic/Kconfig @@ -59,6 +59,18 @@ config PHY_MESON_G12A_USB3_PCIE in Meson G12A SoCs. If unsure, say N. =20 +config PHY_MESON_G12A_MIPI_DPHY_ANALOG + tristate "Meson G12A MIPI Analog DPHY driver" + default ARCH_MESON + depends on OF && (ARCH_MESON || COMPILE_TEST) + select GENERIC_PHY + select REGMAP_MMIO + select GENERIC_PHY_MIPI_DPHY + help + Enable this to support the Meson MIPI Analog DPHY found in Meson G12A + SoCs. + If unsure, say N. + config PHY_MESON_AXG_PCIE tristate "Meson AXG PCIE PHY driver" default ARCH_MESON diff --git a/drivers/phy/amlogic/Makefile b/drivers/phy/amlogic/Makefile index c0886c850bb0..91e3b9790c03 100644 --- a/drivers/phy/amlogic/Makefile +++ b/drivers/phy/amlogic/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_PHY_MESON8B_USB2) +=3D phy-meson8b-usb2.o obj-$(CONFIG_PHY_MESON_GXL_USB2) +=3D phy-meson-gxl-usb2.o obj-$(CONFIG_PHY_MESON_G12A_USB2) +=3D phy-meson-g12a-usb2.o obj-$(CONFIG_PHY_MESON_G12A_USB3_PCIE) +=3D phy-meson-g12a-usb3-pcie.o +obj-$(CONFIG_PHY_MESON_G12A_MIPI_DPHY_ANALOG) +=3D phy-meson-g12a-mipi-dph= y-analog.o obj-$(CONFIG_PHY_MESON_AXG_PCIE) +=3D phy-meson-axg-pcie.o obj-$(CONFIG_PHY_MESON_AXG_MIPI_PCIE_ANALOG) +=3D phy-meson-axg-mipi-pcie-= analog.o obj-$(CONFIG_PHY_MESON_AXG_MIPI_DPHY) +=3D phy-meson-axg-mipi-dphy.o diff --git a/drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c b/driver= s/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c new file mode 100644 index 000000000000..adfcca38a952 --- /dev/null +++ b/drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c @@ -0,0 +1,177 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Meson G12A MIPI DSI Analog PHY + * + * Copyright (C) 2018 Amlogic, Inc. All rights reserved + * Copyright (C) 2020 BayLibre, SAS + * Author: Neil Armstrong + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define HHI_MIPI_CNTL0 0x00 +#define HHI_MIPI_CNTL0_DIF_REF_CTL1 GENMASK(31, 16) +#define HHI_MIPI_CNTL0_DIF_REF_CTL0 GENMASK(15, 0) + +#define HHI_MIPI_CNTL1 0x04 +#define HHI_MIPI_CNTL1_BANDGAP BIT(16) +#define HHI_MIPI_CNTL2_DIF_REF_CTL2 GENMASK(15, 0) + +#define HHI_MIPI_CNTL2 0x08 +#define HHI_MIPI_CNTL2_DIF_TX_CTL1 GENMASK(31, 16) +#define HHI_MIPI_CNTL2_CH_EN GENMASK(15, 11) +#define HHI_MIPI_CNTL2_DIF_TX_CTL0 GENMASK(10, 0) + +#define DSI_LANE_0 BIT(4) +#define DSI_LANE_1 BIT(3) +#define DSI_LANE_CLK BIT(2) +#define DSI_LANE_2 BIT(1) +#define DSI_LANE_3 BIT(0) + +struct phy_g12a_mipi_dphy_analog_priv { + struct phy *phy; + struct regmap *regmap; + struct phy_configure_opts_mipi_dphy config; +}; + +static int phy_g12a_mipi_dphy_analog_configure(struct phy *phy, + union phy_configure_opts *opts) +{ + struct phy_g12a_mipi_dphy_analog_priv *priv =3D phy_get_drvdata(phy); + int ret; + + ret =3D phy_mipi_dphy_config_validate(&opts->mipi_dphy); + if (ret) + return ret; + + memcpy(&priv->config, opts, sizeof(priv->config)); + + return 0; +} + +static int phy_g12a_mipi_dphy_analog_power_on(struct phy *phy) +{ + struct phy_g12a_mipi_dphy_analog_priv *priv =3D phy_get_drvdata(phy); + unsigned int reg; + + regmap_write(priv->regmap, HHI_MIPI_CNTL0, + FIELD_PREP(HHI_MIPI_CNTL0_DIF_REF_CTL0, 0x8) | + FIELD_PREP(HHI_MIPI_CNTL0_DIF_REF_CTL1, 0xa487)); + + regmap_write(priv->regmap, HHI_MIPI_CNTL1, + FIELD_PREP(HHI_MIPI_CNTL2_DIF_REF_CTL2, 0x2e) | + HHI_MIPI_CNTL1_BANDGAP); + + regmap_write(priv->regmap, HHI_MIPI_CNTL2, + FIELD_PREP(HHI_MIPI_CNTL2_DIF_TX_CTL0, 0x459) | + FIELD_PREP(HHI_MIPI_CNTL2_DIF_TX_CTL1, 0x2680)); + + reg =3D DSI_LANE_CLK; + switch (priv->config.lanes) { + case 4: + reg |=3D DSI_LANE_3; + fallthrough; + case 3: + reg |=3D DSI_LANE_2; + fallthrough; + case 2: + reg |=3D DSI_LANE_1; + fallthrough; + case 1: + reg |=3D DSI_LANE_0; + break; + default: + reg =3D 0; + } + + regmap_update_bits(priv->regmap, HHI_MIPI_CNTL2, + HHI_MIPI_CNTL2_CH_EN, + FIELD_PREP(HHI_MIPI_CNTL2_CH_EN, reg)); + + return 0; +} + +static int phy_g12a_mipi_dphy_analog_power_off(struct phy *phy) +{ + struct phy_g12a_mipi_dphy_analog_priv *priv =3D phy_get_drvdata(phy); + + regmap_write(priv->regmap, HHI_MIPI_CNTL0, 0); + regmap_write(priv->regmap, HHI_MIPI_CNTL1, 0); + regmap_write(priv->regmap, HHI_MIPI_CNTL2, 0); + + return 0; +} + +static const struct phy_ops phy_g12a_mipi_dphy_analog_ops =3D { + .configure =3D phy_g12a_mipi_dphy_analog_configure, + .power_on =3D phy_g12a_mipi_dphy_analog_power_on, + .power_off =3D phy_g12a_mipi_dphy_analog_power_off, + .owner =3D THIS_MODULE, +}; + +static int phy_g12a_mipi_dphy_analog_probe(struct platform_device *pdev) +{ + struct phy_provider *phy; + struct device *dev =3D &pdev->dev; + struct phy_g12a_mipi_dphy_analog_priv *priv; + struct device_node *np =3D dev->of_node; + struct regmap *map; + int ret; + + priv =3D devm_kmalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + /* Get the hhi system controller node */ + map =3D syscon_node_to_regmap(of_get_parent(dev->of_node)); + if (IS_ERR(map)) { + dev_err(dev, + "failed to get HHI regmap\n"); + return PTR_ERR(map); + } + + priv->regmap =3D map; + + priv->phy =3D devm_phy_create(dev, np, &phy_g12a_mipi_dphy_analog_ops); + if (IS_ERR(priv->phy)) { + ret =3D PTR_ERR(priv->phy); + if (ret !=3D -EPROBE_DEFER) + dev_err(dev, "failed to create PHY\n"); + return ret; + } + + phy_set_drvdata(priv->phy, priv); + dev_set_drvdata(dev, priv); + + phy =3D devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(phy); +} + +static const struct of_device_id phy_g12a_mipi_dphy_analog_of_match[] =3D { + { + .compatible =3D "amlogic,g12a-mipi-dphy-analog", + }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, phy_g12a_mipi_dphy_analog_of_match); + +static struct platform_driver phy_g12a_mipi_dphy_analog_driver =3D { + .probe =3D phy_g12a_mipi_dphy_analog_probe, + .driver =3D { + .name =3D "phy-meson-g12a-mipi-dphy-analog", + .of_match_table =3D phy_g12a_mipi_dphy_analog_of_match, + }, +}; +module_platform_driver(phy_g12a_mipi_dphy_analog_driver); + +MODULE_AUTHOR("Neil Armstrong "); +MODULE_DESCRIPTION("Meson G12A MIPI Analog D-PHY driver"); +MODULE_LICENSE("GPL v2"); --=20 2.25.1