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[85.68.201.192]) by smtp.gmail.com with ESMTPSA id d9-20020adffd89000000b002102d4ed579sm7806465wrr.39.2022.06.13.02.06.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jun 2022 02:06:09 -0700 (PDT) From: Jerome NEANNE To: lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, nm@ti.com, kristo@kernel.org, will@kernel.org, lee.jones@linaro.org, jneanne@baylibre.com Cc: khilman@baylibre.com, narmstrong@baylibre.com, msp@baylibre.com, j-keerthy@ti.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 1/5] regulator: dt-bindings: Add TI TPS65219 PMIC bindings Date: Mon, 13 Jun 2022 11:06:00 +0200 Message-Id: <20220613090604.9975-2-jneanne@baylibre.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220613090604.9975-1-jneanne@baylibre.com> References: <20220613090604.9975-1-jneanne@baylibre.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add TPS65219 PMIC bindings using json-schema. Describe required properties and regname-supply. regname-supply is required when bypass mode is used for a regulator. Describes regulator topology. Signed-off-by: Jerome NEANNE Reviewed-by: Rob Herring --- .../bindings/regulator/ti,tps65219.yaml | 146 ++++++++++++++++++ 1 file changed, 146 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/ti,tps65219= .yaml diff --git a/Documentation/devicetree/bindings/regulator/ti,tps65219.yaml b= /Documentation/devicetree/bindings/regulator/ti,tps65219.yaml new file mode 100644 index 000000000000..a4717ff4e95b --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/ti,tps65219.yaml @@ -0,0 +1,146 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/ti,tps65219.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI tps65219 Power Management Integrated Circuit regulators + +maintainers: + - Jerome Neanne + +description: | + Regulator nodes should be named to buck and ldo. + +properties: + compatible: + enum: + - ti,tps65219 + + reg: + maxItems: 1 + +patternProperties: + "^buck[1-3]-supply$": + description: Input supply phandle of one regulator. + + "^ldo[1-4]-supply$": + description: Input supply phandle of one regulator. + + regulators: + type: object + description: | + list of regulators provided by this controller + + patternProperties: + "^ldo[1-4]$": + type: object + $ref: regulator.yaml# + description: + Properties for single LDO regulator. + + properties: + regulator-name: + pattern: "^VDD[A-Z0-9_]+$" + description: + should be "VDDNAME_LDO1", ..., "VDDNAMELDO4" + + unevaluatedProperties: false + + "^buck[1-3]$": + type: object + $ref: regulator.yaml# + description: + Properties for single BUCK regulator. + + properties: + regulator-name: + pattern: "^VDD|VCC[A-Z0-9_]+$" + description: + should be like "VDD_BUCK1NAME", ..., "VCCBUCK_3NAME" + + unevaluatedProperties: false + + additionalProperties: false + +required: + - compatible + - reg + - regulators + +additionalProperties: false + +examples: + - | + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + tps65219: pmic@30 { + compatible =3D "ti,tps65219"; + reg =3D <0x30>; + buck1-supply =3D <&vcc_3v3_sys>; + buck2-supply =3D <&vcc_3v3_sys>; + buck3-supply =3D <&vcc_3v3_sys>; + ldo1-supply =3D <&vcc_3v3_sys>; + ldo2-supply =3D <&buck2_reg>; + ldo3-supply =3D <&vcc_3v3_sys>; + ldo4-supply =3D <&vcc_3v3_sys>; + + regulators { + buck1_reg: buck1 { + regulator-name =3D "VDD_CORE"; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; + regulator-boot-on; + regulator-always-on; + }; + + buck2_reg: buck2 { + regulator-name =3D "VCC1V8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + buck3_reg: buck3 { + regulator-name =3D "VDD_LPDDR4"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1_reg: ldo1 { + regulator-name =3D "VDDSHV_SD_IO_PMIC"; + regulator-min-microvolt =3D <33000000>; + regulator-max-microvolt =3D <33000000>; + }; + + ldo2_reg: ldo2 { + regulator-name =3D "VDDAR_CORE"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo3_reg: ldo3 { + regulator-name =3D "VDDA_1V8"; + regulator-min-microvolt =3D <18000000>; + regulator-max-microvolt =3D <18000000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo4_reg: ldo4 { + regulator-name =3D "VDD_PHY_2V5"; + regulator-min-microvolt =3D <25000000>; + regulator-max-microvolt =3D <25000000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + }; --=20 2.17.1 From nobody Mon Apr 27 14:54:11 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A2B4C43334 for ; Mon, 13 Jun 2022 09:07:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239396AbiFMJGW (ORCPT ); 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[85.68.201.192]) by smtp.gmail.com with ESMTPSA id d9-20020adffd89000000b002102d4ed579sm7806465wrr.39.2022.06.13.02.06.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jun 2022 02:06:11 -0700 (PDT) From: Jerome NEANNE To: lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, nm@ti.com, kristo@kernel.org, will@kernel.org, lee.jones@linaro.org, jneanne@baylibre.com Cc: khilman@baylibre.com, narmstrong@baylibre.com, msp@baylibre.com, j-keerthy@ti.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 2/5] mfd: drivers: Add TI TPS65219 PMIC support Date: Mon, 13 Jun 2022 11:06:01 +0200 Message-Id: <20220613090604.9975-3-jneanne@baylibre.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220613090604.9975-1-jneanne@baylibre.com> References: <20220613090604.9975-1-jneanne@baylibre.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The TPS65219 is a power management IC PMIC designed to supply a wide range of SoCs in both portable and stationary applications. Any SoC can control TPS65219 over a standard I2C interface. It contains the following components: - Regulators. - Over Temperature warning and Shut down. - GPIOs - Multi Function Pins (MFP) This patch adds support for tps65219 mfd device. At this time only the functionalities listed below are made available: - Regulators probe and functionalities - warm and cold reset support - SW shutdown support Signed-off-by: Jerome NEANNE --- drivers/mfd/Kconfig | 15 ++ drivers/mfd/Makefile | 1 + drivers/mfd/tps65219.c | 296 +++++++++++++++++++++++++++++++++++ include/linux/mfd/tps65219.h | 245 +++++++++++++++++++++++++++++ 4 files changed, 557 insertions(+) create mode 100644 drivers/mfd/tps65219.c create mode 100644 include/linux/mfd/tps65219.h diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 6a3fd2d75f96..f8639b7b034b 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1555,6 +1555,21 @@ config MFD_TPS65218 This driver can also be built as a module. If so, the module will be called tps65218. =20 +config MFD_TPS65219 + tristate "TI TPS65219 Power Management chips" + depends on I2C && OF + select MFD_CORE + select REGMAP_I2C + select REGMAP_IRQ + help + If you say yes here you get support for the TPS65219 series of + Power Management chips. + These include voltage regulators, gpio and other features + that are often used in portable devices. + + This driver can also be built as a module. If so, the module + will be called tps65219. + config MFD_TPS6586X bool "TI TPS6586x Power Management chips" depends on I2C=3Dy diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 8116c19d5fd4..11bce3e134f4 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -101,6 +101,7 @@ obj-$(CONFIG_TPS6507X) +=3D tps6507x.o obj-$(CONFIG_MFD_TPS65086) +=3D tps65086.o obj-$(CONFIG_MFD_TPS65217) +=3D tps65217.o obj-$(CONFIG_MFD_TPS65218) +=3D tps65218.o +obj-$(CONFIG_MFD_TPS65219) +=3D tps65219.o obj-$(CONFIG_MFD_TPS65910) +=3D tps65910.o obj-$(CONFIG_MFD_TPS65912) +=3D tps65912-core.o obj-$(CONFIG_MFD_TPS65912_I2C) +=3D tps65912-i2c.o diff --git a/drivers/mfd/tps65219.c b/drivers/mfd/tps65219.c new file mode 100644 index 000000000000..b8e8115da555 --- /dev/null +++ b/drivers/mfd/tps65219.c @@ -0,0 +1,296 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for TPS65219 Integrated power management chipsets + * + * Copyright (C) 2022 BayLibre Incorporated - https://www.baylibre.com/ + */ + +/* This implementation derived from tps65218 authored by "J Keerthy " */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + + +/** + * pmic_rst_restart: trig tps65219 reset to SOC. + * + * Trigged via notifier + */ +static int pmic_rst_restart(struct notifier_block *this, + unsigned long mode, void *cmd) +{ + struct tps65219 *tps; + + tps =3D container_of(this, struct tps65219, nb); + if (tps !=3D NULL) { + if (WARMNCOLD) + tps65219_warm_reset(tps); + else + tps65219_cold_reset(tps); + } else { + pr_err("%s: pointer to tps65219 is invalid\n", __func__); + return -ENODEV; + } + return NOTIFY_DONE; +} + +static struct i2c_client *tps65219_i2c_client; +/** + * pmic_poweroff: trig tps65219 regulators power OFF sequence. + */ +static void pmic_poweroff_do_poweroff(void) +{ + struct tps65219 *tps; + + tps =3D dev_get_drvdata(&tps65219_i2c_client->dev); + tps65219_soft_shutdown(tps); + +} + +static struct notifier_block pmic_rst_restart_nb =3D { + .notifier_call =3D pmic_rst_restart, +}; + +static const struct mfd_cell tps65219_cells[] =3D { + { .name =3D "tps65219-regulator", }, +}; + +/** + * tps65219_reg_read: Read a single tps65219 register. + * + * @tps: Device to read from. + * @reg: Register to read. + * @val: Contians the value + */ +int tps65219_reg_read(struct tps65219 *tps, unsigned int reg, + unsigned int *val) +{ + return regmap_read(tps->regmap, reg, val); +} +EXPORT_SYMBOL_GPL(tps65219_reg_read); + +/** + * tps65219_reg_write: Write a single tps65219 register. + * + * @tps: Device to write to. + * @reg: Register to write to. + * @val: Value to write. + */ +int tps65219_reg_write(struct tps65219 *tps, unsigned int reg, + unsigned int val) +{ + return regmap_write(tps->regmap, reg, val); +} +EXPORT_SYMBOL_GPL(tps65219_reg_write); + +/** + * tps65219_update_bits: Modify bits w.r.t mask, val and level. + * + * @tps: Device to write to. + * @reg: Register to read-write to. + * @mask: Mask. + * @val: Value to write. + */ +static int tps65219_update_bits(struct tps65219 *tps, unsigned int reg, + unsigned int mask, unsigned int val) +{ + int ret; + unsigned int data; + + ret =3D regmap_read(tps->regmap, reg, &data); + if (ret) { + dev_err(tps->dev, "Read from reg 0x%x failed\n", reg); + return ret; + } + + data &=3D ~mask; + data |=3D val & mask; + + mutex_lock(&tps->tps_lock); + ret =3D tps65219_reg_write(tps, reg, data); + if (ret) + dev_err(tps->dev, "Write for reg 0x%x failed\n", reg); + mutex_unlock(&tps->tps_lock); + + return ret; +} + +int tps65219_set_bits(struct tps65219 *tps, unsigned int reg, + unsigned int mask, unsigned int val) +{ + return tps65219_update_bits(tps, reg, mask, val); +} +EXPORT_SYMBOL_GPL(tps65219_set_bits); + +int tps65219_clear_bits(struct tps65219 *tps, unsigned int reg, + unsigned int mask) +{ + return tps65219_update_bits(tps, reg, mask, 0); +} +EXPORT_SYMBOL_GPL(tps65219_clear_bits); + +/** + * tps65219_warm_reset: issue warm reset to SOC. + * + * @tps: Device to write to. + */ +int tps65219_warm_reset(struct tps65219 *tps) +{ + int ret; + + dev_dbg(tps->dev, "warm reset"); + ret =3D tps65219_set_bits(tps, TPS65219_REG_MFP_CTRL, TPS65219_MFP_WARM_= RESET_I2C_CTRL, + TPS65219_MFP_WARM_RESET_I2C_CTRL); + + return ret; +} +EXPORT_SYMBOL_GPL(tps65219_warm_reset); + +/** + * tps65219_cold_reset: issue cold reset to SOC. + * + * @tps: Device to write to. + */ +int tps65219_cold_reset(struct tps65219 *tps) +{ + int ret; + + dev_dbg(tps->dev, "cold reset generation"); + ret =3D tps65219_set_bits(tps, TPS65219_REG_MFP_CTRL, TPS65219_MFP_COLD_= RESET_I2C_CTRL, + TPS65219_MFP_COLD_RESET_I2C_CTRL); + + return ret; +} +EXPORT_SYMBOL_GPL(tps65219_cold_reset); + +/** + * tps65219_soft_shutdown: issue cold reset to SOC. + * + * @tps: Device to write to. + */ +int tps65219_soft_shutdown(struct tps65219 *tps) +{ + int ret; + + dev_dbg(tps->dev, "software shutdown"); + ret =3D tps65219_set_bits(tps, TPS65219_REG_MFP_CTRL, TPS65219_MFP_I2C_O= FF_REQ, + TPS65219_MFP_I2C_OFF_REQ); + + return ret; +} +EXPORT_SYMBOL_GPL(tps65219_soft_shutdown); + +static const struct regmap_range tps65219_yes_ranges[] =3D { + regmap_reg_range(TPS65219_REG_INT_SOURCE, TPS65219_REG_POWER_UP_STATUS), +}; + +static const struct regmap_access_table tps65219_volatile_table =3D { + .yes_ranges =3D tps65219_yes_ranges, + .n_yes_ranges =3D ARRAY_SIZE(tps65219_yes_ranges), +}; + +static const struct regmap_config tps65219_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + .cache_type =3D REGCACHE_RBTREE, + .volatile_table =3D &tps65219_volatile_table, +}; + +static const struct of_device_id of_tps65219_match_table[] =3D { + { .compatible =3D "ti,tps65219", }, + {} +}; +MODULE_DEVICE_TABLE(of, of_tps65219_match_table); + +static int tps65219_probe(struct i2c_client *client, + const struct i2c_device_id *ids) +{ + struct tps65219 *tps; + int ret; + unsigned int chipid; + + tps =3D devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL); + if (!tps) + return -ENOMEM; + + i2c_set_clientdata(client, tps); + tps->dev =3D &client->dev; + tps->regmap =3D devm_regmap_init_i2c(client, &tps65219_regmap_config); + if (IS_ERR(tps->regmap)) { + ret =3D PTR_ERR(tps->regmap); + dev_err(tps->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + mutex_init(&tps->tps_lock); + + ret =3D regmap_read(tps->regmap, TPS65219_REG_TI_DEV_ID, &chipid); + if (ret) { + dev_err(tps->dev, "Failed to read device ID: %d\n", ret); + return ret; + } + + tps->rev =3D chipid & TPS65219_DEVID_REV_MASK; + + ret =3D mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, tps65219_cells, + ARRAY_SIZE(tps65219_cells), NULL, 0, + NULL); + + tps->nb =3D pmic_rst_restart_nb; + ret =3D register_restart_handler(&pmic_rst_restart_nb); + + if (ret) { + dev_err(tps->dev, "%s: cannot register restart handler, %d\n", + __func__, ret); + return -ENODEV; + } + + /* If a pm_power_off function has already been added, leave it alone */ + if (pm_power_off !=3D NULL) { + dev_warn(tps->dev, + "%s: pm_power_off function already registered\n", + __func__); + } else { + tps65219_i2c_client =3D client; + pm_power_off =3D &pmic_poweroff_do_poweroff; + } + return ret; +} + +static const struct i2c_device_id tps65219_id_table[] =3D { + { "tps65219", TPS65219 }, + { }, +}; +MODULE_DEVICE_TABLE(i2c, tps65219_id_table); + +static struct i2c_driver tps65219_driver =3D { + .driver =3D { + .name =3D "tps65219", + .of_match_table =3D of_tps65219_match_table, + }, + .probe =3D tps65219_probe, + .id_table =3D tps65219_id_table, +}; + +module_i2c_driver(tps65219_driver); + +MODULE_AUTHOR("Jerome NEANNE "); +MODULE_DESCRIPTION("TPS65219 chip family multi-function driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/mfd/tps65219.h b/include/linux/mfd/tps65219.h new file mode 100644 index 000000000000..c55efed2d130 --- /dev/null +++ b/include/linux/mfd/tps65219.h @@ -0,0 +1,245 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * linux/mfd/tps65219.h + * + * Functions to access TPS65219 power management chip. + * + * Copyright (C) 2022 BayLibre Incorporated - https://www.baylibre.com/ + */ + +#ifndef __LINUX_MFD_TPS65219_H +#define __LINUX_MFD_TPS65219_H + +#include +#include +#include +#include + +#define WARMNCOLD 1 +#define TPS65219_1V35 1350000 +#define TPS65219_1V8 1800000 + +/* TPS chip id list */ +#define TPS65219 0xF0 + +/* I2C ID for TPS65219 part */ +#define TPS65219_I2C_ID 0x24 + +/* All register addresses */ +#define TPS65219_REG_TI_DEV_ID 0x00 +#define TPS65219_REG_NVM_ID 0x01 +#define TPS65219_REG_ENABLE_CTRL 0x02 +#define TPS65219_REG_BUCKS_CONFIG 0x03 +#define TPS65219_REG_LDO4_VOUT 0x04 +#define TPS65219_REG_LDO3_VOUT 0x05 +#define TPS65219_REG_LDO2_VOUT 0x06 +#define TPS65219_REG_LDO1_VOUT 0x07 +#define TPS65219_REG_BUCK3_VOUT 0x8 +#define TPS65219_REG_BUCK2_VOUT 0x9 +#define TPS65219_REG_BUCK1_VOUT 0xA +#define TPS65219_REG_LDO4_SEQUENCE_SLOT 0xB +#define TPS65219_REG_LDO3_SEQUENCE_SLOT 0xC +#define TPS65219_REG_LDO2_SEQUENCE_SLOT 0xD +#define TPS65219_REG_LDO1_SEQUENCE_SLOT 0xE +#define TPS65219_REG_BUCK3_SEQUENCE_SLOT 0xF +#define TPS65219_REG_BUCK2_SEQUENCE_SLOT 0x10 +#define TPS65219_REG_BUCK1_SEQUENCE_SLOT 0x11 +#define TPS65219_REG_nRST_SEQUENCE_SLOT 0x12 +#define TPS65219_REG_GPIO_SEQUENCE_SLOT 0x13 +#define TPS65219_REG_GPO2_SEQUENCE_SLOT 0x14 +#define TPS65219_REG_GPO1_SEQUENCE_SLOT 0x15 +#define TPS65219_REG_POWER_UP_SLOT_DURATION_1 0x16 +#define TPS65219_REG_POWER_UP_SLOT_DURATION_2 0x17 +#define TPS65219_REG_POWER_UP_SLOT_DURATION_3 0x18 +#define TPS65219_REG_POWER_UP_SLOT_DURATION_4 0x19 +#define TPS65219_REG_POWER_DOWN_SLOT_DURATION_1 0x1A +#define TPS65219_REG_POWER_DOWN_SLOT_DURATION_2 0x1B +#define TPS65219_REG_POWER_DOWN_SLOT_DURATION_3 0x1C +#define TPS65219_REG_POWER_DOWN_SLOT_DURATION_4 0x1D +#define TPS65219_REG_GENERAL_CONFIG 0x1E +#define TPS65219_REG_MFP_1_CONFIG 0x1F +#define TPS65219_REG_MFP_2_CONFIG 0x20 +#define TPS65219_REG_STBY_1_CONFIG 0x21 +#define TPS65219_REG_STBY_2_CONFIG 0x22 +#define TPS65219_REG_OC_DEGL_CONFIG 0x23 +#define TPS65219_REG_INT_MASK_UV 0x24 +#define TPS65219_REG_MASK_CONFIG 0x25 +#define TPS65219_REG_I2C_ADDRESS_REG 0x26 +#define TPS65219_REG_USER_GENERAL_NVM_STORAGE 0x27 +#define TPS65219_REG_MANUFACTURING_VER 0x28 +#define TPS65219_REG_MFP_CTRL 0x29 +#define TPS65219_REG_DISCHARGE_CONFIG 0x2A +#define TPS65219_REG_INT_SOURCE 0x2B +#define TPS65219_REG_INT_LDO_3_4 0x2C +#define TPS65219_REG_INT_LDO_1_2 0x2D +#define TPS65219_REG_INT_BUCK_3 0x2E +#define TPS65219_REG_INT_BUCK_1_2 0x2F +#define TPS65219_REG_INT_SYSTEM 0x30 +#define TPS65219_REG_INT_RV 0x31 +#define TPS65219_REG_INT_TIMEOUT_RV_SD 0x32 +#define TPS65219_REG_INT_PB 0x33 +#define TPS65219_REG_USER_NVM_CMD 0x34 +#define TPS65219_REG_POWER_UP_STATUS 0x35 +#define TPS65219_REG_SPARE_2 0x36 +#define TPS65219_REG_SPARE_3 0x37 +#define TPS65219_REG_FACTORY_CONFIG_2 0x41 + +/* Register field definitions */ +#define TPS65219_DEVID_REV_MASK 0xFF +#define TPS65219_BUCKS_LDOS_VOUT_VSET_MASK 0x3F +#define TPS65219_BUCKS_UV_THR_SEL BIT(6) +#define TPS65219_BUCKS_BW_SEL BIT(7) +#define TPS65219_LDOS_BYP_CONFIG_SHIFT 6 +#define TPS65219_LDOS_BYP_CONFIG_MASK BIT(TPS65219_LDOS_BYP_CONFIG_SHIFT) +#define TPS65219_LDOS_LSW_CONFIG_MASK BIT(7) +/* Regulators enable control */ +#define TPS65219_ENABLE_BUCK1_EN BIT(0) +#define TPS65219_ENABLE_BUCK2_EN BIT(1) +#define TPS65219_ENABLE_BUCK3_EN BIT(2) +#define TPS65219_ENABLE_LDO1_EN BIT(3) +#define TPS65219_ENABLE_LDO2_EN BIT(4) +#define TPS65219_ENABLE_LDO3_EN BIT(5) +#define TPS65219_ENABLE_LDO4_EN BIT(6) +/* power ON-OFF sequence slot */ +#define TPS65219_BUCKS_LDOS_SEQUENCE_OFF_SLOT_MASK 0x0F +#define TPS65219_BUCKS_LDOS_SEQUENCE_ON_SLOT_MASK 0xF0 +/* TODO: Not needed, same mapping as TPS65219_ENABLE_REGNAME_EN, factorize= */ +#define TPS65219_STBY1_BUCK1_STBY_EN BIT(0) +#define TPS65219_STBY1_BUCK2_STBY_EN BIT(1) +#define TPS65219_STBY1_BUCK3_STBY_EN BIT(2) +#define TPS65219_STBY1_LDO1_STBY_EN BIT(3) +#define TPS65219_STBY1_LDO2_STBY_EN BIT(4) +#define TPS65219_STBY1_LDO3_STBY_EN BIT(5) +#define TPS65219_STBY1_LDO4_STBY_EN BIT(6) +/* STBY_2 config */ +#define TPS65219_STBY2_GPO1_STBY_EN BIT(0) +#define TPS65219_STBY2_GPO2_STBY_EN BIT(1) +#define TPS65219_STBY2_GPIO_STBY_EN BIT(2) +/* MFP Control */ +#define TPS65219_MFP_I2C_OFF_REQ BIT(0) +#define TPS65219_MFP_STBY_I2C_CTRL BIT(1) +#define TPS65219_MFP_COLD_RESET_I2C_CTRL BIT(2) +#define TPS65219_MFP_WARM_RESET_I2C_CTRL BIT(3) +#define TPS65219_MFP_GPIO_STATUS BIT(4) +#define BUCKS_LDOS_STBY_ON_BIT 0x1 +/* MFP_1 Config */ +#define TPS65219_MFP_1_VSEL_DDR_SEL BIT(0) +#define TPS65219_MFP_1_VSEL_SD_POL BIT(1) +#define TPS65219_MFP_1_VSEL_RAIL BIT(2) +/* interrupts source status*/ +#define TPS65219_INT_SRC_TIMEOUT_RV_SD_IS_SET BIT(0) +#define TPS65219_INT_SRC_RV_IS_SET BIT(1) +#define TPS65219_INT_SRC_SYSTEM_IS_SET BIT(2) +#define TPS65219_INT_SRC_BUCK_1_2_IS_SET BIT(3) +#define TPS65219_INT_SRC_BUCK_3_IS_SET BIT(4) +#define TPS65219_INT_SRC_LDO_1_2_IS_SET BIT(5) +#define TPS65219_INT_SRC_LDO_3_4_IS_SET BIT(6) +#define TPS65219_INT_SRC_PB_IS_SET BIT(7) +/* UnderVoltage - Short to GND - OverCurrent*/ +/* LDO3-4 */ +#define TPS65219_INT_LDO3_SCG BIT(0) +#define TPS65219_INT_LDO3_OC BIT(1) +#define TPS65219_INT_LDO3_UV BIT(2) +#define TPS65219_INT_LDO4_SCG BIT(3) +#define TPS65219_INT_LDO4_OC BIT(4) +#define TPS65219_INT_LDO4_UV BIT(5) +/* LDO1-2 */ +#define TPS65219_INT_LDO1_SCG BIT(0) +#define TPS65219_INT_LDO1_OC BIT(1) +#define TPS65219_INT_LDO1_UV BIT(2) +#define TPS65219_INT_LDO2_SCG BIT(3) +#define TPS65219_INT_LDO2_OC BIT(4) +#define TPS65219_INT_LDO2_UV BIT(5) +/* BUCK3 */ +#define TPS65219_INT_BUCK3_SCG BIT(0) +#define TPS65219_INT_BUCK3_OC BIT(1) +#define TPS65219_INT_BUCK3_NEG_OC BIT(2) +#define TPS65219_INT_BUCK3_UV BIT(3) +/* BUCK1-2 */ +#define TPS65219_INT_BUCK1_SCG BIT(0) +#define TPS65219_INT_BUCK1_OC BIT(1) +#define TPS65219_INT_BUCK1_NEG_OC BIT(2) +#define TPS65219_INT_BUCK1_UV BIT(3) +#define TPS65219_INT_BUCK2_SCG BIT(4) +#define TPS65219_INT_BUCK2_OC BIT(5) +#define TPS65219_INT_BUCK2_NEG_OC BIT(6) +#define TPS65219_INT_BUCK2_UV BIT(7) +/* Thermal Sensor */ +#define TPS65219_INT_SENSOR_3_WARM BIT(0) +#define TPS65219_INT_SENSOR_2_WARM BIT(1) +#define TPS65219_INT_SENSOR_1_WARM BIT(2) +#define TPS65219_INT_SENSOR_0_WARM BIT(3) +#define TPS65219_INT_SENSOR_3_HOT BIT(4) +#define TPS65219_INT_SENSOR_2_HOT BIT(5) +#define TPS65219_INT_SENSOR_1_HOT BIT(6) +#define TPS65219_INT_SENSOR_0_HOT BIT(7) +/* Residual Voltage */ +#define TPS65219_INT_BUCK1_RV BIT(0) +#define TPS65219_INT_BUCK2_RV BIT(1) +#define TPS65219_INT_BUCK3_RV BIT(2) +#define TPS65219_INT_LDO1_RV BIT(3) +#define TPS65219_INT_LDO2_RV BIT(4) +#define TPS65219_INT_LDO3_RV BIT(5) +#define TPS65219_INT_LDO4_RV BIT(6) +/* Residual Voltage ShutDown */ +#define TPS65219_INT_BUCK1_RV_SD BIT(0) +#define TPS65219_INT_BUCK2_RV_SD BIT(1) +#define TPS65219_INT_BUCK3_RV_SD BIT(2) +#define TPS65219_INT_LDO1_RV_SD BIT(3) +#define TPS65219_INT_LDO2_RV_SD BIT(4) +#define TPS65219_INT_LDO3_RV_SD BIT(5) +#define TPS65219_INT_LDO4_RV_SD BIT(6) +#define TPS65219_INT_TIMEOUT BIT(7) +/* Power Button */ +#define TPS65219_INT_PB_FALLING_EDGE_DET BIT(0) +#define TPS65219_INT_PB_RISING_EDGE_DETECT BIT(1) +#define TPS65219_INT_PB_REAL_TIME_STATUS BIT(2) + +enum tps65219_regulator_id { + /* DCDC's */ + TPS65219_BUCK_1, + TPS65219_BUCK_2, + TPS65219_BUCK_3, + /* LDOs */ + TPS65219_LDO_1, + TPS65219_LDO_2, + TPS65219_LDO_3, + TPS65219_LDO_4, +}; + +#define TPS65219_MAX_REG_ID TPS65219_LDO_4 + +/* Number of step-down converters available */ +#define TPS65219_NUM_DCDC 3 +/* Number of LDO voltage regulators available */ +#define TPS65219_NUM_LDO 4 +/* Number of total regulators available */ +#define TPS65219_NUM_REGULATOR (TPS65219_NUM_DCDC + TPS65219_NUM_LDO) + +/** + * struct tps65219 - tps65219 sub-driver chip access routines + * + * Device data may be used to access the TPS65219 chip + */ +struct tps65219 { + struct device *dev; + unsigned int id; + u8 rev; + struct mutex tps_lock; /* lock guarding the data structure */ + struct regulator_desc desc[TPS65219_NUM_REGULATOR]; + struct regmap *regmap; + u8 *strobes; + struct notifier_block nb; +}; +int tps65219_reg_read(struct tps65219 *tps, unsigned int reg, + unsigned int *val); +int tps65219_reg_write(struct tps65219 *tps, unsigned int reg, + unsigned int val); +int tps65219_set_bits(struct tps65219 *tps, unsigned int reg, + unsigned int mask, unsigned int val); +int tps65219_clear_bits(struct tps65219 *tps, unsigned int reg, + unsigned int mask); +int tps65219_warm_reset(struct tps65219 *tps); +int tps65219_cold_reset(struct tps65219 *tps); +int tps65219_soft_shutdown(struct tps65219 *tps); +#endif /* __LINUX_MFD_TPS65219_H */ --=20 2.17.1 From nobody Mon Apr 27 14:54:11 2026 Return-Path: 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[85.68.201.192]) by smtp.gmail.com with ESMTPSA id d9-20020adffd89000000b002102d4ed579sm7806465wrr.39.2022.06.13.02.06.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jun 2022 02:06:13 -0700 (PDT) From: Jerome NEANNE To: lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, nm@ti.com, kristo@kernel.org, will@kernel.org, lee.jones@linaro.org, jneanne@baylibre.com Cc: khilman@baylibre.com, narmstrong@baylibre.com, msp@baylibre.com, j-keerthy@ti.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 3/5] regulator: drivers: Add TI TPS65219 PMIC regulators support Date: Mon, 13 Jun 2022 11:06:02 +0200 Message-Id: <20220613090604.9975-4-jneanne@baylibre.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220613090604.9975-1-jneanne@baylibre.com> References: <20220613090604.9975-1-jneanne@baylibre.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The regulators set consists of 3 bucks DCDCs and 4 LDOs. The output voltages are configurable and are meant to supply power to the main processor and other components. Validation: Visual check: cat /sys/kernel/debug/regulator/regulator_summary Validation: userspace-consumer and virtual-regulator required to test further Enable/Disable: cat /sys/devices/platform/userspace-consumer-VDDSHV_SD_IO_PMIC/state echo disabled > /sys/devices/platform/ userspace-consumer-VDDSHV_SD_IO_PMIC/state echo enabled > /sys/devices/platform/ userspace-consumer-VDDSHV_SD_IO_PMIC/state Change voltage: cat /sys/devices/platform/regulator-virtual-ldo1/min_microvolts echo 1000000 > /sys/devices/platform/regulator-virtual-ldo1/ min_microvolts echo 3000000 > /sys/devices/platform/regulator-virtual-ldo1/ max_microvolts Signed-off-by: Jerome NEANNE --- drivers/regulator/Kconfig | 9 + drivers/regulator/Makefile | 1 + drivers/regulator/tps65219-regulator.c | 334 +++++++++++++++++++++++++ 3 files changed, 344 insertions(+) create mode 100644 drivers/regulator/tps65219-regulator.c diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 24ce9a17ab4f..1a17b925264c 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -1291,6 +1291,15 @@ config REGULATOR_TPS65218 voltage regulators. It supports software based voltage control for different voltage domains =20 +config REGULATOR_TPS65219 + tristate "TI TPS65219 Power regulators" + depends on MFD_TPS65219 && OF + help + This driver supports TPS65219 voltage regulator chips. + TPS65219 series of PMICs have 3 single phase BUCKs & 4 LDOs + voltage regulators. It supports software based voltage control + for different voltage domains + config REGULATOR_TPS6524X tristate "TI TPS6524X Power regulators" depends on SPI diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 8c2f82206b94..790839810e8e 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -152,6 +152,7 @@ obj-$(CONFIG_REGULATOR_TPS65086) +=3D tps65086-regulato= r.o obj-$(CONFIG_REGULATOR_TPS65090) +=3D tps65090-regulator.o obj-$(CONFIG_REGULATOR_TPS65217) +=3D tps65217-regulator.o obj-$(CONFIG_REGULATOR_TPS65218) +=3D tps65218-regulator.o +obj-$(CONFIG_REGULATOR_TPS65219) +=3D tps65219-regulator.o obj-$(CONFIG_REGULATOR_TPS6524X) +=3D tps6524x-regulator.o obj-$(CONFIG_REGULATOR_TPS6586X) +=3D tps6586x-regulator.o obj-$(CONFIG_REGULATOR_TPS65910) +=3D tps65910-regulator.o diff --git a/drivers/regulator/tps65219-regulator.c b/drivers/regulator/tps= 65219-regulator.c new file mode 100644 index 000000000000..0e176e15daa6 --- /dev/null +++ b/drivers/regulator/tps65219-regulator.c @@ -0,0 +1,334 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * tps65219-regulator.c + * + * Regulator driver for TPS65219 PMIC + * + * Copyright (C) 2022 BayLibre Incorporated - https://www.baylibre.com/ + */ + +/* This implementation derived from tps65218 authored by "J Keerthy " */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TPS65219_REGULATOR(_name, _of, _id, _type, _ops, _n, _vr, _vm, _er= , \ + _em, _cr, _cm, _lr, _nlr, _delay, _fuv, \ + _ct, _ncl, _bpm) \ + { \ + .name =3D _name, \ + .of_match =3D _of, \ + .regulators_node =3D of_match_ptr("regulators"), \ + .supply_name =3D _of, \ + .id =3D _id, \ + .ops =3D &_ops, \ + .n_voltages =3D _n, \ + .type =3D _type, \ + .owner =3D THIS_MODULE, \ + .vsel_reg =3D _vr, \ + .vsel_mask =3D _vm, \ + .csel_reg =3D _cr, \ + .csel_mask =3D _cm, \ + .curr_table =3D _ct, \ + .n_current_limits =3D _ncl, \ + .enable_reg =3D _er, \ + .enable_mask =3D _em, \ + .volt_table =3D NULL, \ + .linear_ranges =3D _lr, \ + .n_linear_ranges =3D _nlr, \ + .ramp_delay =3D _delay, \ + .fixed_uV =3D _fuv, \ + .bypass_reg =3D _vr, \ + .bypass_mask =3D _bpm, \ + .bypass_val_on =3D 1, \ + } \ + +static const struct linear_range bucks_ranges[] =3D { + REGULATOR_LINEAR_RANGE(600000, 0x0, 0x1f, 25000), + REGULATOR_LINEAR_RANGE(1400000, 0x20, 0x33, 100000), + REGULATOR_LINEAR_RANGE(3400000, 0x34, 0x3f, 0), +}; + +static const struct linear_range ldos_1_2_ranges[] =3D { + REGULATOR_LINEAR_RANGE(600000, 0x0, 0x37, 50000), + REGULATOR_LINEAR_RANGE(3400000, 0x38, 0x3f, 0), +}; + +static const struct linear_range ldos_3_4_ranges[] =3D { + REGULATOR_LINEAR_RANGE(1200000, 0x0, 0xC, 0), + REGULATOR_LINEAR_RANGE(1250000, 0xD, 0x35, 50000), + REGULATOR_LINEAR_RANGE(3300000, 0x36, 0x3F, 0), +}; + +static int tps65219_pmic_set_voltage_sel(struct regulator_dev *dev, + unsigned int selector) +{ + int ret; + struct tps65219 *tps =3D rdev_get_drvdata(dev); + + /* Set the voltage based on vsel value */ + ret =3D tps65219_set_bits(tps, dev->desc->vsel_reg, dev->desc->vsel_mask, + selector); + dev_dbg(tps->dev, "%s failed for regulator %s: %d ", __func__, dev->desc-= >name, ret); + return ret; +} + +static int tps65219_pmic_enable(struct regulator_dev *dev) +{ + struct tps65219 *tps =3D rdev_get_drvdata(dev); + int rid =3D rdev_get_id(dev); + int ret; + + + + if (rid < TPS65219_BUCK_1 || rid > TPS65219_LDO_4) + return -EINVAL; + + ret =3D tps65219_set_bits(tps, dev->desc->enable_reg, + dev->desc->enable_mask, dev->desc->enable_mask); + return ret; +} + +static int tps65219_pmic_disable(struct regulator_dev *dev) +{ + struct tps65219 *tps =3D rdev_get_drvdata(dev); + int rid =3D rdev_get_id(dev); + + + if (rid < TPS65219_BUCK_1 || rid > TPS65219_LDO_4) + return -EINVAL; + + + return tps65219_clear_bits(tps, dev->desc->enable_reg, + dev->desc->enable_mask); +} + +static int tps65219_set_mode(struct regulator_dev *dev, unsigned int mode) +{ + struct tps65219 *tps =3D rdev_get_drvdata(dev); + unsigned int rid =3D rdev_get_id(dev); + + if (rid < TPS65219_BUCK_1 || rid > TPS65219_LDO_4) + return -EINVAL; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + return tps65219_set_bits(tps, TPS65219_REG_STBY_1_CONFIG, dev->desc->ena= ble_mask, + dev->desc->enable_mask); + + case REGULATOR_MODE_STANDBY: + return tps65219_clear_bits(tps, TPS65219_REG_STBY_1_CONFIG, dev->desc->e= nable_mask); + } + + return -EINVAL; +} +static unsigned int tps65219_get_mode(struct regulator_dev *dev) +{ + struct tps65219 *tps =3D rdev_get_drvdata(dev); + unsigned int rid =3D rdev_get_id(dev); + int ret, value =3D 0; + + if (rid < TPS65219_BUCK_1 || rid > TPS65219_LDO_4) + return -EINVAL; + + ret =3D tps65219_reg_read(tps, TPS65219_REG_STBY_1_CONFIG, &value); + value =3D (value & BIT(rid)) >> rid; + if (!(value & BUCKS_LDOS_STBY_ON_BIT)) + ret =3D REGULATOR_MODE_STANDBY; + else + ret =3D REGULATOR_MODE_NORMAL; + return ret; +} + +/* generic regulator_set_bypass_regmap does not match requirements use cus= tom instead */ +static int tps65219_set_bypass(struct regulator_dev *dev, bool enable) +{ + struct tps65219 *tps =3D rdev_get_drvdata(dev); + unsigned int rid =3D rdev_get_id(dev); + int ret =3D 0; + + if (rid < TPS65219_BUCK_1 || rid > TPS65219_LDO_4) + return -EINVAL; + + if (rid < TPS65219_LDO_1 || rid > TPS65219_LDO_2) { + dev_err(tps->dev, "%s bypass allowed for LDO1/2 only ", __func__); + return -EPERM; + } + + if (dev->desc->ops->is_enabled) { + dev_err(tps->dev, "%s LDO%d is enabled, should be shut down to set bypas= s ", + __func__, rid); + return -EBUSY; + } + + if (enable) { + dev_dbg(tps->dev, "%s, LDO%d already in bypass mode", __func__, rid); + return ret; + } + + ret =3D tps65219_set_bits(tps, dev->desc->vsel_reg, TPS65219_LDOS_BYP_CON= FIG_MASK, + TPS65219_LDOS_BYP_CONFIG_MASK); + dev_dbg(tps->dev, "%s LDO%d switched to bypass mode", __func__, rid); + return ret; +} + +/* Operations permitted on BUCK1/2/3 */ +static const struct regulator_ops tps65219_bucks_ops =3D { + .is_enabled =3D regulator_is_enabled_regmap, + .enable =3D tps65219_pmic_enable, + .disable =3D tps65219_pmic_disable, + .set_mode =3D tps65219_set_mode, + .get_mode =3D tps65219_get_mode, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, + .set_voltage_sel =3D tps65219_pmic_set_voltage_sel, + .list_voltage =3D regulator_list_voltage_linear_range, + .map_voltage =3D regulator_map_voltage_linear_range, + .set_voltage_time_sel =3D regulator_set_voltage_time_sel, + +}; + +/* Operations permitted on LDO1/2 */ +static const struct regulator_ops tps65219_ldos_1_2_ops =3D { + .is_enabled =3D regulator_is_enabled_regmap, + .enable =3D tps65219_pmic_enable, + .disable =3D tps65219_pmic_disable, + .set_mode =3D tps65219_set_mode, + .get_mode =3D tps65219_get_mode, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, + .set_voltage_sel =3D tps65219_pmic_set_voltage_sel, + .list_voltage =3D regulator_list_voltage_linear_range, + .map_voltage =3D regulator_map_voltage_linear_range, + .set_bypass =3D tps65219_set_bypass, + .get_bypass =3D regulator_get_bypass_regmap, +}; + +/* Operations permitted on LDO3/4 */ +static const struct regulator_ops tps65219_ldos_3_4_ops =3D { + .is_enabled =3D regulator_is_enabled_regmap, + .enable =3D tps65219_pmic_enable, + .disable =3D tps65219_pmic_disable, + .set_mode =3D tps65219_set_mode, + .get_mode =3D tps65219_get_mode, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, + .set_voltage_sel =3D tps65219_pmic_set_voltage_sel, + .list_voltage =3D regulator_list_voltage_linear_range, + .map_voltage =3D regulator_map_voltage_linear_range, +}; + +static const struct regulator_desc regulators[] =3D { + TPS65219_REGULATOR("BUCK1", "buck1", TPS65219_BUCK_1, + REGULATOR_VOLTAGE, tps65219_bucks_ops, 64, + TPS65219_REG_BUCK1_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_BUCK1_EN, 0, 0, bucks_ranges, + 3, 4000, 0, NULL, 0, 0), + TPS65219_REGULATOR("BUCK2", "buck2", TPS65219_BUCK_2, + REGULATOR_VOLTAGE, tps65219_bucks_ops, 64, + TPS65219_REG_BUCK2_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_BUCK2_EN, 0, 0, bucks_ranges, + 3, 4000, 0, NULL, 0, 0), + TPS65219_REGULATOR("BUCK3", "buck3", TPS65219_BUCK_3, + REGULATOR_VOLTAGE, tps65219_bucks_ops, 64, + TPS65219_REG_BUCK3_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_BUCK3_EN, 0, 0, bucks_ranges, 3, + 0, 0, NULL, 0, 0), + TPS65219_REGULATOR("LDO1", "ldo1", TPS65219_LDO_1, + REGULATOR_VOLTAGE, tps65219_ldos_1_2_ops, 64, + TPS65219_REG_LDO1_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_LDO1_EN, 0, 0, ldos_1_2_ranges, + 2, 0, 0, NULL, 0, TPS65219_LDOS_BYP_CONFIG_MASK), + TPS65219_REGULATOR("LDO2", "ldo2", TPS65219_LDO_2, + REGULATOR_VOLTAGE, tps65219_ldos_1_2_ops, 64, + TPS65219_REG_LDO2_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_LDO2_EN, 0, 0, ldos_1_2_ranges, + 2, 0, 0, NULL, 0, TPS65219_LDOS_BYP_CONFIG_MASK), + TPS65219_REGULATOR("LDO3", "ldo3", TPS65219_LDO_3, + REGULATOR_VOLTAGE, tps65219_ldos_3_4_ops, 64, + TPS65219_REG_LDO3_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_LDO3_EN, 0, 0, ldos_3_4_ranges, + 3, 0, 0, NULL, 0, 0), + TPS65219_REGULATOR("LDO4", "ldo4", TPS65219_LDO_4, + REGULATOR_VOLTAGE, tps65219_ldos_3_4_ops, 64, + TPS65219_REG_LDO4_VOUT, + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, TPS65219_REG_ENABLE_CTRL, + TPS65219_ENABLE_LDO4_EN, 0, 0, ldos_3_4_ranges, + 3, 0, 0, NULL, 0, 0), +}; + +static int tps65219_regulator_probe(struct platform_device *pdev) +{ + struct tps65219 *tps =3D dev_get_drvdata(pdev->dev.parent); + struct regulator_dev *rdev; + struct regulator_config config =3D { }; + int i, ret; + unsigned int val; + + + config.dev =3D tps->dev; + config.driver_data =3D tps; + config.regmap =3D tps->regmap; + + /* Allocate memory for strobes */ + tps->strobes =3D devm_kcalloc(&pdev->dev, + TPS65219_NUM_REGULATOR, sizeof(u8), + GFP_KERNEL); + if (!tps->strobes) + return -ENOMEM; + + for (i =3D 0; i < ARRAY_SIZE(regulators); i++) { + pr_debug("tps65219 regul i=3D %d START", i); + rdev =3D devm_regulator_register(&pdev->dev, ®ulators[i], + &config); + if (IS_ERR(rdev)) { + dev_err(tps->dev, "failed to register %s regulator\n", + pdev->name); + return PTR_ERR(rdev); + } + + ret =3D regmap_read(tps->regmap, regulators[i].bypass_reg, &val); + if (ret) { + dev_err(tps->dev, "dev_err failed to map register for %s regulator\n", + pdev->name); + return ret; + } + pr_debug("tps65219 regul i=3D %d COMPLETED", i); + } + + return 0; +} + +static const struct platform_device_id tps65219_regulator_id_table[] =3D { + { "tps65219-regulator", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, tps65219_regulator_id_table); + +static struct platform_driver tps65219_regulator_driver =3D { + .driver =3D { + .name =3D "tps65219-pmic", + }, + .probe =3D tps65219_regulator_probe, + .id_table =3D tps65219_regulator_id_table, +}; + +module_platform_driver(tps65219_regulator_driver); + +MODULE_AUTHOR("J Neanne "); +MODULE_DESCRIPTION("TPS65219 voltage regulator driver"); +MODULE_ALIAS("platform:tps65219-pmic"); +MODULE_LICENSE("GPL v2"); --=20 2.17.1 From nobody Mon Apr 27 14:54:11 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E2DDCCA47B for ; Mon, 13 Jun 2022 09:06:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239600AbiFMJG2 (ORCPT ); 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[85.68.201.192]) by smtp.gmail.com with ESMTPSA id d9-20020adffd89000000b002102d4ed579sm7806465wrr.39.2022.06.13.02.06.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jun 2022 02:06:15 -0700 (PDT) From: Jerome NEANNE To: lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, nm@ti.com, kristo@kernel.org, will@kernel.org, lee.jones@linaro.org, jneanne@baylibre.com Cc: khilman@baylibre.com, narmstrong@baylibre.com, msp@baylibre.com, j-keerthy@ti.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 4/5] arm64: Kconfig: Introduce CONFIG_MFD_TPS65219 and CONFIG_REGULATOR_TPS65219 Date: Mon, 13 Jun 2022 11:06:03 +0200 Message-Id: <20220613090604.9975-5-jneanne@baylibre.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220613090604.9975-1-jneanne@baylibre.com> References: <20220613090604.9975-1-jneanne@baylibre.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This adds a Kconfig option to support TPS65219 PMIC, MFD and Regulators Signed-off-by: Jerome NEANNE --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 08c6f769df9a..8d9b359a6663 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -609,6 +609,7 @@ CONFIG_MFD_SPMI_PMIC=3Dy CONFIG_MFD_RK808=3Dy CONFIG_MFD_SEC_CORE=3Dy CONFIG_MFD_SL28CPLD=3Dy +CONFIG_MFD_TPS65219=3Dm CONFIG_MFD_ROHM_BD718XX=3Dy CONFIG_MFD_WCD934X=3Dm CONFIG_REGULATOR_FIXED_VOLTAGE=3Dy @@ -634,6 +635,7 @@ CONFIG_REGULATOR_QCOM_SPMI=3Dy CONFIG_REGULATOR_RK808=3Dy CONFIG_REGULATOR_S2MPS11=3Dy CONFIG_REGULATOR_TPS65132=3Dm +CONFIG_REGULATOR_TPS65219=3Dm CONFIG_REGULATOR_VCTRL=3Dm CONFIG_RC_CORE=3Dm CONFIG_RC_DECODERS=3Dy --=20 2.17.1 From nobody Mon Apr 27 14:54:11 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F84FCCA47E for ; Mon, 13 Jun 2022 09:07:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239669AbiFMJHZ (ORCPT ); Mon, 13 Jun 2022 05:07:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239381AbiFMJGW (ORCPT ); Mon, 13 Jun 2022 05:06:22 -0400 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [IPv6:2a00:1450:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3AA0EE0CD for ; Mon, 13 Jun 2022 02:06:19 -0700 (PDT) Received: by mail-wr1-x434.google.com with SMTP id o16so6260063wra.4 for ; Mon, 13 Jun 2022 02:06:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SihLv0V1LTd+1VLLAUrqMlaYPFmpr6/xiFqZL0BcygU=; b=iScEqEjmUnNyhHcjquB5L019ucHdEpNjCGUjDHULHqcuJDLvriuVXXDrDet2JESDKn ox6lQf9U0yaPi251rOCfJzcalKeUvXL07aqculizNWhgh+jnHRqbU9PV0gTFspqfgbUB HzuZIescDvgqp5xm/KVsm8q8jL1cWgD6LexZDDtWstfffFo/ImlS9kOBazQvwZuYMnX3 96G3Cde0Y3LEV/4QRIaczYqYg6/NovwnjuBF0GD7f3o1WHwI2gd6dNuKnkJADMiCDt33 2KZKEVQFgWHcTsTbNn7vrZNEXzfneHg9OFQ11JqCvGCuagzza3RNRwphC8CYOmEQebKq suYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SihLv0V1LTd+1VLLAUrqMlaYPFmpr6/xiFqZL0BcygU=; b=x2swAiWeKHZOcFhWlfcUUjXJ4AcI1D0Ruu0r4MsHPDu/EkUwxz5UCqUxyIGazF21au iRc7oWDq/0Z+o3hAtxmXvu5h4TvI16q0xZh4QTZW211ZXtkvTsU7Dr41eei34NE/4gl0 /33nt1C1bo3D96OK+7QE6gKgPsgLUhQIssC3gHGCqof/O0XWkFeuhvfpEtuL7GXNDCnP zdNn1za7gystVcRQpL9LyK0NECfZmYwbN5snPYu000W39Ereh+XI/HbR32cA/4NB/swP bMyfeGhhy5YCEbkKfl+vRAYvk90P5+r3sWssrhSZBjBhyjvA4y/ksWvmHtM0C5WeeLmV mqMA== X-Gm-Message-State: AOAM530FI0Zfs0K2ypAQuoxMLe6S7LYW39ZzVDJnXlEoqrAkC2BuGUL6 PLOiTPyFy5fgHr/+KTYO7/WuYw== X-Google-Smtp-Source: ABdhPJziy7VLw+M3s0Hd8qsD/XAuH8UecYqVXrZWPSXBDYM3AA9epBpu07gzjTrtQQy7u9/YYbdJ6A== X-Received: by 2002:a05:6000:1a8b:b0:219:ad61:f4e3 with SMTP id f11-20020a0560001a8b00b00219ad61f4e3mr23409694wry.190.1655111177704; Mon, 13 Jun 2022 02:06:17 -0700 (PDT) Received: from localhost.localdomain (192.201.68.85.rev.sfr.net. [85.68.201.192]) by smtp.gmail.com with ESMTPSA id d9-20020adffd89000000b002102d4ed579sm7806465wrr.39.2022.06.13.02.06.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jun 2022 02:06:17 -0700 (PDT) From: Jerome NEANNE To: lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, nm@ti.com, kristo@kernel.org, will@kernel.org, lee.jones@linaro.org, jneanne@baylibre.com Cc: khilman@baylibre.com, narmstrong@baylibre.com, msp@baylibre.com, j-keerthy@ti.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 5/5] arm64: dts: ti: Add TI TPS65219 PMIC support for AM642 SK board. Date: Mon, 13 Jun 2022 11:06:04 +0200 Message-Id: <20220613090604.9975-6-jneanne@baylibre.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220613090604.9975-1-jneanne@baylibre.com> References: <20220613090604.9975-1-jneanne@baylibre.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add support fot the TI Power Management IC TPS65219 on the AM642 SKEVM board Signed-off-by: Jerome NEANNE --- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 102 +++++++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/t= i/k3-am642-sk.dts index 8424cd071955..7886bb109160 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -69,6 +69,20 @@ vin-supply =3D <&vcc_3v3_sys>; gpio =3D <&exp1 3 GPIO_ACTIVE_HIGH>; }; + + vsel_sd_nddr: gpio-regulator { + compatible =3D "regulator-gpio"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vsel_sd_nddr_pins_default>; + regulator-name =3D "tps65219-LDO1-SEL-SD"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + vin-supply =3D <&ldo1_reg>; + gpios =3D <&main_gpio0 45 GPIO_ACTIVE_HIGH>; + states =3D <1800000 0x0>, + <3300000 0x1>; + }; }; =20 &main_pmx0 { @@ -85,6 +99,13 @@ >; }; =20 + main_i2c0_pins_default: main-i2c0-pins-default { + pinctrl-single,pins =3D < + AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ + AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ + >; + }; + main_i2c1_pins_default: main-i2c1-pins-default { pinctrl-single,pins =3D < AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ @@ -148,6 +169,12 @@ AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */ >; }; + + vsel_sd_nddr_pins_default: vsel-sd-nddr-pins-default { + pinctrl-single,pins =3D < + AM64X_IOPAD(0x00b4, PIN_OUTPUT, 0) /* (45x4=3D0xb4) WKUP_GPIO0_45 */ + >; + }; }; =20 &mcu_uart0 { @@ -191,6 +218,81 @@ status =3D "disabled"; }; =20 +&main_i2c0 { + pinctrl-nammain-i2c0-pins-defaultes =3D "default"; + pinctrl-0 =3D <&main_i2c0_pins_default>; + clock-frequency =3D <400000>; + status =3D "okay"; + + tps65219: pmic@30 { + compatible =3D "ti,tps65219"; + reg =3D <0x30>; + buck1-supply =3D <&vcc_3v3_sys>; + buck2-supply =3D <&vcc_3v3_sys>; + buck3-supply =3D <&vcc_3v3_sys>; + ldo1-supply =3D <&vcc_3v3_sys>; + ldo2-supply =3D <&buck2_reg>; + ldo3-supply =3D <&vcc_3v3_sys>; + ldo4-supply =3D <&vcc_3v3_sys>; + + regulators { + buck1_reg: buck1 { + regulator-name =3D "VDD_CORE"; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <1000000>; + regulator-boot-on; + regulator-always-on; + }; + + buck2_reg: buck2 { + regulator-name =3D "VCC1V8"; + regulator-min-microvolt =3D <1700000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + buck3_reg: buck3 { + regulator-name =3D "VDD_LPDDR4"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1_reg: ldo1 { + regulator-name =3D "VDDSHV_SD_IO_PMIC"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <3300000>; + regulator-allow-bypass; + }; + + ldo2_reg: ldo2 { + regulator-name =3D "VDDAR_CORE"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo3_reg: ldo3 { + regulator-name =3D "VDDA_1V8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo4_reg: ldo4 { + regulator-name =3D "VDD_PHY_2V5"; + regulator-min-microvolt =3D <2500000>; + regulator-max-microvolt =3D <2500000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +}; &main_i2c1 { pinctrl-names =3D "default"; pinctrl-0 =3D <&main_i2c1_pins_default>; --=20 2.17.1