From nobody Mon Apr 27 16:11:44 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61ADFC43334 for ; Fri, 10 Jun 2022 14:35:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345879AbiFJOfi (ORCPT ); Fri, 10 Jun 2022 10:35:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234903AbiFJOfb (ORCPT ); Fri, 10 Jun 2022 10:35:31 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A275ADF9A for ; Fri, 10 Jun 2022 07:35:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654871730; x=1686407730; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YJmOMZm2CAZNr36cdPGE67zJRph2jZlNrnhMlnzgytk=; b=C08FpuM2a8gzioaFhz5vTP+t7NqxIsI1KC39J+rzoe0erzifx9SryX7d v4iX2c3jV0Fxlv9UGbHU3wdbZvK4UudTC16ArkbDnms/oXZc00wbiIn78 rE2YVOVVzl7MKsyxW1BK5orsnKc3BC9DjV1Utrc4XfwqMlNHmaIs1BXx7 Zbi3X6IYvf+Rg1Fn7Ne6gDXCGfmNK3bAXCkiwYuegEWQdJrWEeruo4Jzm tL+Be1xwu5BjkFi1Rvl/zLXUE6L7GJVVfOtKzqFVm9HUyjJHQOEaO0vBM usg3q/JUCxYG2xc5+ERplAvYDBphFzOZDvsHEpTTuvR+m7HUmNGPEFWCp A==; X-IronPort-AV: E=McAfee;i="6400,9594,10374"; a="341706097" X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="341706097" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 07:35:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="710959727" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga004.jf.intel.com with ESMTP; 10 Jun 2022 07:35:26 -0700 Received: by black.fi.intel.com (Postfix, from userid 1000) id 23E9549; Fri, 10 Jun 2022 17:35:30 +0300 (EEST) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv3 1/8] x86/mm: Fix CR3_ADDR_MASK Date: Fri, 10 Jun 2022 17:35:20 +0300 Message-Id: <20220610143527.22974-2-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> References: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The mask must not include bits above physical address mask. These bits are reserved and can be used for other things. Bits 61 and 62 are used for Linear Address Masking. Signed-off-by: Kirill A. Shutemov Reviewed-by: Rick Edgecombe --- arch/x86/include/asm/processor-flags.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/processor-flags.h b/arch/x86/include/asm/= processor-flags.h index 02c2cbda4a74..a7f3d9100adb 100644 --- a/arch/x86/include/asm/processor-flags.h +++ b/arch/x86/include/asm/processor-flags.h @@ -35,7 +35,7 @@ */ #ifdef CONFIG_X86_64 /* Mask off the address space ID and SME encryption bits. */ -#define CR3_ADDR_MASK __sme_clr(0x7FFFFFFFFFFFF000ull) +#define CR3_ADDR_MASK __sme_clr(PHYSICAL_PAGE_MASK) #define CR3_PCID_MASK 0xFFFull #define CR3_NOFLUSH BIT_ULL(63) =20 --=20 2.35.1 From nobody Mon Apr 27 16:11:44 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF567CCA47C for ; Fri, 10 Jun 2022 14:35:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344807AbiFJOfe (ORCPT ); Fri, 10 Jun 2022 10:35:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230241AbiFJOfb (ORCPT ); Fri, 10 Jun 2022 10:35:31 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A9AE9193F0 for ; Fri, 10 Jun 2022 07:35:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654871730; x=1686407730; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Q31itKy4PC7SvEU3qrX2Ci7VMhO97r4+bi4c5XZJr5s=; b=BzBUF+5uj4DTurytGJrBrqGsiwKRfJXHSj+HfXnSgoFNNQpfUpfOG3RE MdF78x8ChfOMS0BO+0nuo36aweQ10Xn85B5FJNvv5JzKdNIJW6kkRjurA lJwCHf4ei5eUpVVLll5ocEeaJxuhhhY2yx6+2HMUeZ8y+dunEUtiLKc2y tr4hjn3ZRiJJqEUgDpcetzSzJuxmIViAOS+joMGREPOCcXu2+BtFWr1VC lCeyw5MhVyAMNg1Krl6Nhj2CSoGuWTAYZYrrEukEDoiCaiVw3yRdmlE/9 enzTUBybk2ICdPkBHRCo1DICSmPwvO8cHJnUh3447w4Pfhk1H7MQRmdui A==; X-IronPort-AV: E=McAfee;i="6400,9594,10374"; a="277679664" X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="277679664" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 07:35:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="581096259" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 10 Jun 2022 07:35:26 -0700 Received: by black.fi.intel.com (Postfix, from userid 1000) id 2D6F5346; Fri, 10 Jun 2022 17:35:30 +0300 (EEST) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv3 2/8] x86: CPUID and CR3/CR4 flags for Linear Address Masking Date: Fri, 10 Jun 2022 17:35:21 +0300 Message-Id: <20220610143527.22974-3-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> References: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Enumerate Linear Address Masking and provide defines for CR3 and CR4 flags. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/uapi/asm/processor-flags.h | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpuf= eatures.h index 393f2bbb5e3a..9835ab09b590 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -300,6 +300,7 @@ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ #define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instruction= s */ +#define X86_FEATURE_LAM (12*32+26) /* Linear Address Masking */ =20 /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ diff --git a/arch/x86/include/uapi/asm/processor-flags.h b/arch/x86/include= /uapi/asm/processor-flags.h index c47cc7f2feeb..d898432947ff 100644 --- a/arch/x86/include/uapi/asm/processor-flags.h +++ b/arch/x86/include/uapi/asm/processor-flags.h @@ -82,6 +82,10 @@ #define X86_CR3_PCID_BITS 12 #define X86_CR3_PCID_MASK (_AC((1UL << X86_CR3_PCID_BITS) - 1, UL)) =20 +#define X86_CR3_LAM_U57_BIT 61 /* Activate LAM for userspace, 62:57 bits m= asked */ +#define X86_CR3_LAM_U57 _BITULL(X86_CR3_LAM_U57_BIT) +#define X86_CR3_LAM_U48_BIT 62 /* Activate LAM for userspace, 62:48 bits m= asked */ +#define X86_CR3_LAM_U48 _BITULL(X86_CR3_LAM_U48_BIT) #define X86_CR3_PCID_NOFLUSH_BIT 63 /* Preserve old PCID */ #define X86_CR3_PCID_NOFLUSH _BITULL(X86_CR3_PCID_NOFLUSH_BIT) =20 @@ -132,6 +136,8 @@ #define X86_CR4_PKE _BITUL(X86_CR4_PKE_BIT) #define X86_CR4_CET_BIT 23 /* enable Control-flow Enforcement Technology = */ #define X86_CR4_CET _BITUL(X86_CR4_CET_BIT) +#define X86_CR4_LAM_SUP_BIT 28 /* LAM for supervisor pointers */ +#define X86_CR4_LAM_SUP _BITUL(X86_CR4_LAM_SUP_BIT) =20 /* * x86-64 Task Priority Register, CR8 --=20 2.35.1 From nobody Mon Apr 27 16:11:44 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32808C433EF for ; Fri, 10 Jun 2022 14:36:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349537AbiFJOgI (ORCPT ); Fri, 10 Jun 2022 10:36:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349529AbiFJOf5 (ORCPT ); Fri, 10 Jun 2022 10:35:57 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD77839681 for ; Fri, 10 Jun 2022 07:35:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654871755; x=1686407755; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=iLr+lZXADLoZaLolB8cqRCtExaSFLmQNFJ6evFaWPaw=; b=j494r763y1WEstFEuytwu20t06YNKeNjDgevZjf6NNq8gqlmlAmljgeH t3G6jX65jz8rSSS6YFneCGcFdG51B8kmYKx923bdpwrjamBqBbZdHbFZm Ln5+giJb4yC/gpWswKHfzRPBIC84vhrQwW0FUxH/yD1uFhYESEH2bYR+f 6IxADKv8QpdE83YvMNzRit4GHGQGZPqkkij2muGCPCnue5jea8rpiY5AB eC4J/1Wc0cvGA33X9xWOehQLkBONMwFGUZq4WoYhVH6AZI4PgUYB0j9uQ zR7Fl/wltkQFBjfJ6xfcMJqqis5ZaubHkzl7rEUk3nC0WZcHweQFiSV/n g==; X-IronPort-AV: E=McAfee;i="6400,9594,10374"; a="258082402" X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="258082402" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 07:35:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="556404842" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga006.jf.intel.com with ESMTP; 10 Jun 2022 07:35:26 -0700 Received: by black.fi.intel.com (Postfix, from userid 1000) id 35A184EB; Fri, 10 Jun 2022 17:35:30 +0300 (EEST) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv3 3/8] mm: Pass down mm_struct to untagged_addr() Date: Fri, 10 Jun 2022 17:35:22 +0300 Message-Id: <20220610143527.22974-4-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> References: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Intel Linear Address Masking (LAM) brings per-mm untagging rules. Pass down mm_struct to the untagging helper. It will help to apply untagging policy correctly. In most cases, current->mm is the one to use, but there are some exceptions, such as get_user_page_remote(). Move dummy implementation of untagged_addr() from to . can override the implementation. Moving the dummy header outside helps to avoid header hell if you need to defer mm_struct within the helper. Signed-off-by: Kirill A. Shutemov Reviewed-by: Rick Edgecombe --- arch/arm64/include/asm/memory.h | 4 ++-- arch/arm64/include/asm/signal.h | 2 +- arch/arm64/include/asm/uaccess.h | 4 ++-- arch/arm64/kernel/hw_breakpoint.c | 2 +- arch/arm64/kernel/traps.c | 4 ++-- arch/arm64/mm/fault.c | 10 +++++----- arch/sparc/include/asm/pgtable_64.h | 2 +- arch/sparc/include/asm/uaccess_64.h | 2 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 2 +- drivers/gpu/drm/radeon/radeon_gem.c | 2 +- drivers/infiniband/hw/mlx4/mr.c | 2 +- drivers/media/common/videobuf2/frame_vector.c | 2 +- drivers/media/v4l2-core/videobuf-dma-contig.c | 2 +- drivers/staging/media/atomisp/pci/hmm/hmm_bo.c | 2 +- drivers/tee/tee_shm.c | 2 +- drivers/vfio/vfio_iommu_type1.c | 2 +- fs/proc/task_mmu.c | 2 +- include/linux/mm.h | 11 ----------- include/linux/uaccess.h | 11 +++++++++++ lib/strncpy_from_user.c | 2 +- lib/strnlen_user.c | 2 +- mm/gup.c | 6 +++--- mm/madvise.c | 2 +- mm/mempolicy.c | 6 +++--- mm/migrate.c | 2 +- mm/mincore.c | 2 +- mm/mlock.c | 4 ++-- mm/mmap.c | 2 +- mm/mprotect.c | 2 +- mm/mremap.c | 2 +- mm/msync.c | 2 +- virt/kvm/kvm_main.c | 2 +- 33 files changed, 55 insertions(+), 53 deletions(-) diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memor= y.h index 0af70d9abede..88bee513b74c 100644 --- a/arch/arm64/include/asm/memory.h +++ b/arch/arm64/include/asm/memory.h @@ -215,8 +215,8 @@ static inline unsigned long kaslr_offset(void) #define __untagged_addr(addr) \ ((__force __typeof__(addr))sign_extend64((__force u64)(addr), 55)) =20 -#define untagged_addr(addr) ({ \ - u64 __addr =3D (__force u64)(addr); \ +#define untagged_addr(mm, addr) ({ \ + u64 __addr =3D (__force u64)(addr); \ __addr &=3D __untagged_addr(__addr); \ (__force __typeof__(addr))__addr; \ }) diff --git a/arch/arm64/include/asm/signal.h b/arch/arm64/include/asm/signa= l.h index ef449f5f4ba8..0899c355c398 100644 --- a/arch/arm64/include/asm/signal.h +++ b/arch/arm64/include/asm/signal.h @@ -18,7 +18,7 @@ static inline void __user *arch_untagged_si_addr(void __u= ser *addr, if (sig =3D=3D SIGTRAP && si_code =3D=3D TRAP_BRKPT) return addr; =20 - return untagged_addr(addr); + return untagged_addr(current->mm, addr); } #define arch_untagged_si_addr arch_untagged_si_addr =20 diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uacc= ess.h index 63f9c828f1a7..bdcc014bd297 100644 --- a/arch/arm64/include/asm/uaccess.h +++ b/arch/arm64/include/asm/uaccess.h @@ -44,7 +44,7 @@ static inline int access_ok(const void __user *addr, unsi= gned long size) */ if (IS_ENABLED(CONFIG_ARM64_TAGGED_ADDR_ABI) && (current->flags & PF_KTHREAD || test_thread_flag(TIF_TAGGED_ADDR))) - addr =3D untagged_addr(addr); + addr =3D untagged_addr(current->mm, addr); =20 return likely(__access_ok(addr, size)); } @@ -217,7 +217,7 @@ static inline void __user *__uaccess_mask_ptr(const voi= d __user *ptr) " csel %0, %1, xzr, eq\n" : "=3D&r" (safe_ptr) : "r" (ptr), "r" (TASK_SIZE_MAX - 1), - "r" (untagged_addr(ptr)) + "r" (untagged_addr(current->mm, ptr)) : "cc"); =20 csdb(); diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_break= point.c index b29a311bb055..d637cee7b771 100644 --- a/arch/arm64/kernel/hw_breakpoint.c +++ b/arch/arm64/kernel/hw_breakpoint.c @@ -715,7 +715,7 @@ static u64 get_distance_from_watchpoint(unsigned long a= ddr, u64 val, u64 wp_low, wp_high; u32 lens, lene; =20 - addr =3D untagged_addr(addr); + addr =3D untagged_addr(current->mm, addr); =20 lens =3D __ffs(ctrl->len); lene =3D __fls(ctrl->len); diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 9ac7a81b79be..385612d9890b 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -476,7 +476,7 @@ void arm64_notify_segfault(unsigned long addr) int code; =20 mmap_read_lock(current->mm); - if (find_vma(current->mm, untagged_addr(addr)) =3D=3D NULL) + if (find_vma(current->mm, untagged_addr(current->mm, addr)) =3D=3D NULL) code =3D SEGV_MAPERR; else code =3D SEGV_ACCERR; @@ -540,7 +540,7 @@ static void user_cache_maint_handler(unsigned long esr,= struct pt_regs *regs) int ret =3D 0; =20 tagged_address =3D pt_regs_read_reg(regs, rt); - address =3D untagged_addr(tagged_address); + address =3D untagged_addr(current->mm, tagged_address); =20 switch (crm) { case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */ diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index c5e11768e5c1..9577d7e37f36 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -454,7 +454,7 @@ static void set_thread_esr(unsigned long address, unsig= ned long esr) static void do_bad_area(unsigned long far, unsigned long esr, struct pt_regs *regs) { - unsigned long addr =3D untagged_addr(far); + unsigned long addr =3D untagged_addr(current->mm, far); =20 /* * If we are in kernel mode at this point, we have no context to @@ -524,7 +524,7 @@ static int __kprobes do_page_fault(unsigned long far, u= nsigned long esr, vm_fault_t fault; unsigned long vm_flags; unsigned int mm_flags =3D FAULT_FLAG_DEFAULT; - unsigned long addr =3D untagged_addr(far); + unsigned long addr =3D untagged_addr(mm, far); =20 if (kprobe_page_fault(regs, esr)) return 0; @@ -675,7 +675,7 @@ static int __kprobes do_translation_fault(unsigned long= far, unsigned long esr, struct pt_regs *regs) { - unsigned long addr =3D untagged_addr(far); + unsigned long addr =3D untagged_addr(current->mm, far); =20 if (is_ttbr0_addr(addr)) return do_page_fault(far, esr, regs); @@ -719,7 +719,7 @@ static int do_sea(unsigned long far, unsigned long esr,= struct pt_regs *regs) * UNKNOWN for synchronous external aborts. Mask them out now * so that userspace doesn't see them. */ - siaddr =3D untagged_addr(far); + siaddr =3D untagged_addr(current->mm, far); } arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr); =20 @@ -809,7 +809,7 @@ static const struct fault_info fault_info[] =3D { void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *re= gs) { const struct fault_info *inf =3D esr_to_fault_info(esr); - unsigned long addr =3D untagged_addr(far); + unsigned long addr =3D untagged_addr(current->mm, far); =20 if (!inf->fn(far, esr, regs)) return; diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/p= gtable_64.h index 4679e45c8348..1336d7bfaab9 100644 --- a/arch/sparc/include/asm/pgtable_64.h +++ b/arch/sparc/include/asm/pgtable_64.h @@ -1071,7 +1071,7 @@ static inline unsigned long __untagged_addr(unsigned = long start) =20 return start; } -#define untagged_addr(addr) \ +#define untagged_addr(mm, addr) \ ((__typeof__(addr))(__untagged_addr((unsigned long)(addr)))) =20 static inline bool pte_access_permitted(pte_t pte, bool write) diff --git a/arch/sparc/include/asm/uaccess_64.h b/arch/sparc/include/asm/u= access_64.h index 94266a5c5b04..b825a5dd0210 100644 --- a/arch/sparc/include/asm/uaccess_64.h +++ b/arch/sparc/include/asm/uaccess_64.h @@ -8,8 +8,10 @@ =20 #include #include +#include #include #include +#include =20 #include #include diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu= /drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c index 67abf8dcd30a..6136d7000844 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c @@ -1491,7 +1491,7 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( if (flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { if (!offset || !*offset) return -EINVAL; - user_addr =3D untagged_addr(*offset); + user_addr =3D untagged_addr(current->mm, *offset); } else if (flags & (KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL | KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP)) { bo_type =3D ttm_bo_type_sg; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_gem.c index 8ef31d687ef3..691dfb3f2c0e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c @@ -382,7 +382,7 @@ int amdgpu_gem_userptr_ioctl(struct drm_device *dev, vo= id *data, uint32_t handle; int r; =20 - args->addr =3D untagged_addr(args->addr); + args->addr =3D untagged_addr(current->mm, args->addr); =20 if (offset_in_page(args->addr | args->size)) return -EINVAL; diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/r= adeon_gem.c index 8c01a7f0e027..2c3980677f64 100644 --- a/drivers/gpu/drm/radeon/radeon_gem.c +++ b/drivers/gpu/drm/radeon/radeon_gem.c @@ -371,7 +371,7 @@ int radeon_gem_userptr_ioctl(struct drm_device *dev, vo= id *data, uint32_t handle; int r; =20 - args->addr =3D untagged_addr(args->addr); + args->addr =3D untagged_addr(current->mm, args->addr); =20 if (offset_in_page(args->addr | args->size)) return -EINVAL; diff --git a/drivers/infiniband/hw/mlx4/mr.c b/drivers/infiniband/hw/mlx4/m= r.c index 04a67b481608..b2860feeae3c 100644 --- a/drivers/infiniband/hw/mlx4/mr.c +++ b/drivers/infiniband/hw/mlx4/mr.c @@ -379,7 +379,7 @@ static struct ib_umem *mlx4_get_umem_mr(struct ib_devic= e *device, u64 start, * again */ if (!ib_access_writable(access_flags)) { - unsigned long untagged_start =3D untagged_addr(start); + unsigned long untagged_start =3D untagged_addr(current->mm, start); struct vm_area_struct *vma; =20 mmap_read_lock(current->mm); diff --git a/drivers/media/common/videobuf2/frame_vector.c b/drivers/media/= common/videobuf2/frame_vector.c index 542dde9d2609..7e62f7a2555d 100644 --- a/drivers/media/common/videobuf2/frame_vector.c +++ b/drivers/media/common/videobuf2/frame_vector.c @@ -47,7 +47,7 @@ int get_vaddr_frames(unsigned long start, unsigned int nr= _frames, if (WARN_ON_ONCE(nr_frames > vec->nr_allocated)) nr_frames =3D vec->nr_allocated; =20 - start =3D untagged_addr(start); + start =3D untagged_addr(mm, start); =20 ret =3D pin_user_pages_fast(start, nr_frames, FOLL_FORCE | FOLL_WRITE | FOLL_LONGTERM, diff --git a/drivers/media/v4l2-core/videobuf-dma-contig.c b/drivers/media/= v4l2-core/videobuf-dma-contig.c index 52312ce2ba05..a1444f8afa05 100644 --- a/drivers/media/v4l2-core/videobuf-dma-contig.c +++ b/drivers/media/v4l2-core/videobuf-dma-contig.c @@ -157,8 +157,8 @@ static void videobuf_dma_contig_user_put(struct videobu= f_dma_contig_memory *mem) static int videobuf_dma_contig_user_get(struct videobuf_dma_contig_memory = *mem, struct videobuf_buffer *vb) { - unsigned long untagged_baddr =3D untagged_addr(vb->baddr); struct mm_struct *mm =3D current->mm; + unsigned long untagged_baddr =3D untagged_addr(mm, vb->baddr); struct vm_area_struct *vma; unsigned long prev_pfn, this_pfn; unsigned long pages_done, user_address; diff --git a/drivers/staging/media/atomisp/pci/hmm/hmm_bo.c b/drivers/stagi= ng/media/atomisp/pci/hmm/hmm_bo.c index 0168f9839c90..863d30a7ad23 100644 --- a/drivers/staging/media/atomisp/pci/hmm/hmm_bo.c +++ b/drivers/staging/media/atomisp/pci/hmm/hmm_bo.c @@ -913,7 +913,7 @@ static int alloc_user_pages(struct hmm_buffer_object *b= o, * and map to user space */ =20 - userptr =3D untagged_addr(userptr); + userptr =3D untagged_addr(current->mm, userptr); =20 bo->pages =3D pages; =20 diff --git a/drivers/tee/tee_shm.c b/drivers/tee/tee_shm.c index f2b1bcefcadd..386be09cb2cd 100644 --- a/drivers/tee/tee_shm.c +++ b/drivers/tee/tee_shm.c @@ -261,7 +261,7 @@ register_shm_helper(struct tee_context *ctx, unsigned l= ong addr, shm->flags =3D flags; shm->ctx =3D ctx; shm->id =3D id; - addr =3D untagged_addr(addr); + addr =3D untagged_addr(current->mm, addr); start =3D rounddown(addr, PAGE_SIZE); shm->offset =3D addr - start; shm->size =3D length; diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type= 1.c index c13b9290e357..5ac6c61d7caa 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -561,7 +561,7 @@ static int vaddr_get_pfns(struct mm_struct *mm, unsigne= d long vaddr, goto done; } =20 - vaddr =3D untagged_addr(vaddr); + vaddr =3D untagged_addr(mm, vaddr); =20 retry: vma =3D vma_lookup(mm, vaddr); diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c index 2d04e3470d4c..c7d262bd6d6b 100644 --- a/fs/proc/task_mmu.c +++ b/fs/proc/task_mmu.c @@ -1659,7 +1659,7 @@ static ssize_t pagemap_read(struct file *file, char _= _user *buf, /* watch out for wraparound */ start_vaddr =3D end_vaddr; if (svpfn <=3D (ULONG_MAX >> PAGE_SHIFT)) - start_vaddr =3D untagged_addr(svpfn << PAGE_SHIFT); + start_vaddr =3D untagged_addr(mm, svpfn << PAGE_SHIFT); =20 /* Ensure the address is inside the task */ if (start_vaddr > mm->task_size) diff --git a/include/linux/mm.h b/include/linux/mm.h index bc8f326be0ce..f0cb92ff1391 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -94,17 +94,6 @@ extern int mmap_rnd_compat_bits __read_mostly; #include #include =20 -/* - * Architectures that support memory tagging (assigning tags to memory reg= ions, - * embedding these tags into addresses that point to these memory regions,= and - * checking that the memory and the pointer tags match on memory accesses) - * redefine this macro to strip tags from pointers. - * It's defined as noop for architectures that don't support memory taggin= g. - */ -#ifndef untagged_addr -#define untagged_addr(addr) (addr) -#endif - #ifndef __pa_symbol #define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0)) #endif diff --git a/include/linux/uaccess.h b/include/linux/uaccess.h index 5a328cf02b75..05a157bbaaef 100644 --- a/include/linux/uaccess.h +++ b/include/linux/uaccess.h @@ -10,6 +10,17 @@ =20 #include =20 +/* + * Architectures that support memory tagging (assigning tags to memory reg= ions, + * embedding these tags into addresses that point to these memory regions,= and + * checking that the memory and the pointer tags match on memory accesses) + * redefine this macro to strip tags from pointers. + * It's defined as noop for architectures that don't support memory taggin= g. + */ +#ifndef untagged_addr +#define untagged_addr(mm, addr) (addr) +#endif + /* * Architectures should provide two primitives (raw_copy_{to,from}_user()) * and get rid of their private instances of copy_{to,from}_user() and diff --git a/lib/strncpy_from_user.c b/lib/strncpy_from_user.c index 6432b8c3e431..6e1e2aa0c994 100644 --- a/lib/strncpy_from_user.c +++ b/lib/strncpy_from_user.c @@ -121,7 +121,7 @@ long strncpy_from_user(char *dst, const char __user *sr= c, long count) return 0; =20 max_addr =3D TASK_SIZE_MAX; - src_addr =3D (unsigned long)untagged_addr(src); + src_addr =3D (unsigned long)untagged_addr(current->mm, src); if (likely(src_addr < max_addr)) { unsigned long max =3D max_addr - src_addr; long retval; diff --git a/lib/strnlen_user.c b/lib/strnlen_user.c index feeb935a2299..abc096a68f05 100644 --- a/lib/strnlen_user.c +++ b/lib/strnlen_user.c @@ -97,7 +97,7 @@ long strnlen_user(const char __user *str, long count) return 0; =20 max_addr =3D TASK_SIZE_MAX; - src_addr =3D (unsigned long)untagged_addr(str); + src_addr =3D (unsigned long)untagged_addr(current->mm, str); if (likely(src_addr < max_addr)) { unsigned long max =3D max_addr - src_addr; long retval; diff --git a/mm/gup.c b/mm/gup.c index 551264407624..dbe825faf842 100644 --- a/mm/gup.c +++ b/mm/gup.c @@ -1104,7 +1104,7 @@ static long __get_user_pages(struct mm_struct *mm, if (!nr_pages) return 0; =20 - start =3D untagged_addr(start); + start =3D untagged_addr(mm, start); =20 VM_BUG_ON(!!pages !=3D !!(gup_flags & (FOLL_GET | FOLL_PIN))); =20 @@ -1285,7 +1285,7 @@ int fixup_user_fault(struct mm_struct *mm, struct vm_area_struct *vma; vm_fault_t ret; =20 - address =3D untagged_addr(address); + address =3D untagged_addr(mm, address); =20 if (unlocked) fault_flags |=3D FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE; @@ -2865,7 +2865,7 @@ static int internal_get_user_pages_fast(unsigned long= start, if (!(gup_flags & FOLL_FAST_ONLY)) might_lock_read(¤t->mm->mmap_lock); =20 - start =3D untagged_addr(start) & PAGE_MASK; + start =3D untagged_addr(current->mm, start) & PAGE_MASK; len =3D nr_pages << PAGE_SHIFT; if (check_add_overflow(start, len, &end)) return 0; diff --git a/mm/madvise.c b/mm/madvise.c index d7b4f2602949..e3c668ddb099 100644 --- a/mm/madvise.c +++ b/mm/madvise.c @@ -1373,7 +1373,7 @@ int do_madvise(struct mm_struct *mm, unsigned long st= art, size_t len_in, int beh size_t len; struct blk_plug plug; =20 - start =3D untagged_addr(start); + start =3D untagged_addr(mm, start); =20 if (!madvise_behavior_valid(behavior)) return -EINVAL; diff --git a/mm/mempolicy.c b/mm/mempolicy.c index d39b01fd52fe..a03b4d2bc26a 100644 --- a/mm/mempolicy.c +++ b/mm/mempolicy.c @@ -1458,7 +1458,7 @@ static long kernel_mbind(unsigned long start, unsigne= d long len, int lmode =3D mode; int err; =20 - start =3D untagged_addr(start); + start =3D untagged_addr(current->mm, start); err =3D sanitize_mpol_flags(&lmode, &mode_flags); if (err) return err; @@ -1481,7 +1481,7 @@ SYSCALL_DEFINE4(set_mempolicy_home_node, unsigned lon= g, start, unsigned long, le unsigned long end; int err =3D -ENOENT; =20 - start =3D untagged_addr(start); + start =3D untagged_addr(mm, start); if (start & ~PAGE_MASK) return -EINVAL; /* @@ -1684,7 +1684,7 @@ static int kernel_get_mempolicy(int __user *policy, if (nmask !=3D NULL && maxnode < nr_node_ids) return -EINVAL; =20 - addr =3D untagged_addr(addr); + addr =3D untagged_addr(current->mm, addr); =20 err =3D do_get_mempolicy(&pval, &nodes, addr, flags); =20 diff --git a/mm/migrate.c b/mm/migrate.c index e51588e95f57..af05049b055b 100644 --- a/mm/migrate.c +++ b/mm/migrate.c @@ -1714,7 +1714,7 @@ static int do_pages_move(struct mm_struct *mm, nodema= sk_t task_nodes, goto out_flush; if (get_user(node, nodes + i)) goto out_flush; - addr =3D (unsigned long)untagged_addr(p); + addr =3D (unsigned long)untagged_addr(mm, p); =20 err =3D -ENODEV; if (node < 0 || node >=3D MAX_NUMNODES) diff --git a/mm/mincore.c b/mm/mincore.c index fa200c14185f..72c55bd9d184 100644 --- a/mm/mincore.c +++ b/mm/mincore.c @@ -236,7 +236,7 @@ SYSCALL_DEFINE3(mincore, unsigned long, start, size_t, = len, unsigned long pages; unsigned char *tmp; =20 - start =3D untagged_addr(start); + start =3D untagged_addr(current->mm, start); =20 /* Check the start address: needs to be page-aligned.. */ if (start & ~PAGE_MASK) diff --git a/mm/mlock.c b/mm/mlock.c index 716caf851043..054168d3e648 100644 --- a/mm/mlock.c +++ b/mm/mlock.c @@ -571,7 +571,7 @@ static __must_check int do_mlock(unsigned long start, s= ize_t len, vm_flags_t fla unsigned long lock_limit; int error =3D -ENOMEM; =20 - start =3D untagged_addr(start); + start =3D untagged_addr(current->mm, start); =20 if (!can_do_mlock()) return -EPERM; @@ -634,7 +634,7 @@ SYSCALL_DEFINE2(munlock, unsigned long, start, size_t, = len) { int ret; =20 - start =3D untagged_addr(start); + start =3D untagged_addr(current->mm, start); =20 len =3D PAGE_ALIGN(len + (offset_in_page(start))); start &=3D PAGE_MASK; diff --git a/mm/mmap.c b/mm/mmap.c index 61e6135c54ef..1a7baf6b6b8e 100644 --- a/mm/mmap.c +++ b/mm/mmap.c @@ -2926,7 +2926,7 @@ EXPORT_SYMBOL(vm_munmap); =20 SYSCALL_DEFINE2(munmap, unsigned long, addr, size_t, len) { - addr =3D untagged_addr(addr); + addr =3D untagged_addr(current->mm, addr); return __vm_munmap(addr, len, true); } =20 diff --git a/mm/mprotect.c b/mm/mprotect.c index ba5592655ee3..871e954f6155 100644 --- a/mm/mprotect.c +++ b/mm/mprotect.c @@ -622,7 +622,7 @@ static int do_mprotect_pkey(unsigned long start, size_t= len, (prot & PROT_READ); struct mmu_gather tlb; =20 - start =3D untagged_addr(start); + start =3D untagged_addr(current->mm, start); =20 prot &=3D ~(PROT_GROWSDOWN|PROT_GROWSUP); if (grows =3D=3D (PROT_GROWSDOWN|PROT_GROWSUP)) /* can't be both */ diff --git a/mm/mremap.c b/mm/mremap.c index b522cd0259a0..f76648bc4f67 100644 --- a/mm/mremap.c +++ b/mm/mremap.c @@ -906,7 +906,7 @@ SYSCALL_DEFINE5(mremap, unsigned long, addr, unsigned l= ong, old_len, * * See Documentation/arm64/tagged-address-abi.rst for more information. */ - addr =3D untagged_addr(addr); + addr =3D untagged_addr(mm, addr); =20 if (flags & ~(MREMAP_FIXED | MREMAP_MAYMOVE | MREMAP_DONTUNMAP)) return ret; diff --git a/mm/msync.c b/mm/msync.c index 137d1c104f3e..5fe989bd3c4b 100644 --- a/mm/msync.c +++ b/mm/msync.c @@ -37,7 +37,7 @@ SYSCALL_DEFINE3(msync, unsigned long, start, size_t, len,= int, flags) int unmapped_error =3D 0; int error =3D -EINVAL; =20 - start =3D untagged_addr(start); + start =3D untagged_addr(mm, start); =20 if (flags & ~(MS_ASYNC | MS_INVALIDATE | MS_SYNC)) goto out; diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c index 64ec2222a196..93d5b2e3073a 100644 --- a/virt/kvm/kvm_main.c +++ b/virt/kvm/kvm_main.c @@ -1876,7 +1876,7 @@ int __kvm_set_memory_region(struct kvm *kvm, return -EINVAL; /* We can read the guest memory with __xxx_user() later on. */ if ((mem->userspace_addr & (PAGE_SIZE - 1)) || - (mem->userspace_addr !=3D untagged_addr(mem->userspace_addr)) || + (mem->userspace_addr !=3D untagged_addr(kvm->mm, mem->userspace_addr)= ) || !access_ok((void __user *)(unsigned long)mem->userspace_addr, mem->memory_size)) return -EINVAL; --=20 2.35.1 From nobody Mon Apr 27 16:11:44 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C5A9CCA47C for ; Fri, 10 Jun 2022 14:35:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349337AbiFJOfk (ORCPT ); Fri, 10 Jun 2022 10:35:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229515AbiFJOfd (ORCPT ); Fri, 10 Jun 2022 10:35:33 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EECD419C38 for ; Fri, 10 Jun 2022 07:35:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654871731; x=1686407731; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; 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Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv3 4/8] x86/mm: Handle LAM on context switch Date: Fri, 10 Jun 2022 17:35:23 +0300 Message-Id: <20220610143527.22974-5-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> References: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Linear Address Masking mode for userspace pointers encoded in CR3 bits. The mode is selected per-thread. Add new thread features indicate that the thread has Linear Address Masking enabled. switch_mm_irqs_off() now respects these flags and constructs CR3 accordingly. The active LAM mode gets recorded in the tlb_state. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/mmu.h | 1 + arch/x86/include/asm/mmu_context.h | 24 ++++++++++++ arch/x86/include/asm/tlbflush.h | 3 ++ arch/x86/mm/tlb.c | 62 ++++++++++++++++++++++-------- 4 files changed, 75 insertions(+), 15 deletions(-) diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h index 5d7494631ea9..d150e92163b6 100644 --- a/arch/x86/include/asm/mmu.h +++ b/arch/x86/include/asm/mmu.h @@ -40,6 +40,7 @@ typedef struct { =20 #ifdef CONFIG_X86_64 unsigned short flags; + u64 lam_cr3_mask; #endif =20 struct mutex lock; diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_= context.h index b8d40ddeab00..e6eac047c728 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -91,6 +91,29 @@ static inline void switch_ldt(struct mm_struct *prev, st= ruct mm_struct *next) } #endif =20 +#ifdef CONFIG_X86_64 +static inline u64 mm_cr3_lam_mask(struct mm_struct *mm) +{ + return mm->context.lam_cr3_mask; +} + +static inline void dup_lam(struct mm_struct *oldmm, struct mm_struct *mm) +{ + mm->context.lam_cr3_mask =3D oldmm->context.lam_cr3_mask; +} + +#else + +static inline u64 mm_cr3_lam_mask(struct mm_struct *mm) +{ + return 0; +} + +static inline void dup_lam(struct mm_struct *oldmm, struct mm_struct *mm) +{ +} +#endif + #define enter_lazy_tlb enter_lazy_tlb extern void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk); =20 @@ -168,6 +191,7 @@ static inline int arch_dup_mmap(struct mm_struct *oldmm= , struct mm_struct *mm) { arch_dup_pkeys(oldmm, mm); paravirt_arch_dup_mmap(oldmm, mm); + dup_lam(oldmm, mm); return ldt_dup_context(oldmm, mm); } =20 diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflus= h.h index 4af5579c7ef7..5b93dad93ff4 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -86,6 +86,9 @@ struct tlb_state { unsigned long last_user_mm_spec; }; =20 +#ifdef CONFIG_X86_64 + u64 lam_cr3_mask; +#endif u16 loaded_mm_asid; u16 next_asid; =20 diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index d400b6d9d246..458867a8f4bd 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c @@ -154,17 +154,17 @@ static inline u16 user_pcid(u16 asid) return ret; } =20 -static inline unsigned long build_cr3(pgd_t *pgd, u16 asid) +static inline unsigned long build_cr3(pgd_t *pgd, u16 asid, u64 lam) { if (static_cpu_has(X86_FEATURE_PCID)) { - return __sme_pa(pgd) | kern_pcid(asid); + return __sme_pa(pgd) | kern_pcid(asid) | lam; } else { VM_WARN_ON_ONCE(asid !=3D 0); - return __sme_pa(pgd); + return __sme_pa(pgd) | lam; } } =20 -static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid) +static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid, u64 la= m) { VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE); /* @@ -173,7 +173,7 @@ static inline unsigned long build_cr3_noflush(pgd_t *pg= d, u16 asid) * boot because all CPU's the have same capabilities: */ VM_WARN_ON_ONCE(!boot_cpu_has(X86_FEATURE_PCID)); - return __sme_pa(pgd) | kern_pcid(asid) | CR3_NOFLUSH; + return __sme_pa(pgd) | kern_pcid(asid) | lam | CR3_NOFLUSH; } =20 /* @@ -274,15 +274,15 @@ static inline void invalidate_user_asid(u16 asid) (unsigned long *)this_cpu_ptr(&cpu_tlbstate.user_pcid_flush_mask)); } =20 -static void load_new_mm_cr3(pgd_t *pgdir, u16 new_asid, bool need_flush) +static void load_new_mm_cr3(pgd_t *pgdir, u16 new_asid, u64 lam, bool need= _flush) { unsigned long new_mm_cr3; =20 if (need_flush) { invalidate_user_asid(new_asid); - new_mm_cr3 =3D build_cr3(pgdir, new_asid); + new_mm_cr3 =3D build_cr3(pgdir, new_asid, lam); } else { - new_mm_cr3 =3D build_cr3_noflush(pgdir, new_asid); + new_mm_cr3 =3D build_cr3_noflush(pgdir, new_asid, lam); } =20 /* @@ -486,11 +486,36 @@ void cr4_update_pce(void *ignored) static inline void cr4_update_pce_mm(struct mm_struct *mm) { } #endif =20 +#ifdef CONFIG_X86_64 +static inline u64 tlbstate_lam_cr3_mask(void) +{ + return this_cpu_read(cpu_tlbstate.lam_cr3_mask); +} + +static inline void set_tlbstate_lam_cr3_mask(u64 mask) +{ + this_cpu_write(cpu_tlbstate.lam_cr3_mask, mask); +} + +#else + +static inline u64 tlbstate_lam_cr3_mask(void) +{ + return 0; +} + +static inline void set_tlbstate_lam_cr3_mask(u64 mask) +{ +} +#endif + void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { struct mm_struct *real_prev =3D this_cpu_read(cpu_tlbstate.loaded_mm); u16 prev_asid =3D this_cpu_read(cpu_tlbstate.loaded_mm_asid); + u64 prev_lam =3D tlbstate_lam_cr3_mask(); + u64 new_lam =3D mm_cr3_lam_mask(next); bool was_lazy =3D this_cpu_read(cpu_tlbstate_shared.is_lazy); unsigned cpu =3D smp_processor_id(); u64 next_tlb_gen; @@ -504,6 +529,9 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct = mm_struct *next, * cpu_tlbstate.loaded_mm) matches next. * * NB: leave_mm() calls us with prev =3D=3D NULL and tsk =3D=3D NULL. + * + * NB: Initial LAM enabling calls us with prev =3D=3D next. We must update + * CR3 if prev_lam doesn't match the new one. */ =20 /* We don't want flush_tlb_func() to run concurrently with us. */ @@ -520,7 +548,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct = mm_struct *next, * isn't free. */ #ifdef CONFIG_DEBUG_VM - if (WARN_ON_ONCE(__read_cr3() !=3D build_cr3(real_prev->pgd, prev_asid)))= { + if (WARN_ON_ONCE(__read_cr3() !=3D build_cr3(real_prev->pgd, prev_asid, p= rev_lam))) { /* * If we were to BUG here, we'd be very likely to kill * the system so hard that we don't see the call trace. @@ -551,7 +579,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct = mm_struct *next, * provides that full memory barrier and core serializing * instruction. */ - if (real_prev =3D=3D next) { + if (real_prev =3D=3D next && prev_lam =3D=3D new_lam) { VM_WARN_ON(this_cpu_read(cpu_tlbstate.ctxs[prev_asid].ctx_id) !=3D next->context.ctx_id); =20 @@ -622,15 +650,16 @@ void switch_mm_irqs_off(struct mm_struct *prev, struc= t mm_struct *next, barrier(); } =20 + set_tlbstate_lam_cr3_mask(new_lam); if (need_flush) { this_cpu_write(cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id); this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen); - load_new_mm_cr3(next->pgd, new_asid, true); + load_new_mm_cr3(next->pgd, new_asid, new_lam, true); =20 trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL); } else { /* The new ASID is already up to date. */ - load_new_mm_cr3(next->pgd, new_asid, false); + load_new_mm_cr3(next->pgd, new_asid, new_lam, false); =20 trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, 0); } @@ -687,6 +716,7 @@ void initialize_tlbstate_and_flush(void) struct mm_struct *mm =3D this_cpu_read(cpu_tlbstate.loaded_mm); u64 tlb_gen =3D atomic64_read(&init_mm.context.tlb_gen); unsigned long cr3 =3D __read_cr3(); + u64 lam =3D cr3 & (X86_CR3_LAM_U48 | X86_CR3_LAM_U57); =20 /* Assert that CR3 already references the right mm. */ WARN_ON((cr3 & CR3_ADDR_MASK) !=3D __pa(mm->pgd)); @@ -700,7 +730,7 @@ void initialize_tlbstate_and_flush(void) !(cr4_read_shadow() & X86_CR4_PCIDE)); =20 /* Force ASID 0 and force a TLB flush. */ - write_cr3(build_cr3(mm->pgd, 0)); + write_cr3(build_cr3(mm->pgd, 0, lam)); =20 /* Reinitialize tlbstate. */ this_cpu_write(cpu_tlbstate.last_user_mm_spec, LAST_USER_MM_INIT); @@ -1047,8 +1077,10 @@ void flush_tlb_kernel_range(unsigned long start, uns= igned long end) */ unsigned long __get_current_cr3_fast(void) { - unsigned long cr3 =3D build_cr3(this_cpu_read(cpu_tlbstate.loaded_mm)->pg= d, - this_cpu_read(cpu_tlbstate.loaded_mm_asid)); + unsigned long cr3 =3D + build_cr3(this_cpu_read(cpu_tlbstate.loaded_mm)->pgd, + this_cpu_read(cpu_tlbstate.loaded_mm_asid), + tlbstate_lam_cr3_mask()); =20 /* For now, be very restrictive about when this can be called. */ VM_WARN_ON(in_nmi() || preemptible()); --=20 2.35.1 From nobody Mon Apr 27 16:11:44 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9766AC43334 for ; Fri, 10 Jun 2022 14:36:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349685AbiFJOgf (ORCPT ); Fri, 10 Jun 2022 10:36:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58750 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349603AbiFJOgH (ORCPT ); Fri, 10 Jun 2022 10:36:07 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D5D5393C3 for ; Fri, 10 Jun 2022 07:36:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654871766; x=1686407766; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=R6QXymG4GlH91ebp/ZT4U7nCHZ8Wto7mGw90OqLzgZc=; b=C3UJLDeV6eomQkJXVsQL8vZydMweENwejzIN8yCUb83rDq2rGUTXkAbg qVZ+LYF434mQ9kRcn2QohzToQ9mrII6j9kua7CSD50ligE/6BsvZFUbMc IpGca6i1uAysZvlNhareFeb3cH7HnqsCu+2fhuKK/ajXUdr+ckthH+zn/ 30SpArSHZKVe77MMAN+bVk8tnS6/1TO8vmwss3UhXSFSclL2h4xeET9gJ YN7vKwWODREDKUwM7PGe4mHIk2C2qcbem8TxGVyavKwYX5ZDcxBHw00Gf SSguZYZjGVSnBLKd/Kk3isxWOA0DYl9qOuz9AFRG1Xs43D7epO1cgiKSB Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10374"; a="278781422" X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="278781422" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 07:35:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="908939814" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga005.fm.intel.com with ESMTP; 10 Jun 2022 07:35:31 -0700 Received: by black.fi.intel.com (Postfix, from userid 1000) id 4C0E05D3; Fri, 10 Jun 2022 17:35:30 +0300 (EEST) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv3 5/8] x86/uaccess: Provide untagged_addr() and remove tags before address check Date: Fri, 10 Jun 2022 17:35:24 +0300 Message-Id: <20220610143527.22974-6-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> References: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" untagged_addr() is a helper used by the core-mm to strip tag bits and get the address to the canonical shape. In only handles userspace addresses. The untagging mask is stored in mmu_context and will be set on enabling LAM for the process. The tags must not be included into check whether it's okay to access the userspace address. Strip tags in access_ok(). get_user() and put_user() don't use access_ok(), but check access against TASK_SIZE directly in assembly. Strip tags, before calling into the assembly helper. Signed-off-by: Kirill A. Shutemov Reviewed-by: Rick Edgecombe --- arch/x86/include/asm/mmu.h | 1 + arch/x86/include/asm/mmu_context.h | 11 ++++++++ arch/x86/include/asm/uaccess.h | 44 ++++++++++++++++++++++++++++-- arch/x86/kernel/process.c | 3 ++ 4 files changed, 56 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h index d150e92163b6..59c617fc7c6f 100644 --- a/arch/x86/include/asm/mmu.h +++ b/arch/x86/include/asm/mmu.h @@ -41,6 +41,7 @@ typedef struct { #ifdef CONFIG_X86_64 unsigned short flags; u64 lam_cr3_mask; + u64 untag_mask; #endif =20 struct mutex lock; diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_= context.h index e6eac047c728..05821534aadc 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -100,6 +100,12 @@ static inline u64 mm_cr3_lam_mask(struct mm_struct *mm) static inline void dup_lam(struct mm_struct *oldmm, struct mm_struct *mm) { mm->context.lam_cr3_mask =3D oldmm->context.lam_cr3_mask; + mm->context.untag_mask =3D oldmm->context.untag_mask; +} + +static inline void mm_reset_untag_mask(struct mm_struct *mm) +{ + mm->context.untag_mask =3D -1UL; } =20 #else @@ -112,6 +118,10 @@ static inline u64 mm_cr3_lam_mask(struct mm_struct *mm) static inline void dup_lam(struct mm_struct *oldmm, struct mm_struct *mm) { } + +static inline void mm_reset_untag_mask(struct mm_struct *mm) +{ +} #endif =20 #define enter_lazy_tlb enter_lazy_tlb @@ -138,6 +148,7 @@ static inline int init_new_context(struct task_struct *= tsk, mm->context.execute_only_pkey =3D -1; } #endif + mm_reset_untag_mask(mm); init_new_context_ldt(mm); return 0; } diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h index 35f222aa66bf..ca754521a4db 100644 --- a/arch/x86/include/asm/uaccess.h +++ b/arch/x86/include/asm/uaccess.h @@ -6,6 +6,7 @@ */ #include #include +#include #include #include #include @@ -20,6 +21,32 @@ static inline bool pagefault_disabled(void); # define WARN_ON_IN_IRQ() #endif =20 +#ifdef CONFIG_X86_64 +/* + * Mask out tag bits from the address. + * + * Magic with the 'sign' allows to untag userspace pointer without any bra= nches + * while leaving kernel addresses intact. + */ +#define untagged_addr(mm, addr) ({ \ + u64 __addr =3D (__force u64)(addr); \ + s64 sign =3D (s64)__addr >> 63; \ + __addr ^=3D sign; \ + __addr &=3D (mm)->context.untag_mask; \ + __addr ^=3D sign; \ + (__force __typeof__(addr))__addr; \ +}) + +#define untagged_ptr(mm, ptr) ({ \ + u64 __ptrval =3D (__force u64)(ptr); \ + __ptrval =3D untagged_addr(mm, __ptrval); \ + (__force __typeof__(*(ptr)) *)__ptrval; \ +}) +#else +#define untagged_addr(mm, addr) (addr) +#define untagged_ptr(mm, ptr) (ptr) +#endif + /** * access_ok - Checks if a user space pointer is valid * @addr: User space pointer to start of block to check @@ -40,7 +67,7 @@ static inline bool pagefault_disabled(void); #define access_ok(addr, size) \ ({ \ WARN_ON_IN_IRQ(); \ - likely(__access_ok(addr, size)); \ + likely(__access_ok(untagged_addr(current->mm, addr), size)); \ }) =20 #include @@ -125,7 +152,13 @@ extern int __get_user_bad(void); * Return: zero on success, or -EFAULT on error. * On error, the variable @x is set to zero. */ -#define get_user(x,ptr) ({ might_fault(); do_get_user_call(get_user,x,ptr)= ; }) +#define get_user(x,ptr) \ +({ \ + __typeof__(*(ptr)) __user *__ptr_clean; \ + __ptr_clean =3D untagged_ptr(current->mm, ptr); \ + might_fault(); \ + do_get_user_call(get_user,x,__ptr_clean); \ +}) =20 /** * __get_user - Get a simple variable from user space, with less checking. @@ -222,7 +255,12 @@ extern void __put_user_nocheck_8(void); * * Return: zero on success, or -EFAULT on error. */ -#define put_user(x, ptr) ({ might_fault(); do_put_user_call(put_user,x,ptr= ); }) +#define put_user(x, ptr) ({ \ + __typeof__(*(ptr)) __user *__ptr_clean; \ + __ptr_clean =3D untagged_ptr(current->mm, ptr); \ + might_fault(); \ + do_put_user_call(put_user,x,__ptr_clean); \ +}) =20 /** * __put_user - Write a simple value into user space, with less checking. diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index 9b2772b7e1f3..18b2bfdf7b9b 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -47,6 +47,7 @@ #include #include #include +#include =20 #include "process.h" =20 @@ -367,6 +368,8 @@ void arch_setup_new_exec(void) task_clear_spec_ssb_noexec(current); speculation_ctrl_update(read_thread_flags()); } + + mm_reset_untag_mask(current->mm); } =20 #ifdef CONFIG_X86_IOPL_IOPERM --=20 2.35.1 From nobody Mon Apr 27 16:11:44 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 083FBC43334 for ; Fri, 10 Jun 2022 14:36:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349632AbiFJOgU (ORCPT ); Fri, 10 Jun 2022 10:36:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349515AbiFJOgG (ORCPT ); Fri, 10 Jun 2022 10:36:06 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0511743AD6 for ; Fri, 10 Jun 2022 07:36:04 -0700 (PDT) DKIM-Signature: v=1; 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10 Jun 2022 07:35:31 -0700 Received: by black.fi.intel.com (Postfix, from userid 1000) id 5720D60E; Fri, 10 Jun 2022 17:35:30 +0300 (EEST) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv3 6/8] x86/mm: Provide ARCH_GET_UNTAG_MASK and ARCH_ENABLE_TAGGED_ADDR Date: Fri, 10 Jun 2022 17:35:25 +0300 Message-Id: <20220610143527.22974-7-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> References: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a couple of arch_prctl() handles: - ARCH_ENABLE_TAGGED_ADDR enabled LAM. The argument is required number of tag bits. It is rounded up to the nearest LAM mode that can provide it. For now only LAM_U57 is supported, with 6 tag bits. - ARCH_GET_UNTAG_MASK returns untag mask. It can indicates where tag bits located in the address. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/uapi/asm/prctl.h | 3 +++ arch/x86/kernel/process_64.c | 32 ++++++++++++++++++++++++++++++- 2 files changed, 34 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/uapi/asm/prctl.h b/arch/x86/include/uapi/asm/= prctl.h index 500b96e71f18..38164a05c23c 100644 --- a/arch/x86/include/uapi/asm/prctl.h +++ b/arch/x86/include/uapi/asm/prctl.h @@ -20,4 +20,7 @@ #define ARCH_MAP_VDSO_32 0x2002 #define ARCH_MAP_VDSO_64 0x2003 =20 +#define ARCH_GET_UNTAG_MASK 0x4001 +#define ARCH_ENABLE_TAGGED_ADDR 0x4002 + #endif /* _ASM_X86_PRCTL_H */ diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 1962008fe743..93c8eba1a66d 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -742,6 +742,32 @@ static long prctl_map_vdso(const struct vdso_image *im= age, unsigned long addr) } #endif =20 +static int prctl_enable_tagged_addr(unsigned long nr_bits) +{ + struct mm_struct *mm =3D current->mm; + + /* Already enabled? */ + if (mm->context.lam_cr3_mask) + return -EBUSY; + + /* LAM has to be enabled before spawning threads */ + if (get_nr_threads(current) > 1) + return -EBUSY; + + if (!nr_bits) { + return -EINVAL; + } else if (nr_bits <=3D 6) { + mm->context.lam_cr3_mask =3D X86_CR3_LAM_U57; + mm->context.untag_mask =3D ~GENMASK(62, 57); + } else { + return -EINVAL; + } + + /* Update CR3 to get LAM active */ + switch_mm(current->mm, current->mm, current); + return 0; +} + long do_arch_prctl_64(struct task_struct *task, int option, unsigned long = arg2) { int ret =3D 0; @@ -829,7 +855,11 @@ long do_arch_prctl_64(struct task_struct *task, int op= tion, unsigned long arg2) case ARCH_MAP_VDSO_64: return prctl_map_vdso(&vdso_image_64, arg2); #endif - + case ARCH_GET_UNTAG_MASK: + return put_user(current->mm->context.untag_mask, + (unsigned long __user *)arg2); + case ARCH_ENABLE_TAGGED_ADDR: + return prctl_enable_tagged_addr(arg2); default: ret =3D -EINVAL; break; --=20 2.35.1 From nobody Mon Apr 27 16:11:44 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E26FFC43334 for ; Fri, 10 Jun 2022 14:35:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349047AbiFJOfv (ORCPT ); Fri, 10 Jun 2022 10:35:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344295AbiFJOfg (ORCPT ); Fri, 10 Jun 2022 10:35:36 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 24834DF9A for ; Fri, 10 Jun 2022 07:35:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654871735; x=1686407735; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jPLLVmSW1piVU/OAwXFpUFnlbWKXRmSNayPGvzyZWtc=; b=jsIMDblGGaz2KxKpN21H24yg8tEQ0AaCsJj0KGlvQo3lO2PPw/QggMq+ OIF1896pZNqD077ArXpAIq/XthY/uIhvf0uSJb2Ym/NyRarc4WMQG9c7U y6WstkUriTzHozHSo9yozO5Q4jEEaoRIqzieZdyNqCDbNQ42bLEQ8jBVv mFm+peubsI0KgVszvzePBLhqrJPo15uNeNn6qX+oObXwFVmCcEzpoXqW5 JNRrLLSamiug0PnTumJ2l4FhF1s7CLFrdfR3d+dyv+kgJtKMI7IeoEeJ5 NCNTkzFB5emDwZvdJeULWgcOIyXf09MMWgs9WUzh3bchWuTjMlCNrtJcY w==; X-IronPort-AV: E=McAfee;i="6400,9594,10374"; a="266411452" X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="266411452" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 07:35:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="616502832" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 10 Jun 2022 07:35:31 -0700 Received: by black.fi.intel.com (Postfix, from userid 1000) id 5D28E18F; Fri, 10 Jun 2022 17:35:30 +0300 (EEST) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv3 7/8] x86: Expose untagging mask in /proc/$PID/arch_status Date: Fri, 10 Jun 2022 17:35:26 +0300 Message-Id: <20220610143527.22974-8-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> References: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a line in /proc/$PID/arch_status to report untag_mask. It can be used to find out LAM status of the process from the outside. It is useful for debuggers. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/mmu_context.h | 10 ++++++ arch/x86/kernel/Makefile | 2 ++ arch/x86/kernel/fpu/xstate.c | 47 ---------------------------- arch/x86/kernel/proc.c | 50 ++++++++++++++++++++++++++++++ 4 files changed, 62 insertions(+), 47 deletions(-) create mode 100644 arch/x86/kernel/proc.c diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_= context.h index 05821534aadc..a6cded0f5e64 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -103,6 +103,11 @@ static inline void dup_lam(struct mm_struct *oldmm, st= ruct mm_struct *mm) mm->context.untag_mask =3D oldmm->context.untag_mask; } =20 +static inline unsigned long mm_untag_mask(struct mm_struct *mm) +{ + return mm->context.untag_mask; +} + static inline void mm_reset_untag_mask(struct mm_struct *mm) { mm->context.untag_mask =3D -1UL; @@ -119,6 +124,11 @@ static inline void dup_lam(struct mm_struct *oldmm, st= ruct mm_struct *mm) { } =20 +static inline unsigned long mm_untag_mask(struct mm_struct *mm) +{ + return -1UL; +} + static inline void mm_reset_untag_mask(struct mm_struct *mm) { } diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 03364dc40d8d..228e108cbaba 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -145,6 +145,8 @@ obj-$(CONFIG_UNWINDER_GUESS) +=3D unwind_guess.o =20 obj-$(CONFIG_AMD_MEM_ENCRYPT) +=3D sev.o =20 +obj-$(CONFIG_PROC_FS) +=3D proc.o + ### # 64 bit specific files ifeq ($(CONFIG_X86_64),y) diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c index c8340156bfd2..838a6f0627fd 100644 --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -10,8 +10,6 @@ #include #include #include -#include -#include #include =20 #include @@ -1745,48 +1743,3 @@ long fpu_xstate_prctl(int option, unsigned long arg2) return -EINVAL; } } - -#ifdef CONFIG_PROC_PID_ARCH_STATUS -/* - * Report the amount of time elapsed in millisecond since last AVX512 - * use in the task. - */ -static void avx512_status(struct seq_file *m, struct task_struct *task) -{ - unsigned long timestamp =3D READ_ONCE(task->thread.fpu.avx512_timestamp); - long delta; - - if (!timestamp) { - /* - * Report -1 if no AVX512 usage - */ - delta =3D -1; - } else { - delta =3D (long)(jiffies - timestamp); - /* - * Cap to LONG_MAX if time difference > LONG_MAX - */ - if (delta < 0) - delta =3D LONG_MAX; - delta =3D jiffies_to_msecs(delta); - } - - seq_put_decimal_ll(m, "AVX512_elapsed_ms:\t", delta); - seq_putc(m, '\n'); -} - -/* - * Report architecture specific information - */ -int proc_pid_arch_status(struct seq_file *m, struct pid_namespace *ns, - struct pid *pid, struct task_struct *task) -{ - /* - * Report AVX512 state if the processor and build option supported. - */ - if (cpu_feature_enabled(X86_FEATURE_AVX512F)) - avx512_status(m, task); - - return 0; -} -#endif /* CONFIG_PROC_PID_ARCH_STATUS */ diff --git a/arch/x86/kernel/proc.c b/arch/x86/kernel/proc.c new file mode 100644 index 000000000000..59e681425e09 --- /dev/null +++ b/arch/x86/kernel/proc.c @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include + +/* + * Report the amount of time elapsed in millisecond since last AVX512 + * use in the task. + */ +static void avx512_status(struct seq_file *m, struct task_struct *task) +{ + unsigned long timestamp =3D READ_ONCE(task->thread.fpu.avx512_timestamp); + long delta; + + if (!timestamp) { + /* + * Report -1 if no AVX512 usage + */ + delta =3D -1; + } else { + delta =3D (long)(jiffies - timestamp); + /* + * Cap to LONG_MAX if time difference > LONG_MAX + */ + if (delta < 0) + delta =3D LONG_MAX; + delta =3D jiffies_to_msecs(delta); + } + + seq_put_decimal_ll(m, "AVX512_elapsed_ms:\t", delta); + seq_putc(m, '\n'); +} + +/* + * Report architecture specific information + */ +int proc_pid_arch_status(struct seq_file *m, struct pid_namespace *ns, + struct pid *pid, struct task_struct *task) +{ + /* + * Report AVX512 state if the processor and build option supported. + */ + if (cpu_feature_enabled(X86_FEATURE_AVX512F)) + avx512_status(m, task); + + seq_printf(m, "untag_mask:\t%#lx\n", mm_untag_mask(task->mm)); + + return 0; +} --=20 2.35.1 From nobody Mon Apr 27 16:11:44 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F08D5C43334 for ; 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X-IronPort-AV: E=McAfee;i="6400,9594,10374"; a="339397518" X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="339397518" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 07:35:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="586237208" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga007.fm.intel.com with ESMTP; 10 Jun 2022 07:35:31 -0700 Received: by black.fi.intel.com (Postfix, from userid 1000) id 6D52C710; Fri, 10 Jun 2022 17:35:30 +0300 (EEST) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv3 OPTIONAL 8/8] x86/mm: Extend LAM to support to LAM_U48 Date: Fri, 10 Jun 2022 17:35:27 +0300 Message-Id: <20220610143527.22974-9-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> References: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" LAM_U48 allows to encode 15 bits of tags into address. LAM_U48 steals bits above 47-bit for tags and makes it impossible for userspace to use full address space on 5-level paging machine. Make these features mutually exclusive: whichever gets enabled first blocks the other one. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/elf.h | 3 ++- arch/x86/include/asm/mmu_context.h | 13 +++++++++++++ arch/x86/kernel/process_64.c | 22 ++++++++++++++++++++++ arch/x86/kernel/sys_x86_64.c | 5 +++-- arch/x86/mm/hugetlbpage.c | 6 ++++-- arch/x86/mm/mmap.c | 9 ++++++++- 6 files changed, 52 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h index cb0ff1055ab1..4df13497a770 100644 --- a/arch/x86/include/asm/elf.h +++ b/arch/x86/include/asm/elf.h @@ -317,7 +317,8 @@ static inline int mmap_is_ia32(void) extern unsigned long task_size_32bit(void); extern unsigned long task_size_64bit(int full_addr_space); extern unsigned long get_mmap_base(int is_legacy); -extern bool mmap_address_hint_valid(unsigned long addr, unsigned long len); +extern bool mmap_address_hint_valid(struct mm_struct *mm, + unsigned long addr, unsigned long len); extern unsigned long get_sigframe_size(void); =20 #ifdef CONFIG_X86_32 diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_= context.h index a6cded0f5e64..17d31988edd6 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -263,6 +263,19 @@ static inline bool arch_vma_access_permitted(struct vm= _area_struct *vma, =20 unsigned long __get_current_cr3_fast(void); =20 +#ifdef CONFIG_X86_5LEVEL +static inline bool full_va_allowed(struct mm_struct *mm) +{ + /* LAM_U48 steals VA bits above 47-bit for tags */ + return mm->context.lam_cr3_mask !=3D X86_CR3_LAM_U48; +} +#else +static inline bool full_va_allowed(struct mm_struct *mm) +{ + return false; +} +#endif + #include =20 #endif /* _ASM_X86_MMU_CONTEXT_H */ diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 93c8eba1a66d..56822d313b96 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -742,6 +742,16 @@ static long prctl_map_vdso(const struct vdso_image *im= age, unsigned long addr) } #endif =20 +static bool lam_u48_allowed(void) +{ + struct mm_struct *mm =3D current->mm; + + if (!full_va_allowed(mm)) + return true; + + return find_vma(mm, DEFAULT_MAP_WINDOW) =3D=3D NULL; +} + static int prctl_enable_tagged_addr(unsigned long nr_bits) { struct mm_struct *mm =3D current->mm; @@ -759,6 +769,18 @@ static int prctl_enable_tagged_addr(unsigned long nr_b= its) } else if (nr_bits <=3D 6) { mm->context.lam_cr3_mask =3D X86_CR3_LAM_U57; mm->context.untag_mask =3D ~GENMASK(62, 57); + } else if (nr_bits <=3D 15) { + if (mmap_write_lock_killable(mm)) + return -EINTR; + + if (!lam_u48_allowed()) { + mmap_write_unlock(mm); + return -EBUSY; + } + + mm->context.lam_cr3_mask =3D X86_CR3_LAM_U48; + mm->context.untag_mask =3D ~GENMASK(62, 48); + mmap_write_unlock(mm); } else { return -EINVAL; } diff --git a/arch/x86/kernel/sys_x86_64.c b/arch/x86/kernel/sys_x86_64.c index 8cc653ffdccd..5ea6aaed89ba 100644 --- a/arch/x86/kernel/sys_x86_64.c +++ b/arch/x86/kernel/sys_x86_64.c @@ -21,6 +21,7 @@ =20 #include #include +#include =20 /* * Align a virtual address to avoid aliasing in the I$ on AMD F15h. @@ -182,7 +183,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const= unsigned long addr0, /* requesting a specific address */ if (addr) { addr &=3D PAGE_MASK; - if (!mmap_address_hint_valid(addr, len)) + if (!mmap_address_hint_valid(mm, addr, len)) goto get_unmapped_area; =20 vma =3D find_vma(mm, addr); @@ -203,7 +204,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const= unsigned long addr0, * !in_32bit_syscall() check to avoid high addresses for x32 * (and make it no op on native i386). */ - if (addr > DEFAULT_MAP_WINDOW && !in_32bit_syscall()) + if (addr > DEFAULT_MAP_WINDOW && !in_32bit_syscall() && full_va_allowed(m= m)) info.high_limit +=3D TASK_SIZE_MAX - DEFAULT_MAP_WINDOW; =20 info.align_mask =3D 0; diff --git a/arch/x86/mm/hugetlbpage.c b/arch/x86/mm/hugetlbpage.c index a0d023cb4292..9fdc8db42365 100644 --- a/arch/x86/mm/hugetlbpage.c +++ b/arch/x86/mm/hugetlbpage.c @@ -18,6 +18,7 @@ #include #include #include +#include =20 #if 0 /* This is just for testing */ struct page * @@ -103,6 +104,7 @@ static unsigned long hugetlb_get_unmapped_area_topdown(= struct file *file, unsigned long pgoff, unsigned long flags) { struct hstate *h =3D hstate_file(file); + struct mm_struct *mm =3D current->mm; struct vm_unmapped_area_info info; =20 info.flags =3D VM_UNMAPPED_AREA_TOPDOWN; @@ -114,7 +116,7 @@ static unsigned long hugetlb_get_unmapped_area_topdown(= struct file *file, * If hint address is above DEFAULT_MAP_WINDOW, look for unmapped area * in the full address space. */ - if (addr > DEFAULT_MAP_WINDOW && !in_32bit_syscall()) + if (addr > DEFAULT_MAP_WINDOW && !in_32bit_syscall() && full_va_allowed(m= m)) info.high_limit +=3D TASK_SIZE_MAX - DEFAULT_MAP_WINDOW; =20 info.align_mask =3D PAGE_MASK & ~huge_page_mask(h); @@ -161,7 +163,7 @@ hugetlb_get_unmapped_area(struct file *file, unsigned l= ong addr, =20 if (addr) { addr &=3D huge_page_mask(h); - if (!mmap_address_hint_valid(addr, len)) + if (!mmap_address_hint_valid(mm, addr, len)) goto get_unmapped_area; =20 vma =3D find_vma(mm, addr); diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c index c90c20904a60..f9ca824729de 100644 --- a/arch/x86/mm/mmap.c +++ b/arch/x86/mm/mmap.c @@ -21,6 +21,7 @@ #include #include #include +#include =20 #include "physaddr.h" =20 @@ -35,6 +36,8 @@ unsigned long task_size_32bit(void) =20 unsigned long task_size_64bit(int full_addr_space) { + if (!full_va_allowed(current->mm)) + return DEFAULT_MAP_WINDOW; return full_addr_space ? TASK_SIZE_MAX : DEFAULT_MAP_WINDOW; } =20 @@ -206,11 +209,15 @@ const char *arch_vma_name(struct vm_area_struct *vma) * the failure of such a fixed mapping request, so the restriction is not * applied. */ -bool mmap_address_hint_valid(unsigned long addr, unsigned long len) +bool mmap_address_hint_valid(struct mm_struct *mm, + unsigned long addr, unsigned long len) { if (TASK_SIZE - len < addr) return false; =20 + if (addr + len > DEFAULT_MAP_WINDOW && !full_va_allowed(mm)) + return false; + return (addr > DEFAULT_MAP_WINDOW) =3D=3D (addr + len > DEFAULT_MAP_WINDO= W); } =20 --=20 2.35.1