From nobody Mon Apr 27 19:15:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EA06C43334 for ; Fri, 10 Jun 2022 03:51:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346236AbiFJDv1 (ORCPT ); Thu, 9 Jun 2022 23:51:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42704 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234635AbiFJDvX (ORCPT ); Thu, 9 Jun 2022 23:51:23 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 01F0C38A280; Thu, 9 Jun 2022 20:51:21 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CD83712FC; Thu, 9 Jun 2022 20:51:20 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.42.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 94D903F766; Thu, 9 Jun 2022 20:51:15 -0700 (PDT) From: Anshuman Khandual To: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, peterz@infradead.org, alexander.shishkin@linux.intel.com, jolsa@redhat.com, acme@kernel.org Cc: Anshuman Khandual , Robin Murphy , Suzuki Poulose , James Clark , Ingo Molnar , Mark Rutland , Namhyung Kim , Thomas Gleixner , Will Deacon , linux-arm-kernel@lists.infradead.org Subject: [PATCH V6 1/8] perf: Add system error and not in transaction branch types Date: Fri, 10 Jun 2022 09:20:54 +0530 Message-Id: <20220610035101.424112-2-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220610035101.424112-1-anshuman.khandual@arm.com> References: <20220610035101.424112-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This expands generic branch type classification by adding two more entries there in i.e system error and not in transaction. This also updates the x86 implementation to process X86_BR_NO_TX records as appropriate. This changes branch types reported to user space on x86 platform but it should not be a problem. The possible scenarios and impacts are enumerated here. -------------------------------------------------------------------------- | kernel | perf tool | Impact | -------------------------------------------------------------------------- | old | old | Works as before | -------------------------------------------------------------------------- | old | new | PERF_BR_UNKNOWN is processed | -------------------------------------------------------------------------- | new | old | PERF_BR_NO_TX is blocked via old PERF_BR_MAX | -------------------------------------------------------------------------- | new | new | PERF_BR_NO_TX is recognized | -------------------------------------------------------------------------- When PERF_BR_NO_TX is blocked via old PERF_BR_MAX (new kernel with old perf tool) the user space might throw up an warning complaining about an unrecognized branch types being reported, but it's expected. PERF_BR_SERROR & PERF_BR_NO_TX branch types will be used for BRBE implementation on arm64 platform. PERF_BR_NO_TX complements 'abort' and 'in_tx' elements in perf_branch_entry which represent other transaction states for a given branch record. Because this completes the transaction state classification. Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Arnaldo Carvalho de Melo Cc: Mark Rutland Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Namhyung Kim Cc: Thomas Gleixner Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-perf-users@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/x86/events/intel/lbr.c | 2 +- include/uapi/linux/perf_event.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c index 13179f31fe10..0a506c85b53e 100644 --- a/arch/x86/events/intel/lbr.c +++ b/arch/x86/events/intel/lbr.c @@ -1334,7 +1334,7 @@ static int branch_map[X86_BR_TYPE_MAP_MAX] =3D { PERF_BR_IND_CALL, /* X86_BR_IND_CALL */ PERF_BR_UNKNOWN, /* X86_BR_ABORT */ PERF_BR_UNKNOWN, /* X86_BR_IN_TX */ - PERF_BR_UNKNOWN, /* X86_BR_NO_TX */ + PERF_BR_NO_TX, /* X86_BR_NO_TX */ PERF_BR_CALL, /* X86_BR_ZERO_CALL */ PERF_BR_UNKNOWN, /* X86_BR_CALL_STACK */ PERF_BR_IND, /* X86_BR_IND_JMP */ diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_even= t.h index d37629dbad72..26d8f0b5ac0d 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -253,6 +253,8 @@ enum { PERF_BR_COND_RET =3D 10, /* conditional function return */ PERF_BR_ERET =3D 11, /* exception return */ PERF_BR_IRQ =3D 12, /* irq */ + PERF_BR_SERROR =3D 13, /* system error */ + PERF_BR_NO_TX =3D 14, /* not in transaction */ PERF_BR_MAX, }; =20 --=20 2.25.1 From nobody Mon Apr 27 19:15:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00EFBC43334 for ; Fri, 10 Jun 2022 03:51:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346257AbiFJDvb (ORCPT ); Thu, 9 Jun 2022 23:51:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234635AbiFJDv2 (ORCPT ); Thu, 9 Jun 2022 23:51:28 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id AF06038A96A; Thu, 9 Jun 2022 20:51:26 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8C8A01570; Thu, 9 Jun 2022 20:51:26 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.42.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 540683F766; Thu, 9 Jun 2022 20:51:21 -0700 (PDT) From: Anshuman Khandual To: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, peterz@infradead.org, alexander.shishkin@linux.intel.com, jolsa@redhat.com, acme@kernel.org Cc: Anshuman Khandual , Robin Murphy , Suzuki Poulose , James Clark , Ingo Molnar , Mark Rutland , Namhyung Kim , Thomas Gleixner , Will Deacon , linux-arm-kernel@lists.infradead.org Subject: [PATCH V6 2/8] perf: Extend branch type classification Date: Fri, 10 Jun 2022 09:20:55 +0530 Message-Id: <20220610035101.424112-3-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220610035101.424112-1-anshuman.khandual@arm.com> References: <20220610035101.424112-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" branch_entry.type now has ran out of space to accommodate more branch types classification. This will prevent perf branch stack implementation on arm64 (via BRBE) to capture all available branch types. Extending this bit field i.e branch_entry.type [4 bits] is not an option as it will break user space ABI both for little and big endian perf tools. Extend branch classification with a new field branch_entry.new_type via a new branch type PERF_BR_EXTEND_ABI in branch_entry.type. Perf tools which could decode PERF_BR_EXTEND_ABI, will then parse branch_entry.new_type as well. branch_entry.new_type is a 4 bit field which can hold upto 16 branch types. The first three branch types will hold various generic page faults followed by five architecture specific branch types, which can be overridden by the platform for specific use cases. These architecture specific branch types gets overridden on arm64 platform for BRBE implementation. New generic branch types - PERF_BR_NEW_FAULT_ALGN - PERF_BR_NEW_FAULT_DATA - PERF_BR_NEW_FAULT_INST New arch specific branch types - PERF_BR_NEW_ARCH_1 - PERF_BR_NEW_ARCH_2 - PERF_BR_NEW_ARCH_3 - PERF_BR_NEW_ARCH_4 - PERF_BR_NEW_ARCH_5 Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Arnaldo Carvalho de Melo Cc: Mark Rutland Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Namhyung Kim Cc: Thomas Gleixner Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-perf-users@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- include/uapi/linux/perf_event.h | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_even= t.h index 26d8f0b5ac0d..d29280adc3c4 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -255,9 +255,22 @@ enum { PERF_BR_IRQ =3D 12, /* irq */ PERF_BR_SERROR =3D 13, /* system error */ PERF_BR_NO_TX =3D 14, /* not in transaction */ + PERF_BR_EXTEND_ABI =3D 15, /* extend ABI */ PERF_BR_MAX, }; =20 +enum { + PERF_BR_NEW_FAULT_ALGN =3D 0, /* Alignment fault */ + PERF_BR_NEW_FAULT_DATA =3D 1, /* Data fault */ + PERF_BR_NEW_FAULT_INST =3D 2, /* Inst fault */ + PERF_BR_NEW_ARCH_1 =3D 3, /* Architecture specific */ + PERF_BR_NEW_ARCH_2 =3D 4, /* Architecture specific */ + PERF_BR_NEW_ARCH_3 =3D 5, /* Architecture specific */ + PERF_BR_NEW_ARCH_4 =3D 6, /* Architecture specific */ + PERF_BR_NEW_ARCH_5 =3D 7, /* Architecture specific */ + PERF_BR_NEW_MAX, +}; + #define PERF_SAMPLE_BRANCH_PLM_ALL \ (PERF_SAMPLE_BRANCH_USER|\ PERF_SAMPLE_BRANCH_KERNEL|\ @@ -1372,7 +1385,8 @@ struct perf_branch_entry { abort:1, /* transaction abort */ cycles:16, /* cycle count to last branch */ type:4, /* branch type */ - reserved:40; + new_type:4, /* additional branch type */ + reserved:36; }; =20 union perf_sample_weight { --=20 2.25.1 From nobody Mon Apr 27 19:15:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 747E5C433EF for ; Fri, 10 Jun 2022 03:51:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346278AbiFJDvl (ORCPT ); Thu, 9 Jun 2022 23:51:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346261AbiFJDve (ORCPT ); Thu, 9 Jun 2022 23:51:34 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 52C8E38AC8C; Thu, 9 Jun 2022 20:51:32 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 19B451576; Thu, 9 Jun 2022 20:51:32 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.42.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id EE5603F766; Thu, 9 Jun 2022 20:51:26 -0700 (PDT) From: Anshuman Khandual To: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, peterz@infradead.org, alexander.shishkin@linux.intel.com, jolsa@redhat.com, acme@kernel.org Cc: Anshuman Khandual , Robin Murphy , Suzuki Poulose , James Clark , Ingo Molnar , Mark Rutland , Namhyung Kim , Thomas Gleixner , Will Deacon , linux-arm-kernel@lists.infradead.org Subject: [PATCH V6 3/8] perf: Capture branch privilege information Date: Fri, 10 Jun 2022 09:20:56 +0530 Message-Id: <20220610035101.424112-4-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220610035101.424112-1-anshuman.khandual@arm.com> References: <20220610035101.424112-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Platforms like arm64 could capture privilege level information for all the branch records. Hence this adds a new element in the struct branch_entry to record the privilege level information, which could be requested through a new event.attr.branch_sample_type based flag PERF_SAMPLE_BRANCH_PRIV_SAVE. This flag helps user choose whether privilege information is captured. Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Arnaldo Carvalho de Melo Cc: Mark Rutland Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Namhyung Kim Cc: Thomas Gleixner Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-perf-users@vger.kernel.org Cc: linux-kernel@vger.kernel.org Reviewed-by: James Clark Signed-off-by: Anshuman Khandual --- include/uapi/linux/perf_event.h | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_even= t.h index d29280adc3c4..193dba2ecdc1 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -204,6 +204,8 @@ enum perf_branch_sample_type_shift { =20 PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT =3D 17, /* save low level index of raw = branch records */ =20 + PERF_SAMPLE_BRANCH_PRIV_SAVE_SHIFT =3D 18, /* save privilege mode */ + PERF_SAMPLE_BRANCH_MAX_SHIFT /* non-ABI */ }; =20 @@ -233,6 +235,8 @@ enum perf_branch_sample_type { =20 PERF_SAMPLE_BRANCH_HW_INDEX =3D 1U << PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT, =20 + PERF_SAMPLE_BRANCH_PRIV_SAVE =3D 1U << PERF_SAMPLE_BRANCH_PRIV_SAVE_SHIFT, + PERF_SAMPLE_BRANCH_MAX =3D 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT, }; =20 @@ -271,6 +275,13 @@ enum { PERF_BR_NEW_MAX, }; =20 +enum { + PERF_BR_PRIV_UNKNOWN =3D 0, + PERF_BR_PRIV_USER =3D 1, + PERF_BR_PRIV_KERNEL =3D 2, + PERF_BR_PRIV_HV =3D 3, +}; + #define PERF_SAMPLE_BRANCH_PLM_ALL \ (PERF_SAMPLE_BRANCH_USER|\ PERF_SAMPLE_BRANCH_KERNEL|\ @@ -1386,7 +1397,8 @@ struct perf_branch_entry { cycles:16, /* cycle count to last branch */ type:4, /* branch type */ new_type:4, /* additional branch type */ - reserved:36; + priv:3, /* privilege level */ + reserved:33; }; =20 union perf_sample_weight { --=20 2.25.1 From nobody Mon Apr 27 19:15:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDE79C43334 for ; Fri, 10 Jun 2022 03:51:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346288AbiFJDvp (ORCPT ); Thu, 9 Jun 2022 23:51:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346269AbiFJDvj (ORCPT ); Thu, 9 Jun 2022 23:51:39 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D07A738A280; Thu, 9 Jun 2022 20:51:37 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9964415BF; Thu, 9 Jun 2022 20:51:37 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.42.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 947963F766; Thu, 9 Jun 2022 20:51:32 -0700 (PDT) From: Anshuman Khandual To: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, peterz@infradead.org, alexander.shishkin@linux.intel.com, jolsa@redhat.com, acme@kernel.org Cc: Anshuman Khandual , Robin Murphy , Suzuki Poulose , James Clark , Ingo Molnar , Mark Rutland , Namhyung Kim , Thomas Gleixner , Will Deacon , linux-arm-kernel@lists.infradead.org Subject: [PATCH V6 4/8] perf: Add PERF_BR_NEW_ARCH_[N] map for BRBE on arm64 platform Date: Fri, 10 Jun 2022 09:20:57 +0530 Message-Id: <20220610035101.424112-5-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220610035101.424112-1-anshuman.khandual@arm.com> References: <20220610035101.424112-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" BRBE captured branch types will overflow perf_branch_entry.type and generic branch types in perf_branch_entry.new_type. So override each available arch specific branch type in the following manner to comprehensively process all reported branch types in BRBE. PERF_BR_ARM64_FIQ PERF_BR_NEW_ARCH_1 PERF_BR_ARM64_DEBUG_HALT PERF_BR_NEW_ARCH_2 PERF_BR_ARM64_DEBUG_EXIT PERF_BR_NEW_ARCH_3 PERF_BR_ARM64_DEBUG_INST PERF_BR_NEW_ARCH_4 PERF_BR_ARM64_DEBUG_DATA PERF_BR_NEW_ARCH_5 Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Arnaldo Carvalho de Melo Cc: Mark Rutland Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Namhyung Kim Cc: Thomas Gleixner Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-perf-users@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- include/uapi/linux/perf_event.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_even= t.h index 193dba2ecdc1..4cf1c8e22cab 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -282,6 +282,12 @@ enum { PERF_BR_PRIV_HV =3D 3, }; =20 +#define PERF_BR_ARM64_FIQ PERF_BR_NEW_ARCH_1 +#define PERF_BR_ARM64_DEBUG_HALT PERF_BR_NEW_ARCH_2 +#define PERF_BR_ARM64_DEBUG_EXIT PERF_BR_NEW_ARCH_3 +#define PERF_BR_ARM64_DEBUG_INST PERF_BR_NEW_ARCH_4 +#define PERF_BR_ARM64_DEBUG_DATA PERF_BR_NEW_ARCH_5 + #define PERF_SAMPLE_BRANCH_PLM_ALL \ (PERF_SAMPLE_BRANCH_USER|\ PERF_SAMPLE_BRANCH_KERNEL|\ --=20 2.25.1 From nobody Mon Apr 27 19:15:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6A70C43334 for ; Fri, 10 Jun 2022 03:51:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345990AbiFJDvs (ORCPT ); Thu, 9 Jun 2022 23:51:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346282AbiFJDvo (ORCPT ); Thu, 9 Jun 2022 23:51:44 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 385E038AC93; Thu, 9 Jun 2022 20:51:43 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1EC86165C; Thu, 9 Jun 2022 20:51:43 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.42.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 154003F766; Thu, 9 Jun 2022 20:51:37 -0700 (PDT) From: Anshuman Khandual To: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, peterz@infradead.org, alexander.shishkin@linux.intel.com, jolsa@redhat.com, acme@kernel.org Cc: Anshuman Khandual , Robin Murphy , Suzuki Poulose , James Clark , Ingo Molnar , Mark Rutland , Namhyung Kim , Thomas Gleixner , Will Deacon , linux-arm-kernel@lists.infradead.org Subject: [PATCH V6 5/8] perf/tools: Add system error and not in transaction branch types Date: Fri, 10 Jun 2022 09:20:58 +0530 Message-Id: <20220610035101.424112-6-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220610035101.424112-1-anshuman.khandual@arm.com> References: <20220610035101.424112-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This updates the perf tool with generic branch type classification with two new branch types i.e system error (PERF_BR_SERROR) and not in transaction (PERF_BR_NO_TX) which got updated earlier in the kernel. This also updates corresponding branch type strings in branch_type_name(). Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Arnaldo Carvalho de Melo Cc: Mark Rutland Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Namhyung Kim Cc: Thomas Gleixner Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-perf-users@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- tools/include/uapi/linux/perf_event.h | 2 ++ tools/perf/util/branch.c | 4 +++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/lin= ux/perf_event.h index d37629dbad72..26d8f0b5ac0d 100644 --- a/tools/include/uapi/linux/perf_event.h +++ b/tools/include/uapi/linux/perf_event.h @@ -253,6 +253,8 @@ enum { PERF_BR_COND_RET =3D 10, /* conditional function return */ PERF_BR_ERET =3D 11, /* exception return */ PERF_BR_IRQ =3D 12, /* irq */ + PERF_BR_SERROR =3D 13, /* system error */ + PERF_BR_NO_TX =3D 14, /* not in transaction */ PERF_BR_MAX, }; =20 diff --git a/tools/perf/util/branch.c b/tools/perf/util/branch.c index a9a909db8cc7..abc673347bee 100644 --- a/tools/perf/util/branch.c +++ b/tools/perf/util/branch.c @@ -51,7 +51,9 @@ const char *branch_type_name(int type) "COND_CALL", "COND_RET", "ERET", - "IRQ" + "IRQ", + "SERROR", + "NO_TX" }; =20 if (type >=3D 0 && type < PERF_BR_MAX) --=20 2.25.1 From nobody Mon Apr 27 19:15:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBE0DC433EF for ; Fri, 10 Jun 2022 03:51:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346305AbiFJDvx (ORCPT ); Thu, 9 Jun 2022 23:51:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346282AbiFJDvu (ORCPT ); Thu, 9 Jun 2022 23:51:50 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id DC9E338AC93; Thu, 9 Jun 2022 20:51:48 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C28A01682; Thu, 9 Jun 2022 20:51:48 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.42.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7ED333F766; Thu, 9 Jun 2022 20:51:43 -0700 (PDT) From: Anshuman Khandual To: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, peterz@infradead.org, alexander.shishkin@linux.intel.com, jolsa@redhat.com, acme@kernel.org Cc: Anshuman Khandual , Robin Murphy , Suzuki Poulose , James Clark , Ingo Molnar , Mark Rutland , Namhyung Kim , Thomas Gleixner , Will Deacon , linux-arm-kernel@lists.infradead.org Subject: [PATCH V6 6/8] perf/tools: Extend branch type classification Date: Fri, 10 Jun 2022 09:20:59 +0530 Message-Id: <20220610035101.424112-7-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220610035101.424112-1-anshuman.khandual@arm.com> References: <20220610035101.424112-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This updates the perf tool with generic branch type classification with new ABI extender place holder i.e PERF_BR_EXTEND_ABI, the new 4 bit branch type field i.e perf_branch_entry.new_type, new generic page fault related branch types and some arch specific branch types as added earlier in the kernel. Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Arnaldo Carvalho de Melo Cc: Mark Rutland Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Namhyung Kim Cc: Thomas Gleixner Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-perf-users@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- tools/include/uapi/linux/perf_event.h | 16 ++++++++- tools/perf/builtin-script.c | 2 +- tools/perf/util/branch.c | 52 ++++++++++++++++++++++++++- tools/perf/util/branch.h | 6 +++- tools/perf/util/session.c | 2 +- 5 files changed, 73 insertions(+), 5 deletions(-) diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/lin= ux/perf_event.h index 26d8f0b5ac0d..d29280adc3c4 100644 --- a/tools/include/uapi/linux/perf_event.h +++ b/tools/include/uapi/linux/perf_event.h @@ -255,9 +255,22 @@ enum { PERF_BR_IRQ =3D 12, /* irq */ PERF_BR_SERROR =3D 13, /* system error */ PERF_BR_NO_TX =3D 14, /* not in transaction */ + PERF_BR_EXTEND_ABI =3D 15, /* extend ABI */ PERF_BR_MAX, }; =20 +enum { + PERF_BR_NEW_FAULT_ALGN =3D 0, /* Alignment fault */ + PERF_BR_NEW_FAULT_DATA =3D 1, /* Data fault */ + PERF_BR_NEW_FAULT_INST =3D 2, /* Inst fault */ + PERF_BR_NEW_ARCH_1 =3D 3, /* Architecture specific */ + PERF_BR_NEW_ARCH_2 =3D 4, /* Architecture specific */ + PERF_BR_NEW_ARCH_3 =3D 5, /* Architecture specific */ + PERF_BR_NEW_ARCH_4 =3D 6, /* Architecture specific */ + PERF_BR_NEW_ARCH_5 =3D 7, /* Architecture specific */ + PERF_BR_NEW_MAX, +}; + #define PERF_SAMPLE_BRANCH_PLM_ALL \ (PERF_SAMPLE_BRANCH_USER|\ PERF_SAMPLE_BRANCH_KERNEL|\ @@ -1372,7 +1385,8 @@ struct perf_branch_entry { abort:1, /* transaction abort */ cycles:16, /* cycle count to last branch */ type:4, /* branch type */ - reserved:40; + new_type:4, /* additional branch type */ + reserved:36; }; =20 union perf_sample_weight { diff --git a/tools/perf/builtin-script.c b/tools/perf/builtin-script.c index c689054002cc..d4d581230f23 100644 --- a/tools/perf/builtin-script.c +++ b/tools/perf/builtin-script.c @@ -866,7 +866,7 @@ static int print_bstack_flags(FILE *fp, struct branch_e= ntry *br) br->flags.in_tx ? 'X' : '-', br->flags.abort ? 'A' : '-', br->flags.cycles, - br->flags.type ? branch_type_name(br->flags.type) : "-"); + get_branch_type(br)); } =20 static int perf_sample__fprintf_brstack(struct perf_sample *sample, diff --git a/tools/perf/util/branch.c b/tools/perf/util/branch.c index abc673347bee..6d962b0a4532 100644 --- a/tools/perf/util/branch.c +++ b/tools/perf/util/branch.c @@ -21,7 +21,10 @@ void branch_type_count(struct branch_type_stat *st, stru= ct branch_flags *flags, if (flags->type =3D=3D PERF_BR_UNKNOWN || from =3D=3D 0) return; =20 - st->counts[flags->type]++; + if (flags->type =3D=3D PERF_BR_EXTEND_ABI) + st->new_counts[flags->new_type]++; + else + st->counts[flags->type]++; =20 if (flags->type =3D=3D PERF_BR_COND) { if (to > from) @@ -36,6 +39,25 @@ void branch_type_count(struct branch_type_stat *st, stru= ct branch_flags *flags, st->cross_4k++; } =20 +const char *branch_new_type_name(int new_type) +{ + const char *branch_new_names[PERF_BR_NEW_MAX] =3D { + "FAULT_ALGN", + "FAULT_DATA", + "FAULT_INST", + "ARCH_1", + "ARCH_2", + "ARCH_3", + "ARCH_4", + "ARCH_5" + }; + + if (new_type >=3D 0 && new_type < PERF_BR_NEW_MAX) + return branch_new_names[new_type]; + + return NULL; +} + const char *branch_type_name(int type) { const char *branch_names[PERF_BR_MAX] =3D { @@ -62,6 +84,17 @@ const char *branch_type_name(int type) return NULL; } =20 +const char *get_branch_type(struct branch_entry *e) +{ + if (e->flags.type =3D=3D PERF_BR_UNKNOWN) + return ""; + + if (e->flags.type =3D=3D PERF_BR_EXTEND_ABI) + return branch_new_type_name(e->flags.new_type); + + return branch_type_name(e->flags.type); +} + void branch_type_stat_display(FILE *fp, struct branch_type_stat *st) { u64 total =3D 0; @@ -108,6 +141,15 @@ void branch_type_stat_display(FILE *fp, struct branch_= type_stat *st) 100.0 * (double)st->counts[i] / (double)total); } + + for (i =3D 0; i < PERF_BR_NEW_MAX; i++) { + if (st->new_counts[i] > 0) + fprintf(fp, "\n%8s: %5.1f%%", + branch_new_type_name(i), + 100.0 * + (double)st->new_counts[i] / (double)total); + } + } =20 static int count_str_scnprintf(int idx, const char *str, char *bf, int siz= e) @@ -123,6 +165,9 @@ int branch_type_str(struct branch_type_stat *st, char *= bf, int size) for (i =3D 0; i < PERF_BR_MAX; i++) total +=3D st->counts[i]; =20 + for (i =3D 0; i < PERF_BR_NEW_MAX; i++) + total +=3D st->new_counts[i]; + if (total =3D=3D 0) return 0; =20 @@ -140,6 +185,11 @@ int branch_type_str(struct branch_type_stat *st, char = *bf, int size) printed +=3D count_str_scnprintf(j++, branch_type_name(i), bf + printed= , size - printed); } =20 + for (i =3D 0; i < PERF_BR_NEW_MAX; i++) { + if (st->new_counts[i] > 0) + printed +=3D count_str_scnprintf(j++, branch_new_type_name(i), bf + pri= nted, size - printed); + } + if (st->cross_4k > 0) printed +=3D count_str_scnprintf(j++, "CROSS_4K", bf + printed, size - p= rinted); =20 diff --git a/tools/perf/util/branch.h b/tools/perf/util/branch.h index 17b2ccc61094..8d251b35428a 100644 --- a/tools/perf/util/branch.h +++ b/tools/perf/util/branch.h @@ -24,7 +24,8 @@ struct branch_flags { u64 abort:1; u64 cycles:16; u64 type:4; - u64 reserved:40; + u64 new_type:4; + u64 reserved:36; }; }; }; @@ -72,6 +73,7 @@ static inline struct branch_entry *perf_sample__branch_en= tries(struct perf_sampl struct branch_type_stat { bool branch_to; u64 counts[PERF_BR_MAX]; + u64 new_counts[PERF_BR_NEW_MAX]; u64 cond_fwd; u64 cond_bwd; u64 cross_4k; @@ -82,6 +84,8 @@ void branch_type_count(struct branch_type_stat *st, struc= t branch_flags *flags, u64 from, u64 to); =20 const char *branch_type_name(int type); +const char *branch_new_type_name(int new_type); +const char *get_branch_type(struct branch_entry *e); void branch_type_stat_display(FILE *fp, struct branch_type_stat *st); int branch_type_str(struct branch_type_stat *st, char *bf, int bfsize); =20 diff --git a/tools/perf/util/session.c b/tools/perf/util/session.c index 0aa818977d2b..136fa03364ab 100644 --- a/tools/perf/util/session.c +++ b/tools/perf/util/session.c @@ -1178,7 +1178,7 @@ static void branch_stack__printf(struct perf_sample *= sample, bool callstack) e->flags.abort ? "A" : " ", e->flags.in_tx ? "T" : " ", (unsigned)e->flags.reserved, - e->flags.type ? branch_type_name(e->flags.type) : ""); + get_branch_type(e)); } else { if (i =3D=3D 0) { printf("..... %2"PRIu64": %016" PRIx64 "\n" --=20 2.25.1 From nobody Mon Apr 27 19:15:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5B6FCCA47C for ; Fri, 10 Jun 2022 03:52:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346307AbiFJDwC (ORCPT ); Thu, 9 Jun 2022 23:52:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346302AbiFJDvz (ORCPT ); Thu, 9 Jun 2022 23:51:55 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 4584738A976; Thu, 9 Jun 2022 20:51:54 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2CB391691; Thu, 9 Jun 2022 20:51:54 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.42.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2E4C73F766; Thu, 9 Jun 2022 20:51:48 -0700 (PDT) From: Anshuman Khandual To: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, peterz@infradead.org, alexander.shishkin@linux.intel.com, jolsa@redhat.com, acme@kernel.org Cc: Anshuman Khandual , Robin Murphy , Suzuki Poulose , James Clark , Ingo Molnar , Mark Rutland , Namhyung Kim , Thomas Gleixner , Will Deacon , linux-arm-kernel@lists.infradead.org Subject: [PATCH V6 7/8] perf/tools: Add branch privilege information request flag Date: Fri, 10 Jun 2022 09:21:00 +0530 Message-Id: <20220610035101.424112-8-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220610035101.424112-1-anshuman.khandual@arm.com> References: <20220610035101.424112-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This updates the perf tools with branch privilege information request flag i.e PERF_SAMPLE_BRANCH_PRIV_SAVE that has been added earlier in the kernel. This also updates 'perf record' documentation, branch_modes[], and generic branch privilege level enumeration as added earlier in the kernel. Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Arnaldo Carvalho de Melo Cc: Mark Rutland Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Namhyung Kim Cc: Thomas Gleixner Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-perf-users@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- tools/include/uapi/linux/perf_event.h | 14 +++++++++++++- tools/perf/Documentation/perf-record.txt | 1 + tools/perf/util/branch.h | 3 ++- tools/perf/util/parse-branch-options.c | 1 + tools/perf/util/perf_event_attr_fprintf.c | 2 +- 5 files changed, 18 insertions(+), 3 deletions(-) diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/lin= ux/perf_event.h index d29280adc3c4..193dba2ecdc1 100644 --- a/tools/include/uapi/linux/perf_event.h +++ b/tools/include/uapi/linux/perf_event.h @@ -204,6 +204,8 @@ enum perf_branch_sample_type_shift { =20 PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT =3D 17, /* save low level index of raw = branch records */ =20 + PERF_SAMPLE_BRANCH_PRIV_SAVE_SHIFT =3D 18, /* save privilege mode */ + PERF_SAMPLE_BRANCH_MAX_SHIFT /* non-ABI */ }; =20 @@ -233,6 +235,8 @@ enum perf_branch_sample_type { =20 PERF_SAMPLE_BRANCH_HW_INDEX =3D 1U << PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT, =20 + PERF_SAMPLE_BRANCH_PRIV_SAVE =3D 1U << PERF_SAMPLE_BRANCH_PRIV_SAVE_SHIFT, + PERF_SAMPLE_BRANCH_MAX =3D 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT, }; =20 @@ -271,6 +275,13 @@ enum { PERF_BR_NEW_MAX, }; =20 +enum { + PERF_BR_PRIV_UNKNOWN =3D 0, + PERF_BR_PRIV_USER =3D 1, + PERF_BR_PRIV_KERNEL =3D 2, + PERF_BR_PRIV_HV =3D 3, +}; + #define PERF_SAMPLE_BRANCH_PLM_ALL \ (PERF_SAMPLE_BRANCH_USER|\ PERF_SAMPLE_BRANCH_KERNEL|\ @@ -1386,7 +1397,8 @@ struct perf_branch_entry { cycles:16, /* cycle count to last branch */ type:4, /* branch type */ new_type:4, /* additional branch type */ - reserved:36; + priv:3, /* privilege level */ + reserved:33; }; =20 union perf_sample_weight { diff --git a/tools/perf/Documentation/perf-record.txt b/tools/perf/Document= ation/perf-record.txt index cf8ad50f3de1..addd40114a29 100644 --- a/tools/perf/Documentation/perf-record.txt +++ b/tools/perf/Documentation/perf-record.txt @@ -387,6 +387,7 @@ following filters are defined: - abort_tx: only when the target is a hardware transaction abort - cond: conditional branches - save_type: save branch type during sampling in case binary is not avail= able later + - priv: save privilege state during sampling in case binary is not availa= ble later =20 + The option requires at least one branch type among any, any_call, any_ret,= ind_call, cond. diff --git a/tools/perf/util/branch.h b/tools/perf/util/branch.h index 8d251b35428a..f838b23db180 100644 --- a/tools/perf/util/branch.h +++ b/tools/perf/util/branch.h @@ -25,7 +25,8 @@ struct branch_flags { u64 cycles:16; u64 type:4; u64 new_type:4; - u64 reserved:36; + u64 priv:3; + u64 reserved:33; }; }; }; diff --git a/tools/perf/util/parse-branch-options.c b/tools/perf/util/parse= -branch-options.c index bb4aa88c50a8..00588b9db474 100644 --- a/tools/perf/util/parse-branch-options.c +++ b/tools/perf/util/parse-branch-options.c @@ -32,6 +32,7 @@ static const struct branch_mode branch_modes[] =3D { BRANCH_OPT("call", PERF_SAMPLE_BRANCH_CALL), BRANCH_OPT("save_type", PERF_SAMPLE_BRANCH_TYPE_SAVE), BRANCH_OPT("stack", PERF_SAMPLE_BRANCH_CALL_STACK), + BRANCH_OPT("priv", PERF_SAMPLE_BRANCH_PRIV_SAVE), BRANCH_END }; =20 diff --git a/tools/perf/util/perf_event_attr_fprintf.c b/tools/perf/util/pe= rf_event_attr_fprintf.c index 98af3fa4ea35..4b0db27b7199 100644 --- a/tools/perf/util/perf_event_attr_fprintf.c +++ b/tools/perf/util/perf_event_attr_fprintf.c @@ -52,7 +52,7 @@ static void __p_branch_sample_type(char *buf, size_t size= , u64 value) bit_name(ABORT_TX), bit_name(IN_TX), bit_name(NO_TX), bit_name(COND), bit_name(CALL_STACK), bit_name(IND_JUMP), bit_name(CALL), bit_name(NO_FLAGS), bit_name(NO_CYCLES), - bit_name(TYPE_SAVE), bit_name(HW_INDEX), + bit_name(TYPE_SAVE), bit_name(HW_INDEX), bit_name(PRIV_SAVE), { .name =3D NULL, } }; #undef bit_name --=20 2.25.1 From nobody Mon Apr 27 19:15:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A87F3C433EF for ; Fri, 10 Jun 2022 03:52:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346314AbiFJDwJ (ORCPT ); Thu, 9 Jun 2022 23:52:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45424 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346310AbiFJDwA (ORCPT ); Thu, 9 Jun 2022 23:52:00 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 9EDFF38C084; Thu, 9 Jun 2022 20:51:59 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 85D841692; Thu, 9 Jun 2022 20:51:59 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.42.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8DD283F766; Thu, 9 Jun 2022 20:51:54 -0700 (PDT) From: Anshuman Khandual To: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, peterz@infradead.org, alexander.shishkin@linux.intel.com, jolsa@redhat.com, acme@kernel.org Cc: Anshuman Khandual , Robin Murphy , Suzuki Poulose , James Clark , Ingo Molnar , Mark Rutland , Namhyung Kim , Thomas Gleixner , Will Deacon , linux-arm-kernel@lists.infradead.org Subject: [PATCH V6 8/8] perf/tools: Add PERF_BR_NEW_ARCH_[N] map for BRBE on arm64 platform Date: Fri, 10 Jun 2022 09:21:01 +0530 Message-Id: <20220610035101.424112-9-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220610035101.424112-1-anshuman.khandual@arm.com> References: <20220610035101.424112-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This updates the perf tool with arch specific branch type classification used for BRBE on arm64 platform as added in the kernel earlier. Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Arnaldo Carvalho de Melo Cc: Mark Rutland Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Namhyung Kim Cc: Thomas Gleixner Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-perf-users@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- tools/include/uapi/linux/perf_event.h | 6 ++++++ tools/perf/util/branch.c | 13 +++++++++++++ 2 files changed, 19 insertions(+) diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/lin= ux/perf_event.h index 193dba2ecdc1..4cf1c8e22cab 100644 --- a/tools/include/uapi/linux/perf_event.h +++ b/tools/include/uapi/linux/perf_event.h @@ -282,6 +282,12 @@ enum { PERF_BR_PRIV_HV =3D 3, }; =20 +#define PERF_BR_ARM64_FIQ PERF_BR_NEW_ARCH_1 +#define PERF_BR_ARM64_DEBUG_HALT PERF_BR_NEW_ARCH_2 +#define PERF_BR_ARM64_DEBUG_EXIT PERF_BR_NEW_ARCH_3 +#define PERF_BR_ARM64_DEBUG_INST PERF_BR_NEW_ARCH_4 +#define PERF_BR_ARM64_DEBUG_DATA PERF_BR_NEW_ARCH_5 + #define PERF_SAMPLE_BRANCH_PLM_ALL \ (PERF_SAMPLE_BRANCH_USER|\ PERF_SAMPLE_BRANCH_KERNEL|\ diff --git a/tools/perf/util/branch.c b/tools/perf/util/branch.c index 6d962b0a4532..d40776c44b06 100644 --- a/tools/perf/util/branch.c +++ b/tools/perf/util/branch.c @@ -45,11 +45,24 @@ const char *branch_new_type_name(int new_type) "FAULT_ALGN", "FAULT_DATA", "FAULT_INST", +/* + * TODO: This switch should happen on 'session->header.env.arch' + * instead, because an arm64 platform perf recording could be + * opened for analysis on other platforms as well. + */ +#ifdef __aarch64__ + "ARM64_FIQ", + "ARM64_DEBUG_HALT", + "ARM64_DEBUG_EXIT", + "ARM64_DEBUG_INST", + "ARM64_DEBUG_DATA" +#else "ARCH_1", "ARCH_2", "ARCH_3", "ARCH_4", "ARCH_5" +#endif }; =20 if (new_type >=3D 0 && new_type < PERF_BR_NEW_MAX) --=20 2.25.1