From nobody Sun Sep 22 01:35:30 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CE49C43334 for ; Thu, 9 Jun 2022 11:23:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243731AbiFILXr (ORCPT ); Thu, 9 Jun 2022 07:23:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45830 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243564AbiFILXQ (ORCPT ); Thu, 9 Jun 2022 07:23:16 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5FD7C9D076; Thu, 9 Jun 2022 04:23:15 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 4970E66017DE; Thu, 9 Jun 2022 12:23:13 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1654773794; bh=WuVp9m47oyjyo3D3tPO/1kylTmjfohSx0q+3cGh+06U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CK7dkublgX9MuOdlRyzGs39pkn6s+SI1Nh8TzabermlqKyJysJlCxeYNtsoOIG4JF /eEbhkgnevY5rOUaW8bV82Jzz/5m0MCrKRekJsO3oalSjw7FuueuTyuLRunoB4QxIz hbfMIPJzK5Ff21fOBYSN0yBum462gZVpQpiit3w3woIQQJFR0k+Lr+aX4N2ICJ8RLz r7Dhh/Op6ClLT4VBF55pyqHeTaqE0U3Y3zd7JKSMTEGT5SJeCU0ThWSeTsD0XZ51aS x9sqv82SycC9TVFn3cEHlJFtJLY7hkXeyBavbaIjMVNQ6jDpOZHinA+bVkpxQcISol SCdJJ0zF4R1sg== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, kernel@collabora.com, AngeloGioacchino Del Regno Subject: [PATCH v2 06/10] arm64: dts: mediatek: mt6795: Remove incorrect fixed-clocks Date: Thu, 9 Jun 2022 13:22:59 +0200 Message-Id: <20220609112303.117928-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> References: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove the RTC and UART fixed clocks, as these were introduced to temporarily provide a dummy clock to devices: since the two 26M/32K fixed oscillators clocks (which do really exist in the SoC) have been added, there's no reason to keep the aforementioned (and now redundant) dummies in this devicetree. In order to remove the uart dummy clock, it was necessary to also reassign the clock of all UART nodes to clk26m. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 20 ++++---------------- 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index 7123c1bf8d9e..b6f7681cc151 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -162,18 +162,6 @@ system_clk: dummy13m { #clock-cells =3D <0>; }; =20 - rtc_clk: dummy32k { - compatible =3D "fixed-clock"; - clock-frequency =3D <32000>; - #clock-cells =3D <0>; - }; - - uart_clk: dummy26m { - compatible =3D "fixed-clock"; - clock-frequency =3D <26000000>; - #clock-cells =3D <0>; - }; - pmu { compatible =3D "arm,cortex-a53-pmu"; interrupts =3D , @@ -235,7 +223,7 @@ uart0: serial@11002000 { "mediatek,mt6577-uart"; reg =3D <0 0x11002000 0 0x400>; interrupts =3D ; - clocks =3D <&uart_clk>; + clocks =3D <&clk26m>; status =3D "disabled"; }; =20 @@ -244,7 +232,7 @@ uart1: serial@11003000 { "mediatek,mt6577-uart"; reg =3D <0 0x11003000 0 0x400>; interrupts =3D ; - clocks =3D <&uart_clk>; + clocks =3D <&clk26m>; status =3D "disabled"; }; =20 @@ -253,7 +241,7 @@ uart2: serial@11004000 { "mediatek,mt6577-uart"; reg =3D <0 0x11004000 0 0x400>; interrupts =3D ; - clocks =3D <&uart_clk>; + clocks =3D <&clk26m>; status =3D "disabled"; }; =20 @@ -262,7 +250,7 @@ uart3: serial@11005000 { "mediatek,mt6577-uart"; reg =3D <0 0x11005000 0 0x400>; interrupts =3D ; - clocks =3D <&uart_clk>; + clocks =3D <&clk26m>; status =3D "disabled"; }; }; --=20 2.35.1