From nobody Sat Sep 21 23:36:46 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47D03C433EF for ; Thu, 9 Jun 2022 11:23:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243574AbiFILXT (ORCPT ); Thu, 9 Jun 2022 07:23:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243512AbiFILXN (ORCPT ); Thu, 9 Jun 2022 07:23:13 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0316884A2C; Thu, 9 Jun 2022 04:23:11 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id B9E8D66017C9; Thu, 9 Jun 2022 12:23:08 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1654773789; bh=BzU2sp5uWjhJVZc+Pbqb4F7Rd9WBetm2NBJji/SvJBY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bz5vhmF1Y531BltL8wLWNs23X4odbGrcHRtG8SI8DJFGEkmoec7IyE1m6R3bOYM5a sR54DiZ9U+6IvkH3mTKJfO2ql0PJdAV0IV9MPv/wRZ+qB3tSCtiMa7GKip1cK9OXx8 9OLmpH/wh3xtvfGksl62D9Vjv0qzK9EM2LhgBcSeIaLZro1l7PhQxJ9VRK+BAmwPTf SFQO+wwYrVHUUyIQ4ITKiTzSqxcEyBttlHfyw4Bif6zaq7NHPqKMVrmdFo5GQmIq0N dlG0B7K6YRHk2Uo38lCxAolvwOBpXsjTCsCGVDXWMGy7QqOz1gTRwUScXGlIWBnSCp acOquf7Xzl9Sw== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, kernel@collabora.com, AngeloGioacchino Del Regno Subject: [PATCH v2 01/10] arm64: dts: mediatek: mt6795: Create soc bus node and move mmio devices Date: Thu, 9 Jun 2022 13:22:54 +0200 Message-Id: <20220609112303.117928-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> References: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" MMIO devices should be inside of a soc bus node, as it's done for the vast majority of ARM64 devicetrees, and for almost all MTK devicetrees. Create a simple-bus soc node and move all devices with a MMIO address space in there. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 105 ++++++++++++----------- 1 file changed, 56 insertions(+), 49 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index c85659d0ff5d..167f90bd991a 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -117,59 +117,66 @@ timer { (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; }; =20 - sysirq: intpol-controller@10200620 { - compatible =3D "mediatek,mt6795-sysirq", - "mediatek,mt6577-sysirq"; - interrupt-controller; - #interrupt-cells =3D <3>; - interrupt-parent =3D <&gic>; - reg =3D <0 0x10200620 0 0x20>; - }; + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + compatible =3D "simple-bus"; + ranges; + + sysirq: intpol-controller@10200620 { + compatible =3D "mediatek,mt6795-sysirq", + "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells =3D <3>; + interrupt-parent =3D <&gic>; + reg =3D <0 0x10200620 0 0x20>; + }; =20 - gic: interrupt-controller@10221000 { - compatible =3D "arm,gic-400"; - #interrupt-cells =3D <3>; - interrupt-parent =3D <&gic>; - interrupt-controller; - reg =3D <0 0x10221000 0 0x1000>, - <0 0x10222000 0 0x2000>, - <0 0x10224000 0 0x2000>, - <0 0x10226000 0 0x2000>; - }; + gic: interrupt-controller@10221000 { + compatible =3D "arm,gic-400"; + #interrupt-cells =3D <3>; + interrupt-parent =3D <&gic>; + interrupt-controller; + reg =3D <0 0x10221000 0 0x1000>, + <0 0x10222000 0 0x2000>, + <0 0x10224000 0 0x2000>, + <0 0x10226000 0 0x2000>; + }; =20 - uart0: serial@11002000 { - compatible =3D "mediatek,mt6795-uart", - "mediatek,mt6577-uart"; - reg =3D <0 0x11002000 0 0x400>; - interrupts =3D ; - clocks =3D <&uart_clk>; - status =3D "disabled"; - }; + uart0: serial@11002000 { + compatible =3D "mediatek,mt6795-uart", + "mediatek,mt6577-uart"; + reg =3D <0 0x11002000 0 0x400>; + interrupts =3D ; + clocks =3D <&uart_clk>; + status =3D "disabled"; + }; =20 - uart1: serial@11003000 { - compatible =3D "mediatek,mt6795-uart", - "mediatek,mt6577-uart"; - reg =3D <0 0x11003000 0 0x400>; - interrupts =3D ; - clocks =3D <&uart_clk>; - status =3D "disabled"; - }; + uart1: serial@11003000 { + compatible =3D "mediatek,mt6795-uart", + "mediatek,mt6577-uart"; + reg =3D <0 0x11003000 0 0x400>; + interrupts =3D ; + clocks =3D <&uart_clk>; + status =3D "disabled"; + }; =20 - uart2: serial@11004000 { - compatible =3D "mediatek,mt6795-uart", - "mediatek,mt6577-uart"; - reg =3D <0 0x11004000 0 0x400>; - interrupts =3D ; - clocks =3D <&uart_clk>; - status =3D "disabled"; - }; + uart2: serial@11004000 { + compatible =3D "mediatek,mt6795-uart", + "mediatek,mt6577-uart"; + reg =3D <0 0x11004000 0 0x400>; + interrupts =3D ; + clocks =3D <&uart_clk>; + status =3D "disabled"; + }; =20 - uart3: serial@11005000 { - compatible =3D "mediatek,mt6795-uart", - "mediatek,mt6577-uart"; - reg =3D <0 0x11005000 0 0x400>; - interrupts =3D ; - clocks =3D <&uart_clk>; - status =3D "disabled"; + uart3: serial@11005000 { + compatible =3D "mediatek,mt6795-uart", + "mediatek,mt6577-uart"; + reg =3D <0 0x11005000 0 0x400>; + interrupts =3D ; + clocks =3D <&uart_clk>; + status =3D "disabled"; + }; }; }; --=20 2.35.1 From nobody Sat Sep 21 23:36:46 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C4D5C433EF for ; Thu, 9 Jun 2022 11:25:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243707AbiFILX3 (ORCPT ); Thu, 9 Jun 2022 07:23:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243517AbiFILXN (ORCPT ); Thu, 9 Jun 2022 07:23:13 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD301C1EDD; Thu, 9 Jun 2022 04:23:11 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id A188B66017CB; Thu, 9 Jun 2022 12:23:09 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1654773790; bh=6b5Fn00QFN3S8pk3LiXp3oowU6+YetKGNFXGTWU1NeQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gbQJ9zbuPxPKTT7q3eU227g6oIEkx67WfDTehPGu0ahrJiFRpwnXwna+F/oZ3Trxp 29wyf5ywNX0PTB5eosLv/tW5/oUu2axA5eowmKllKV+01cvAohdKHvxHe1jcdwJyXc IjSQNspArFVk4HhDH38hoisHRw6CdaU+5q9jmW7GpWRlD3C83N/6QReLfnE8mjD/zN f9xRU23cPvduQO8CNpCtXLaVc+MXEtk/o9LK8IG+TCidx9TwIvluLsM8yi3ffllVdk b5FfiR69AQqePQWP+5ESsm9f7j7LhVp/aWn9AYbkcTe3D+I9aq6I+L5KMKe9QEX4gJ mK+ltmDoiIUag== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, kernel@collabora.com, AngeloGioacchino Del Regno Subject: [PATCH v2 02/10] arm64: dts: mediatek: mt6795: Add cpu-map and L2 cache Date: Thu, 9 Jun 2022 13:22:55 +0200 Message-Id: <20220609112303.117928-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> References: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This SoC is HMP and has two clusters with four Cortex-A53 cores each: declare a cpu map and, while at it, also add the next-level-cache properties. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 56 ++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index 167f90bd991a..1456b9035336 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -34,6 +34,7 @@ cpu0: cpu@0 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x000>; + next-level-cache =3D <&l2_0>; }; =20 cpu1: cpu@1 { @@ -41,6 +42,7 @@ cpu1: cpu@1 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x001>; + next-level-cache =3D <&l2_0>; }; =20 cpu2: cpu@2 { @@ -48,6 +50,7 @@ cpu2: cpu@2 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x002>; + next-level-cache =3D <&l2_0>; }; =20 cpu3: cpu@3 { @@ -55,6 +58,7 @@ cpu3: cpu@3 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x003>; + next-level-cache =3D <&l2_0>; }; =20 cpu4: cpu@100 { @@ -62,6 +66,7 @@ cpu4: cpu@100 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x100>; + next-level-cache =3D <&l2_1>; }; =20 cpu5: cpu@101 { @@ -69,6 +74,7 @@ cpu5: cpu@101 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x101>; + next-level-cache =3D <&l2_1>; }; =20 cpu6: cpu@102 { @@ -76,6 +82,7 @@ cpu6: cpu@102 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x102>; + next-level-cache =3D <&l2_1>; }; =20 cpu7: cpu@103 { @@ -83,6 +90,55 @@ cpu7: cpu@103 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x103>; + next-level-cache =3D <&l2_1>; + }; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu0>; + }; + + core1 { + cpu =3D <&cpu1>; + }; + + core2 { + cpu =3D <&cpu2>; + }; + + core3 { + cpu =3D <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu4>; + }; + + core1 { + cpu =3D <&cpu5>; + }; + + core2 { + cpu =3D <&cpu6>; + }; + + core3 { + cpu =3D <&cpu7>; + }; + }; + }; + + l2_0: l2-cache0 { + compatible =3D "cache"; + cache-level =3D <2>; + }; + + l2_1: l2-cache1 { + compatible =3D "cache"; + cache-level =3D <2>; }; }; =20 --=20 2.35.1 From nobody Sat Sep 21 23:36:46 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B4C0CCA480 for ; Thu, 9 Jun 2022 11:23:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243655AbiFILX0 (ORCPT ); Thu, 9 Jun 2022 07:23:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45634 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243520AbiFILXN (ORCPT ); Thu, 9 Jun 2022 07:23:13 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72B329D076; Thu, 9 Jun 2022 04:23:12 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 8A23166017CF; Thu, 9 Jun 2022 12:23:10 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1654773791; bh=+SNQosugZ3rRLzeC91179/d1xD7fpoErRAwb547pmRM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=S7KJDmw4QBP9Uj7VYNzil/QC22SlwfQosv38ZlTcKF1fTNbCdGJMtdM/XXAuS42cx tkber570qlmPd1KgxxeLT57PuZ8dSLaYH/b3G8r8eR3sEXxnnnqiHZasnsC4wosbKB qoPhN1SF9UYkrT/XjkdACqiXVpAOEhWQhS9W7BJUrHT1dH2u0qn93Rq8LOjBAuZtNk iD0qXVvBuFebozm+R/4ydMZygTpqkCRAGLtcFOQYRhe7Kt1VEvwpv4D7MAfb+c2fmT ZfDgTHfbhQZBDJGYky2Tgl4OTWys0UseWYN8K32Ktx0q3hSRZ+RSQT8T7UcsXJyjeU gMZ73MX2uQ+tw== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, kernel@collabora.com, AngeloGioacchino Del Regno Subject: [PATCH v2 03/10] arm64: dts: mediatek: mt6795: Add Cortex A53 PMU nodes Date: Thu, 9 Jun 2022 13:22:56 +0200 Message-Id: <20220609112303.117928-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> References: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the required nodes to enable the PMU on this SoC. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index 1456b9035336..639104b3f693 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -160,6 +160,15 @@ uart_clk: dummy26m { #clock-cells =3D <0>; }; =20 + pmu { + compatible =3D "arm,cortex-a53-pmu"; + interrupts =3D , + , + , + ; + interrupt-affinity =3D <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + timer { compatible =3D "arm,armv8-timer"; interrupt-parent =3D <&gic>; --=20 2.35.1 From nobody Sat Sep 21 23:36:46 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09CDECCA473 for ; Thu, 9 Jun 2022 11:23:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243584AbiFILXj (ORCPT ); Thu, 9 Jun 2022 07:23:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231712AbiFILXO (ORCPT ); Thu, 9 Jun 2022 07:23:14 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BF8FF0708; Thu, 9 Jun 2022 04:23:13 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 745DD66017D4; Thu, 9 Jun 2022 12:23:11 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1654773792; bh=a4rg/JyrfKEPVSNVifJkG8mIf7X7Pe0ajY4dp1vpzts=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cjUzNuyMK/20GfbAc/y72h7+fAwkNXNVsq/OGwPUZo/9PWwiDnKghTypqicng8F9V zOJtHMkFUOUIOmJFMR8t/XDtAE5XJzpmpcvUWd5mskK5v1eDN3rTflqXt5DH7Uo8WE S5t9wMVNuZq8cpsQKF74uGhb8LALAjnJNMtBTjpWAUWhF0hMqdBddyVK9hpk4L+lYZ vg9TsWac7trd+76Ti0b/cae83y/nvR9OOX4G9pi2l9SBw1ICfLxb2aVo7U/y1xCY3e SpiCjCrQ3/i7sLiNx9OIEJV3y3nxlvN99lYyiQFLveZ4ba9Pm5kqFskiemmPB7/3RL psXJSX4t1NqHw== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, kernel@collabora.com, AngeloGioacchino Del Regno Subject: [PATCH v2 04/10] arm64: dts: mediatek: mt6795: Add watchdog node to avoid timeouts Date: Thu, 9 Jun 2022 13:22:57 +0200 Message-Id: <20220609112303.117928-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> References: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" At least on commercial devices like some smartphones, the bootloader will initialize the SoC watchdog and set it to reboot the board when it times out. The last pet that this watchdog is getting is right before booting the kernel and left it enabled as a protection against boot failure: this means that Linux is expected to initialize this device and pet as soon as possible, or it will bark and reset the AP. In order to prevent that, add the required watchdog node as default enabled: this will have no side effects on boards that are not performing the aforementioned watchdog setup before booting Linux. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index 639104b3f693..363fa25b4edc 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -188,6 +188,14 @@ soc { compatible =3D "simple-bus"; ranges; =20 + watchdog: watchdog@10007000 { + compatible =3D "mediatek,mt6795-wdt"; + reg =3D <0 0x10007000 0 0x100>; + interrupts =3D ; + #reset-cells =3D <1>; + timeout-sec =3D <20>; + }; + sysirq: intpol-controller@10200620 { compatible =3D "mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq"; --=20 2.35.1 From nobody Sat Sep 21 23:36:46 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12CF4C433EF for ; Thu, 9 Jun 2022 11:23:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243589AbiFILXn (ORCPT ); Thu, 9 Jun 2022 07:23:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243549AbiFILXP (ORCPT ); Thu, 9 Jun 2022 07:23:15 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4257D11CA10; Thu, 9 Jun 2022 04:23:14 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6041E66017CC; Thu, 9 Jun 2022 12:23:12 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1654773793; bh=NJSwSw76l8UspZAF7umM1X1OBA6724M67znvWvKVr0Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Sa3aGIYKFhYL1kmiz71MFEmJCd0hHSu21kud2qXv2L/prEAZ4gqLbV4A9BZEwYWKR hvDTGcjNb3guYyydWHJYEs+peCAvDhsAfulmjLLIt2+fis6wsncFuwKILbtC4Tfpv3 7h57GMe4PoM8uHl5CLOkJzBU4r/1Ppno4Xj6MCJhrM35FNHkMDDjQHo/T3lfxIUze+ bkGOqN/vKbauCbn9KUqFowTdBQSP1USbbM3u9tzVvCmrXE1XgvkdpTTz8Hw7ZqxGCp UKPCOxxvlTJ0EHHn9zKwXW3HFeEt1MQRjJSrb9g0f9OPyJobwzLS0uP2LarbUaH7hB fwXWGZbN7k7Jg== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, kernel@collabora.com, AngeloGioacchino Del Regno Subject: [PATCH v2 05/10] arm64: dts: mediatek: mt6795: Add fixed clocks for 32kHz and 26MHz XOs Date: Thu, 9 Jun 2022 13:22:58 +0200 Message-Id: <20220609112303.117928-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> References: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the 32kHz and 26MHz oscillators as fixed clocks in devicetree to provide a good initial clock spec, since this SoC features two always on oscillators running at the aforementioned frequencies. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index 363fa25b4edc..7123c1bf8d9e 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -142,6 +142,20 @@ l2_1: l2-cache1 { }; }; =20 + clk26m: oscillator-26m { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <26000000>; + clock-output-names =3D "clk26m"; + }; + + clk32k: oscillator-32k { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <32000>; + clock-output-names =3D "clk32k"; + }; + system_clk: dummy13m { compatible =3D "fixed-clock"; clock-frequency =3D <13000000>; --=20 2.35.1 From nobody Sat Sep 21 23:36:46 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CE49C43334 for ; Thu, 9 Jun 2022 11:23:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243731AbiFILXr (ORCPT ); Thu, 9 Jun 2022 07:23:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45830 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243564AbiFILXQ (ORCPT ); Thu, 9 Jun 2022 07:23:16 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5FD7C9D076; Thu, 9 Jun 2022 04:23:15 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 4970E66017DE; Thu, 9 Jun 2022 12:23:13 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1654773794; bh=WuVp9m47oyjyo3D3tPO/1kylTmjfohSx0q+3cGh+06U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CK7dkublgX9MuOdlRyzGs39pkn6s+SI1Nh8TzabermlqKyJysJlCxeYNtsoOIG4JF /eEbhkgnevY5rOUaW8bV82Jzz/5m0MCrKRekJsO3oalSjw7FuueuTyuLRunoB4QxIz hbfMIPJzK5Ff21fOBYSN0yBum462gZVpQpiit3w3woIQQJFR0k+Lr+aX4N2ICJ8RLz r7Dhh/Op6ClLT4VBF55pyqHeTaqE0U3Y3zd7JKSMTEGT5SJeCU0ThWSeTsD0XZ51aS x9sqv82SycC9TVFn3cEHlJFtJLY7hkXeyBavbaIjMVNQ6jDpOZHinA+bVkpxQcISol SCdJJ0zF4R1sg== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, kernel@collabora.com, AngeloGioacchino Del Regno Subject: [PATCH v2 06/10] arm64: dts: mediatek: mt6795: Remove incorrect fixed-clocks Date: Thu, 9 Jun 2022 13:22:59 +0200 Message-Id: <20220609112303.117928-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> References: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove the RTC and UART fixed clocks, as these were introduced to temporarily provide a dummy clock to devices: since the two 26M/32K fixed oscillators clocks (which do really exist in the SoC) have been added, there's no reason to keep the aforementioned (and now redundant) dummies in this devicetree. In order to remove the uart dummy clock, it was necessary to also reassign the clock of all UART nodes to clk26m. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 20 ++++---------------- 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index 7123c1bf8d9e..b6f7681cc151 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -162,18 +162,6 @@ system_clk: dummy13m { #clock-cells =3D <0>; }; =20 - rtc_clk: dummy32k { - compatible =3D "fixed-clock"; - clock-frequency =3D <32000>; - #clock-cells =3D <0>; - }; - - uart_clk: dummy26m { - compatible =3D "fixed-clock"; - clock-frequency =3D <26000000>; - #clock-cells =3D <0>; - }; - pmu { compatible =3D "arm,cortex-a53-pmu"; interrupts =3D , @@ -235,7 +223,7 @@ uart0: serial@11002000 { "mediatek,mt6577-uart"; reg =3D <0 0x11002000 0 0x400>; interrupts =3D ; - clocks =3D <&uart_clk>; + clocks =3D <&clk26m>; status =3D "disabled"; }; =20 @@ -244,7 +232,7 @@ uart1: serial@11003000 { "mediatek,mt6577-uart"; reg =3D <0 0x11003000 0 0x400>; interrupts =3D ; - clocks =3D <&uart_clk>; + clocks =3D <&clk26m>; status =3D "disabled"; }; =20 @@ -253,7 +241,7 @@ uart2: serial@11004000 { "mediatek,mt6577-uart"; reg =3D <0 0x11004000 0 0x400>; interrupts =3D ; - clocks =3D <&uart_clk>; + clocks =3D <&clk26m>; status =3D "disabled"; }; =20 @@ -262,7 +250,7 @@ uart3: serial@11005000 { "mediatek,mt6577-uart"; reg =3D <0 0x11005000 0 0x400>; interrupts =3D ; - clocks =3D <&uart_clk>; + clocks =3D <&clk26m>; status =3D "disabled"; }; }; --=20 2.35.1 From nobody Sat Sep 21 23:36:46 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DDF96C43334 for ; Thu, 9 Jun 2022 11:23:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243677AbiFILXu (ORCPT ); Thu, 9 Jun 2022 07:23:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45934 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243568AbiFILXR (ORCPT ); Thu, 9 Jun 2022 07:23:17 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2896714AF57; Thu, 9 Jun 2022 04:23:16 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 3AD3866017CB; Thu, 9 Jun 2022 12:23:14 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1654773795; bh=bX8kZUebSBXb8b4ayhewUrKLvLfjaP3abnUzIjQpOJE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dcf0tVja6OFi/B4kwvc/z00sqwC0BpLerzg+3dFvMs27S6yMh+SJVQJUK3a/aH1hs qZvI5DY1DWuotr+5pmiEZpQG/cjFhzJKjkMK+6kp2at0glcndHhHMGpIhnrm89uhDS X6FiS4cLVthH5chFmgviVHaGaWwisWwsBxWutPUGX6vOure4V68SR4CuxZ6tGWR1pP bylxGfdFy+xG0Ti62ZZiFQMhk7CfbbNqi22iVXm0Mto+6CUoTCWk4+RbqFGWEFrDTH 0FZ6skMxWC+YkRojHKdXadsKxmLMlfnUw/x6rKzQ1/IoqK3KUPuQ2mGDgL4ROd7nXc 8aikxxmjTA/xA== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, kernel@collabora.com, AngeloGioacchino Del Regno Subject: [PATCH v2 07/10] arm64: dts: mediatek: mt6795: Add general purpose timer node Date: Thu, 9 Jun 2022 13:23:00 +0200 Message-Id: <20220609112303.117928-8-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> References: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the timer node, enabling two GPTs, of which one will be used as sched_clock. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index b6f7681cc151..217d99621558 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -198,6 +198,14 @@ watchdog: watchdog@10007000 { timeout-sec =3D <20>; }; =20 + timer: timer@10008000 { + compatible =3D "mediatek,mt6795-timer", + "mediatek,mt6577-timer"; + reg =3D <0 0x10008000 0 0x1000>; + interrupts =3D ; + clocks =3D <&system_clk>, <&clk32k>; + }; + sysirq: intpol-controller@10200620 { compatible =3D "mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq"; --=20 2.35.1 From nobody Sat Sep 21 23:36:46 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 599B7C433EF for ; Thu, 9 Jun 2022 11:24:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243820AbiFILYJ (ORCPT ); Thu, 9 Jun 2022 07:24:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45830 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243588AbiFILXT (ORCPT ); Thu, 9 Jun 2022 07:23:19 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5144B15E4AC; Thu, 9 Jun 2022 04:23:17 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 242DF66017E1; Thu, 9 Jun 2022 12:23:15 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1654773795; bh=u2SRqTpnqi7EaYL6hrMeHhetZF1DSjSsk+5BaLSaDYU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SM57X/MrN9GrbDpuAEoY1Gm2pdZTmIAmmDs7NEphHYS3vh17uofGRJQO8E1I/u+Jh a2VlTrIk6MXtUNLUK4060Vh84W9ztgzITm5HMifGnjBhVmCQWIzn06jbzzNNA/73TP /5+SzKAP8bZe9PehjknKUuLbjJNy3M+GYYsDGRGHm9qfDEzi3ukICNI+9ldl5kymHK lVIPCRL3BMvUSa6wMUAk8H4CC2u5waTxj/weCJ0bCb666baCLec6j5MhCmUhJjuT0o 3WoWmbe0twZ4ItHZ+ECimsI3rPG1XXgBMb8x26recK7yyeWdTe+41MDaB09gC2kXAw kbX7ULA4KxZ+A== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, kernel@collabora.com, AngeloGioacchino Del Regno Subject: [PATCH v2 08/10] arm64: dts: mediatek: mt6795: Add ARM CCI-400 node and assign to CPUs Date: Thu, 9 Jun 2022 13:23:01 +0200 Message-Id: <20220609112303.117928-9-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> References: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This SoC features an ARM CCI-400 IP: add the required node and assign the cci control ports to the CPU cores. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 44 ++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index 217d99621558..db1f24b3b9a9 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -34,6 +34,7 @@ cpu0: cpu@0 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x000>; + cci-control-port =3D <&cci_control2>; next-level-cache =3D <&l2_0>; }; =20 @@ -42,6 +43,7 @@ cpu1: cpu@1 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x001>; + cci-control-port =3D <&cci_control2>; next-level-cache =3D <&l2_0>; }; =20 @@ -50,6 +52,7 @@ cpu2: cpu@2 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x002>; + cci-control-port =3D <&cci_control2>; next-level-cache =3D <&l2_0>; }; =20 @@ -58,6 +61,7 @@ cpu3: cpu@3 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x003>; + cci-control-port =3D <&cci_control2>; next-level-cache =3D <&l2_0>; }; =20 @@ -66,6 +70,7 @@ cpu4: cpu@100 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x100>; + cci-control-port =3D <&cci_control1>; next-level-cache =3D <&l2_1>; }; =20 @@ -74,6 +79,7 @@ cpu5: cpu@101 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x101>; + cci-control-port =3D <&cci_control1>; next-level-cache =3D <&l2_1>; }; =20 @@ -82,6 +88,7 @@ cpu6: cpu@102 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x102>; + cci-control-port =3D <&cci_control1>; next-level-cache =3D <&l2_1>; }; =20 @@ -90,6 +97,7 @@ cpu7: cpu@103 { compatible =3D "arm,cortex-a53"; enable-method =3D "psci"; reg =3D <0x103>; + cci-control-port =3D <&cci_control1>; next-level-cache =3D <&l2_1>; }; =20 @@ -226,6 +234,42 @@ gic: interrupt-controller@10221000 { <0 0x10226000 0 0x2000>; }; =20 + cci: cci@10390000 { + compatible =3D "arm,cci-400"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0 0x10390000 0 0x1000>; + ranges =3D <0 0 0x10390000 0x10000>; + + cci_control0: slave-if@1000 { + compatible =3D "arm,cci-400-ctrl-if"; + interface-type =3D "ace-lite"; + reg =3D <0x1000 0x1000>; + }; + + cci_control1: slave-if@4000 { + compatible =3D "arm,cci-400-ctrl-if"; + interface-type =3D "ace"; + reg =3D <0x4000 0x1000>; + }; + + cci_control2: slave-if@5000 { + compatible =3D "arm,cci-400-ctrl-if"; + interface-type =3D "ace"; + reg =3D <0x5000 0x1000>; + }; + + pmu@9000 { + compatible =3D "arm,cci-400-pmu,r1"; + reg =3D <0x9000 0x5000>; + interrupts =3D , + , + , + , + ; + }; + }; + uart0: serial@11002000 { compatible =3D "mediatek,mt6795-uart", "mediatek,mt6577-uart"; --=20 2.35.1 From nobody Sat Sep 21 23:36:46 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36AD3C43334 for ; Thu, 9 Jun 2022 11:24:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243616AbiFILYE (ORCPT ); Thu, 9 Jun 2022 07:24:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243596AbiFILXU (ORCPT ); Thu, 9 Jun 2022 07:23:20 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3EC6317D39F; Thu, 9 Jun 2022 04:23:18 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 0DD1C66017D9; Thu, 9 Jun 2022 12:23:16 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1654773796; bh=GnHMwvr2PGLR5LnLK/1iIyzgGmJgc+VanVTE3O2+b9w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NU2GGvfsDHSfrMIg27Q7f7HV7XK1TPBAhm2miP0l7eER6HU2/tUBOR6S8ixsH20V5 3EKkoKME/czKHjO0ezkxQ8IwetM+XCtdPtZskM+n3WMkSPQpKHBeaGGoXwSZELf4yd eS/s1E8FDN3UT+Q3fnzZNGGGbktGK39/e3Lqm5o9w7GBmXdNIp1F/8Qy9/ODlSSSfL vov1k22hcu6EcWYjAndIvs9ck5smjmVb35E3nb3D4SUWBRZ7r61nKrQm1CmYQ3gbx5 17zRZzu4AEVmsx3/qXG0N3cxntgLexPI0PP7uikJjrI1OA4wgXju/5/XhX/OHNQ0EE wig6+WxUx8tEA== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, kernel@collabora.com, AngeloGioacchino Del Regno Subject: [PATCH v2 09/10] arm64: dts: mediatek: mt6795: Add pinctrl controller node Date: Thu, 9 Jun 2022 13:23:02 +0200 Message-Id: <20220609112303.117928-10-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> References: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a node for the pinctrl controller found on MT6795 but without configuration for any pin, as that's expected to be done in the machine-specific devicetrees. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index db1f24b3b9a9..f52800e287ab 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -13,6 +13,7 @@ =20 #include #include +#include =20 / { compatible =3D "mediatek,mt6795"; @@ -198,6 +199,19 @@ soc { compatible =3D "simple-bus"; ranges; =20 + pio: pinctrl@10005000 { + compatible =3D "mediatek,mt6795-pinctrl"; + reg =3D <0 0x10005000 0 0x1000>, <0 0x1000b000 0 0x1000>; + reg-names =3D "base", "eint"; + interrupts =3D , + ; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pio 0 0 196>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + watchdog: watchdog@10007000 { compatible =3D "mediatek,mt6795-wdt"; reg =3D <0 0x10007000 0 0x100>; --=20 2.35.1 From nobody Sat Sep 21 23:36:46 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55730C433EF for ; Thu, 9 Jun 2022 11:23:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243726AbiFILX4 (ORCPT ); Thu, 9 Jun 2022 07:23:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46084 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243597AbiFILXU (ORCPT ); Thu, 9 Jun 2022 07:23:20 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB40A191420; Thu, 9 Jun 2022 04:23:18 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id EAB4366017DA; Thu, 9 Jun 2022 12:23:16 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1654773797; bh=anrmzD+t/qVGkb+sXMtzx5Tb0qXyjpZIloaFJGDHMDQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KRjmrjOo76qrWUeoSIFEZ/k+0evvk/sWJUZXzutKJLAnMF/R35VRRPVNpmgHM2Kek HSxDO6ki1/D57i6R5mInVVuOtAI/GSJpnHXPq+ciP8fzp9MyPmBPPj0GieoO5DGOPb CCzFLdklOu9NcatZSPYpFg5hgSZAruVDRPTbj21X6yBsiBHYR88tu4wQ4axVAcdJOM M9WYcRrzxbczJDixAiOsuUjrrkQtsukC38YfcWnJvIDuZnFtP0ViO/hSddIRNfikgR yQA9NYcmTF/hDvpeJFDNUcr1cVxcm8bJrDClWkQRWfiey+V1ZHqlGad3/YGLlJk8bT V2yupPBZjq+Rw== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, kernel@collabora.com, AngeloGioacchino Del Regno Subject: [PATCH v2 10/10] arm64: dts: mediatek: mt6795: Specify interrupts for vGIC Date: Thu, 9 Jun 2022 13:23:03 +0200 Message-Id: <20220609112303.117928-11-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> References: <20220609112303.117928-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the maintenance interrupt for GIC-400. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts= /mediatek/mt6795.dtsi index f52800e287ab..d3bce9429e9b 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -246,6 +246,8 @@ gic: interrupt-controller@10221000 { <0 0x10222000 0 0x2000>, <0 0x10224000 0 0x2000>, <0 0x10226000 0 0x2000>; + interrupts =3D ; }; =20 cci: cci@10390000 { --=20 2.35.1