From nobody Sat Sep 21 23:30:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BED54C433EF for ; Mon, 30 May 2022 09:10:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234684AbiE3JKK (ORCPT ); Mon, 30 May 2022 05:10:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234746AbiE3JKC (ORCPT ); Mon, 30 May 2022 05:10:02 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60C9278EFF; Mon, 30 May 2022 02:10:01 -0700 (PDT) X-UUID: 0fbd74dc37fe493694fda1c5eb33a9cf-20220530 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5,REQID:451ddfd5-8631-4f57-8aed-d4c1d2ea9557,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,RULE:Release_Ham,AC TION:release,TS:100 X-CID-INFO: VERSION:1.1.5,REQID:451ddfd5-8631-4f57-8aed-d4c1d2ea9557,OB:0,LOB: 0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,RULE:Spam_GS981B3D,AC TION:quarantine,TS:100 X-CID-META: VersionHash:2a19b09,CLOUDID:badec3b8-3c45-407b-8f66-25095432a27a,C OID:cdbde5112185,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,QS:0,BEC:nil X-UUID: 0fbd74dc37fe493694fda1c5eb33a9cf-20220530 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 210577012; Mon, 30 May 2022 17:09:55 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Mon, 30 May 2022 17:09:54 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 30 May 2022 17:09:54 +0800 From: Peter Chiu To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger CC: , Ryder Lee , "Evelyn Tsai" , Sam Shih , , , , Peter Chiu Subject: [PATCH v3] arm64: dts: mt7986: add built-in Wi-Fi device nodes Date: Mon, 30 May 2022 17:09:44 +0800 Message-ID: <20220530090944.4558-1-chui-hao.chiu@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This enables built-in 802.11ax Wi-Fi support. Reviewed-by: Sam Shih Reviewed-by: Ryder Lee Signed-off-by: Peter Chiu --- v2: add clocks and clock-names. v3: rename wmac to wifi and change underscores to dash in node names. --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 41 +++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 22 ++++++++++ arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 43 ++++++++++++++++++++ 3 files changed, 106 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot= /dts/mediatek/mt7986a-rfb.dts index 24c155c71f0d..42b4f42754f3 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -57,6 +57,13 @@ status =3D "okay"; }; +&wifi { + status =3D "okay"; + pinctrl-names =3D "default", "dbdc"; + pinctrl-0 =3D <&wf_2g_5g_pins>; + pinctrl-1 =3D <&wf_dbdc_pins>; +}; + &pio { pcie_pins: pcie-pins { mux { @@ -99,6 +106,40 @@ groups =3D "jtag"; }; }; + + wf_2g_5g_pins: wf-2g-5g-pins { + mux { + function =3D "wifi"; + groups =3D "wf_2g", "wf_5g"; + }; + conf { + pins =3D "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength =3D <4>; + }; + }; + + wf_dbdc_pins: wf-dbdc-pins { + mux { + function =3D "wifi"; + groups =3D "wf_dbdc"; + }; + conf { + pins =3D "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength =3D <4>; + }; + }; }; &spi0 { diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dt= s/mediatek/mt7986a.dtsi index 9663a0779416..0f7d555996fc 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { interrupt-parent =3D <&gic>; @@ -80,6 +81,11 @@ reg =3D <0 0x43000000 0 0x30000>; no-map; }; + + wmcpu_emi: wmcpu-reserved@4fc00000 { + no-map; + reg =3D <0 0x4fc00000 0 0x00100000>; + }; }; timer { @@ -381,6 +387,22 @@ #reset-cells =3D <1>; }; + wifi: wifi@18000000 { + compatible =3D "mediatek,mt7986-wmac"; + resets =3D <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>; + reset-names =3D "consys"; + clocks =3D <&topckgen CLK_TOP_CONN_MCUSYS_SEL>, + <&topckgen CLK_TOP_AP2CNN_HOST_SEL>; + clock-names =3D "mcu", "ap2conn"; + reg =3D <0 0x18000000 0 0x1000000>, + <0 0x10003000 0 0x1000>, + <0 0x11d10000 0 0x1000>; + interrupts =3D , + , + , + ; + memory-region =3D <&wmcpu_emi>; + }; }; }; diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot= /dts/mediatek/mt7986b-rfb.dts index d4078feb4aad..088722c1e14c 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts @@ -97,3 +97,46 @@ &usb_phy { status =3D "okay"; }; + +&wifi { + status =3D "okay"; + pinctrl-names =3D "default", "dbdc"; + pinctrl-0 =3D <&wf_2g_5g_pins>; + pinctrl-1 =3D <&wf_dbdc_pins>; +}; + +&pio { + wf_2g_5g_pins: wf-2g-5g-pins { + mux { + function =3D "wifi"; + groups =3D "wf_2g", "wf_5g"; + }; + conf { + pins =3D "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength =3D <4>; + }; + }; + + wf_dbdc_pins: wf-dbdc-pins { + mux { + function =3D "wifi"; + groups =3D "wf_dbdc"; + }; + conf { + pins =3D "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength =3D <4>; + }; + }; +}; -- 2.18.0